mirror of
https://github.com/AsahiLinux/u-boot
synced 2025-03-17 07:16:59 +00:00
Blackfin: use new bfin read/write mmr helper funcs
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This commit is contained in:
Mike Frysinger
parent
313e8aacc1
commit
f948158f72
5 changed files with 91 additions and 80 deletions
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@ -34,7 +34,7 @@ static inline void serial_init(void)
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size_t i;
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/* force RTS rather than relying on auto RTS */
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bfin_write_UART1_MCR(bfin_read_UART1_MCR() | FCPOL);
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bfin_write16(&pUART->mcr, bfin_read16(&pUART->mcr) | FCPOL);
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/* Wait for the line to clear up. We cannot rely on UART
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* registers as none of them reflect the status of the RSR.
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@ -64,7 +64,7 @@ static inline void serial_init(void)
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#endif
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if (BFIN_DEBUG_EARLY_SERIAL) {
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int ucen = *pUART_GCTL & UCEN;
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int ucen = bfin_read16(&pUART->gctl) & UCEN;
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serial_early_init();
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/* If the UART is off, that means we need to program
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@ -81,7 +81,7 @@ static inline void serial_deinit(void)
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#ifdef __ADSPBF54x__
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if (BFIN_UART_USE_RTS && CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_UART) {
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/* clear forced RTS rather than relying on auto RTS */
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bfin_write_UART1_MCR(bfin_read_UART1_MCR() & ~FCPOL);
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bfin_write16(&pUART->mcr, bfin_read16(&pUART->mcr) & ~FCPOL);
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}
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#endif
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}
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@ -95,9 +95,9 @@ static inline void serial_putc(char c)
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if (c == '\n')
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serial_putc('\r');
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*pUART_THR = c;
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bfin_write16(&pUART->thr, c);
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while (!(*pUART_LSR & TEMT))
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while (!(bfin_read16(&pUART->lsr) & TEMT))
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continue;
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}
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@ -97,12 +97,12 @@ void __udelay(unsigned long usec)
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#define MAX_TIM_LOAD 0xFFFFFFFF
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int timer_init(void)
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{
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*pTCNTL = 0x1;
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bfin_write_TCNTL(0x1);
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CSYNC();
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*pTSCALE = 0x0;
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*pTCOUNT = MAX_TIM_LOAD;
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*pTPERIOD = MAX_TIM_LOAD;
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*pTCNTL = 0x7;
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bfin_write_TSCALE(0x0);
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bfin_write_TCOUNT(MAX_TIM_LOAD);
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bfin_write_TPERIOD(MAX_TIM_LOAD);
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bfin_write_TCNTL(0x7);
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CSYNC();
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timestamp = 0;
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@ -130,7 +130,7 @@ ulong get_timer(ulong base)
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ulong milisec;
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/* Number of clocks elapsed */
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ulong clocks = (MAX_TIM_LOAD - (*pTCOUNT));
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ulong clocks = (MAX_TIM_LOAD - bfin_read_TCOUNT());
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/*
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* Find if the TCOUNT is reset
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@ -44,10 +44,6 @@
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#ifdef CONFIG_UART_CONSOLE
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#if defined(UART_LSR) && (CONFIG_UART_CONSOLE != 0)
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# error CONFIG_UART_CONSOLE must be 0 on parts with only one UART
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#endif
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#include "serial.h"
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#ifdef CONFIG_DEBUG_SERIAL
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@ -63,7 +59,7 @@ size_t cache_count;
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static uint16_t uart_lsr_save;
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static uint16_t uart_lsr_read(void)
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{
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uint16_t lsr = *pUART_LSR;
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uint16_t lsr = bfin_read16(&pUART->lsr);
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uart_lsr_save |= (lsr & (OE|PE|FE|BI));
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return lsr | uart_lsr_save;
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}
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@ -71,15 +67,21 @@ static uint16_t uart_lsr_read(void)
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static void uart_lsr_clear(void)
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{
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uart_lsr_save = 0;
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*pUART_LSR |= -1;
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bfin_write16(&pUART->lsr, bfin_read16(&pUART->lsr) | -1);
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}
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#else
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/* When debugging is disabled, we only care about the DR bit, so if other
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* bits get set/cleared, we don't really care since we don't read them
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* anyways (and thus anomaly 05000099 is irrelevant).
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*/
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static inline uint16_t uart_lsr_read(void) { return *pUART_LSR; }
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static inline void uart_lsr_clear(void) { *pUART_LSR = -1; }
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static uint16_t uart_lsr_read(void)
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{
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return bfin_read16(&pUART->lsr);
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}
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static void uart_lsr_clear(void)
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{
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bfin_write16(&pUART->lsr, bfin_read16(&pUART->lsr) | -1);
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}
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#endif
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/* Symbol for our assembly to call. */
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@ -130,7 +132,7 @@ void serial_putc(const char c)
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continue;
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/* queue the character for transmission */
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*pUART_THR = c;
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bfin_write16(&pUART->thr, c);
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SSYNC();
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WATCHDOG_RESET();
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@ -151,7 +153,7 @@ int serial_getc(void)
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continue;
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/* grab the new byte */
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uart_rbr_val = *pUART_RBR;
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uart_rbr_val = bfin_read16(&pUART->rbr);
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#ifdef CONFIG_DEBUG_SERIAL
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/* grab & clear the LSR */
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@ -165,8 +167,8 @@ int serial_getc(void)
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uint16_t dll, dlh;
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printf("\n[SERIAL ERROR]\n");
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ACCESS_LATCH();
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dll = *pUART_DLL;
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dlh = *pUART_DLH;
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dll = bfin_read16(&pUART->dll);
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dlh = bfin_read16(&pUART->dlh);
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ACCESS_PORT_IER();
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printf("\tDLL=0x%x DLH=0x%x\n", dll, dlh);
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do {
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@ -24,71 +24,80 @@
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# define BFIN_DEBUG_EARLY_SERIAL 0
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#endif
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#ifndef __ASSEMBLY__
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#define LOB(x) ((x) & 0xFF)
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#define HIB(x) (((x) >> 8) & 0xFF)
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/*
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* All Blackfin system MMRs are padded to 32bits even if the register
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* itself is only 16bits. So use a helper macro to streamline this.
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*/
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#define __BFP(m) u16 m; u16 __pad_##m
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struct bfin_mmr_serial {
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#ifdef __ADSPBF54x__
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__BFP(dll);
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__BFP(dlh);
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__BFP(gctl);
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__BFP(lcr);
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__BFP(mcr);
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__BFP(lsr);
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__BFP(msr);
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__BFP(scr);
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__BFP(ier_set);
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__BFP(ier_clear);
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__BFP(thr);
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__BFP(rbr);
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#else
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union {
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u16 dll;
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u16 thr;
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const u16 rbr;
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};
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const u16 __spad0;
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union {
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u16 dlh;
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u16 ier;
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};
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const u16 __spad1;
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const __BFP(iir);
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__BFP(lcr);
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__BFP(mcr);
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__BFP(lsr);
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__BFP(msr);
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__BFP(scr);
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const u32 __spad2;
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__BFP(gctl);
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#endif
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};
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#undef __BFP
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#ifndef UART_LSR
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# if (CONFIG_UART_CONSOLE == 3)
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# define pUART_DLH pUART3_DLH
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# define pUART_DLL pUART3_DLL
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# define pUART_GCTL pUART3_GCTL
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# define pUART_IER pUART3_IER
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# define pUART_IERC pUART3_IER_CLEAR
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# define pUART_LCR pUART3_LCR
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# define pUART_LSR pUART3_LSR
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# define pUART_RBR pUART3_RBR
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# define pUART_THR pUART3_THR
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# define UART_THR UART3_THR
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# define UART_LSR UART3_LSR
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# define UART_BASE UART3_DLL
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# elif (CONFIG_UART_CONSOLE == 2)
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# define pUART_DLH pUART2_DLH
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# define pUART_DLL pUART2_DLL
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# define pUART_GCTL pUART2_GCTL
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# define pUART_IER pUART2_IER
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# define pUART_IERC pUART2_IER_CLEAR
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# define pUART_LCR pUART2_LCR
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# define pUART_LSR pUART2_LSR
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# define pUART_RBR pUART2_RBR
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# define pUART_THR pUART2_THR
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# define UART_THR UART2_THR
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# define UART_LSR UART2_LSR
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# define UART_BASE UART2_DLL
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# elif (CONFIG_UART_CONSOLE == 1)
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# define pUART_DLH pUART1_DLH
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# define pUART_DLL pUART1_DLL
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# define pUART_GCTL pUART1_GCTL
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# define pUART_IER pUART1_IER
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# define pUART_IERC pUART1_IER_CLEAR
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# define pUART_LCR pUART1_LCR
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# define pUART_LSR pUART1_LSR
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# define pUART_RBR pUART1_RBR
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# define pUART_THR pUART1_THR
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# define UART_THR UART1_THR
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# define UART_LSR UART1_LSR
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# define UART_BASE UART1_DLL
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# elif (CONFIG_UART_CONSOLE == 0)
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# define pUART_DLH pUART0_DLH
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# define pUART_DLL pUART0_DLL
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# define pUART_GCTL pUART0_GCTL
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# define pUART_IER pUART0_IER
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# define pUART_IERC pUART0_IER_CLEAR
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# define pUART_LCR pUART0_LCR
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# define pUART_LSR pUART0_LSR
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# define pUART_RBR pUART0_RBR
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# define pUART_THR pUART0_THR
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# define UART_THR UART0_THR
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# define UART_LSR UART0_LSR
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# define UART_BASE UART0_DLL
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# endif
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#else
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# if CONFIG_UART_CONSOLE != 0
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# error CONFIG_UART_CONSOLE must be 0 on parts with only one UART
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# endif
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# define UART_BASE UART_DLL
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#endif
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#ifndef __ASSEMBLY__
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#define pUART ((volatile struct bfin_mmr_serial *)UART_BASE)
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#ifdef __ADSPBF54x__
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# define ACCESS_LATCH()
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# define ACCESS_PORT_IER()
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# define CLEAR_IER() (*pUART_IERC = 0)
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#else
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# define ACCESS_LATCH() (*pUART_LCR |= DLAB)
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# define ACCESS_PORT_IER() (*pUART_LCR &= ~DLAB)
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# define CLEAR_IER() (*pUART_IER = 0)
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# define ACCESS_LATCH() \
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bfin_write16(&pUART->lcr, bfin_read16(&pUART->lcr) | DLAB)
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# define ACCESS_PORT_IER() \
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bfin_write16(&pUART->lcr, bfin_read16(&pUART->lcr) & ~DLAB)
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#endif
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__attribute__((always_inline))
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@ -142,10 +151,10 @@ static inline void serial_early_init(void)
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serial_do_portmux();
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/* always enable UART -- avoids anomalies 05000309 and 05000350 */
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*pUART_GCTL = UCEN;
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bfin_write16(&pUART->gctl, UCEN);
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/* Set LCR to Word Lengh 8-bit word select */
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*pUART_LCR = WLS_8;
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bfin_write16(&pUART->lcr, WLS_8);
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SSYNC();
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}
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@ -158,8 +167,8 @@ static inline void serial_early_put_div(uint16_t divisor)
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SSYNC();
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/* Program the divisor to get the baud rate we want */
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*pUART_DLL = LOB(divisor);
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*pUART_DLH = HIB(divisor);
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bfin_write16(&pUART->dll, LOB(divisor));
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bfin_write16(&pUART->dlh, HIB(divisor));
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SSYNC();
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/* Clear DLAB in LCR to Access THR RBR IER */
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@ -174,8 +183,8 @@ static inline uint16_t serial_early_get_div(void)
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ACCESS_LATCH();
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SSYNC();
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uint8_t dll = *pUART_DLL;
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uint8_t dlh = *pUART_DLH;
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uint8_t dll = bfin_read16(&pUART->dll);
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uint8_t dlh = bfin_read16(&pUART->dlh);
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uint16_t divisor = (dlh << 8) | dll;
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/* Clear DLAB in LCR to Access THR RBR IER */
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@ -61,7 +61,7 @@ extern u_long get_vco(void);
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extern u_long get_cclk(void);
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extern u_long get_sclk(void);
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# define bfin_revid() (*pCHIPID >> 28)
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# define bfin_revid() (bfin_read_CHIPID() >> 28)
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extern bool bfin_os_log_check(void);
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extern void bfin_os_log_dump(void);
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