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https://github.com/AsahiLinux/u-boot
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sunxi: Add sun5i support
Add support for the Allwinner A13 and A10s SoCs also know as the Allwinner sun5i family, and the A13-OLinuXinoM A13 based and r7-tv-dongle A10s based boards. The only differences compared to the already supported sun4i and sun7i families are all in the DRAM controller initialization: -Different hcpr values -Different MBUS settings -Some other small initialization changes Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net> Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Oliver Schinagl <oliver@schinagl.nl> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
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10 changed files with 135 additions and 0 deletions
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@ -12,6 +12,7 @@ obj-y += board.o
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obj-y += clock.o
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obj-y += pinmux.o
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obj-$(CONFIG_SUN4I) += clock_sun4i.o
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obj-$(CONFIG_SUN5I) += clock_sun4i.o
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obj-$(CONFIG_SUN7I) += clock_sun4i.o
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ifndef CONFIG_SPL_BUILD
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@ -20,6 +21,7 @@ endif
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ifdef CONFIG_SPL_BUILD
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obj-$(CONFIG_SUN4I) += dram.o
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obj-$(CONFIG_SUN5I) += dram.o
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obj-$(CONFIG_SUN7I) += dram.o
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ifdef CONFIG_SPL_FEL
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obj-y += start.o
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@ -47,9 +47,21 @@ u32 spl_boot_mode(void)
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int gpio_init(void)
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{
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#if CONFIG_CONS_INDEX == 1 && (defined(CONFIG_SUN4I) || defined(CONFIG_SUN7I))
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sunxi_gpio_set_cfgpin(SUNXI_GPB(22), SUN4I_GPB22_UART0_TX);
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sunxi_gpio_set_cfgpin(SUNXI_GPB(23), SUN4I_GPB23_UART0_RX);
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sunxi_gpio_set_pull(SUNXI_GPB(23), 1);
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#elif CONFIG_CONS_INDEX == 1 && defined(CONFIG_SUN5I)
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sunxi_gpio_set_cfgpin(SUNXI_GPB(19), SUN5I_GPB19_UART0_TX);
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sunxi_gpio_set_cfgpin(SUNXI_GPB(20), SUN5I_GPB20_UART0_RX);
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sunxi_gpio_set_pull(SUNXI_GPB(20), 1);
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#elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_SUN5I)
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sunxi_gpio_set_cfgpin(SUNXI_GPG(3), SUN5I_GPG3_UART1_TX);
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sunxi_gpio_set_cfgpin(SUNXI_GPG(4), SUN5I_GPG4_UART1_RX);
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sunxi_gpio_set_pull(SUNXI_GPG(4), 1);
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#else
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#error Unsupported console port number. Please fix pin mux settings in board.c
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#endif
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return 0;
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}
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@ -15,6 +15,14 @@ int print_cpuinfo(void)
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{
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#ifdef CONFIG_SUN4I
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puts("CPU: Allwinner A10 (SUN4I)\n");
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#elif defined CONFIG_SUN5I
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u32 val = readl(SUNXI_SID_BASE + 0x08);
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switch ((val >> 12) & 0xf) {
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case 0: puts("CPU: Allwinner A12 (SUN5I)\n"); break;
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case 3: puts("CPU: Allwinner A13 (SUN5I)\n"); break;
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case 7: puts("CPU: Allwinner A10s (SUN5I)\n"); break;
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default: puts("CPU: Allwinner A1X (SUN5I)\n");
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}
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#elif defined CONFIG_SUN7I
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puts("CPU: Allwinner A20 (SUN7I)\n");
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#else
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@ -155,6 +155,16 @@ static void mctl_enable_dllx(u32 phase)
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}
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static u32 hpcr_value[32] = {
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#ifdef CONFIG_SUN5I
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0, 0, 0, 0,
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0, 0, 0, 0,
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0, 0, 0, 0,
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0, 0, 0, 0,
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0x1031, 0x1031, 0x0735, 0x1035,
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0x1035, 0x0731, 0x1031, 0,
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0x0301, 0x0301, 0x0301, 0x0301,
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0x0301, 0x0301, 0x0301, 0
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#endif
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#ifdef CONFIG_SUN4I
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0x0301, 0x0301, 0x0301, 0x0301,
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0x0301, 0x0301, 0, 0,
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@ -257,9 +267,15 @@ static void mctl_setup_dram_clock(u32 clk)
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#if defined(CONFIG_SUN5I) || defined(CONFIG_SUN7I)
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/* setup MBUS clock */
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reg_val = CCM_MBUS_CTRL_GATE |
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#ifdef CONFIG_SUN7I
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CCM_MBUS_CTRL_CLK_SRC(CCM_MBUS_CTRL_CLK_SRC_PLL6) |
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CCM_MBUS_CTRL_N(CCM_MBUS_CTRL_N_X(2)) |
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CCM_MBUS_CTRL_M(CCM_MBUS_CTRL_M_X(2));
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#else /* defined(CONFIG_SUN5I) */
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CCM_MBUS_CTRL_CLK_SRC(CCM_MBUS_CTRL_CLK_SRC_PLL5) |
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CCM_MBUS_CTRL_N(CCM_MBUS_CTRL_N_X(1)) |
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CCM_MBUS_CTRL_M(CCM_MBUS_CTRL_M_X(2));
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#endif
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writel(reg_val, &ccm->mbus_clk_cfg);
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#endif
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@ -468,6 +484,11 @@ unsigned long dramc_init(struct dram_para *para)
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/* setup DRAM relative clock */
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mctl_setup_dram_clock(para->clock);
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#ifdef CONFIG_SUN5I
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/* Disable any pad power save control */
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writel(0, &dram->ppwrsctl);
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#endif
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/* reset external DRAM */
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#ifndef CONFIG_SUN7I
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mctl_ddr3_reset();
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@ -10,5 +10,7 @@
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#
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obj-y += board.o
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obj-$(CONFIG_SUNXI_GMAC) += gmac.o
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obj-$(CONFIG_A13_OLINUXINOM) += dram_a13_oli_micro.o
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obj-$(CONFIG_CUBIEBOARD) += dram_cubieboard.o
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obj-$(CONFIG_CUBIETRUCK) += dram_cubietruck.o
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obj-$(CONFIG_R7DONGLE) += dram_r7dongle.o
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32
board/sunxi/dram_a13_oli_micro.c
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32
board/sunxi/dram_a13_oli_micro.c
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@ -0,0 +1,32 @@
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/* this file is generated, don't edit it yourself */
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#include <common.h>
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#include <asm/arch/dram.h>
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static struct dram_para dram_para = {
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.clock = 408,
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.type = 3,
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.rank_num = 1,
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.density = 2048,
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.io_width = 16,
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.bus_width = 16,
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.cas = 9,
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.zq = 123,
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.odt_en = 0,
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.size = 256,
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.tpr0 = 0x42d899b7,
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.tpr1 = 0xa090,
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.tpr2 = 0x22a00,
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.tpr3 = 0,
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.tpr4 = 0,
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.tpr5 = 0,
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.emr1 = 0,
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.emr2 = 0x10,
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.emr3 = 0,
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};
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unsigned long sunxi_dram_init(void)
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{
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return dramc_init(&dram_para);
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}
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31
board/sunxi/dram_r7dongle.c
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31
board/sunxi/dram_r7dongle.c
Normal file
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@ -0,0 +1,31 @@
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/* this file is generated, don't edit it yourself */
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#include <common.h>
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#include <asm/arch/dram.h>
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static struct dram_para dram_para = {
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.clock = 384,
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.type = 3,
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.rank_num = 1,
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.density = 2048,
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.io_width = 8,
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.bus_width = 32,
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.cas = 9,
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.zq = 123,
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.odt_en = 0,
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.size = 1024,
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.tpr0 = 0x42d899b7,
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.tpr1 = 0xa090,
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.tpr2 = 0x22a00,
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.tpr3 = 0,
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.tpr4 = 0,
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.tpr5 = 0,
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.emr1 = 0x04,
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.emr2 = 0x10,
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.emr3 = 0,
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};
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unsigned long sunxi_dram_init(void)
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{
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return dramc_init(&dram_para);
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}
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@ -377,9 +377,11 @@ Active arm armv7 rmobile renesas lager
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Active arm armv7 s5pc1xx samsung goni s5p_goni - Robert Baldyga <r.baldyga@samsung.com>
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Active arm armv7 s5pc1xx samsung smdkc100 smdkc100 - Minkyu Kang <mk7.kang@samsung.com>
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Active arm armv7 socfpga altera socfpga socfpga_cyclone5 - -
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Active arm armv7 sunxi - sunxi A13-OLinuXinoM sun5i:A13_OLINUXINOM,SPL,CONS_INDEX=2 Hans de Goede <hdegoede@redhat.com>
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Active arm armv7 sunxi - sunxi Cubieboard sun4i:CUBIEBOARD,SPL Hans de Goede <hdegoede@redhat.com>
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Active arm armv7 sunxi - sunxi Cubietruck sun7i:CUBIETRUCK,SPL,SUNXI_GMAC,RGMII -
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Active arm armv7 sunxi - sunxi Cubietruck_FEL sun7i:CUBIETRUCK,SPL_FEL,SUNXI_GMAC,RGMII -
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Active arm armv7 sunxi - sunxi r7-tv-dongle sun5i:R7DONGLE,SPL Hans de Goede <hdegoede@redhat.com>
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Active arm armv7 u8500 st-ericsson snowball snowball - Mathieu Poirier <mathieu.poirier@linaro.org>
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Active arm armv7 u8500 st-ericsson u8500 u8500_href - -
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Active arm armv7 vf610 freescale vf610twr vf610twr vf610twr:IMX_CONFIG=board/freescale/vf610twr/imximage.cfg Alison Wang <b18965@freescale.com>
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23
include/configs/sun5i.h
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23
include/configs/sun5i.h
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/*
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* (C) Copyright 2012-2013 Henrik Nordstrom <henrik@henriknordstrom.net>
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*
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* Configuration settings for the Allwinner A13 (sun5i) CPU
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/*
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* High Level Configuration Options
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*/
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#define CONFIG_SUN5I /* sun5i SoC generation */
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#define CONFIG_SYS_PROMPT "sun5i# "
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/*
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* Include common sunxi configuration where most the settings are
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*/
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#include <configs/sunxi-common.h>
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#endif /* __CONFIG_H */
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@ -161,7 +161,9 @@
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#undef CONFIG_CMD_NET
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#undef CONFIG_CMD_NFS
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#ifndef CONFIG_CONS_INDEX
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#define CONFIG_CONS_INDEX 1 /* UART0 */
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#endif
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#ifdef CONFIG_SUNXI_GMAC
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#define CONFIG_DESIGNWARE_ETH /* GMAC can use designware driver */
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