board: pm9261: remove network support

The network support is removed because there is
no DM for Davicom DM9000.

Signed-off-by: Ilko Iliev <iliev@ronetix.at>
This commit is contained in:
Ilko Iliev 2021-04-23 15:06:02 +02:00 committed by Eugen Hristev
parent 217c9faa06
commit f822b62c02
3 changed files with 2 additions and 65 deletions

View file

@ -20,10 +20,6 @@
#include <asm/arch/at91_matrix.h> #include <asm/arch/at91_matrix.h>
#include <asm/arch/clk.h> #include <asm/arch/clk.h>
#include <asm/arch/gpio.h> #include <asm/arch/gpio.h>
#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_DRIVER_DM9000)
#include <net.h>
#endif
#include <netdev.h>
#include <asm/mach-types.h> #include <asm/mach-types.h>
DECLARE_GLOBAL_DATA_PTR; DECLARE_GLOBAL_DATA_PTR;
@ -80,36 +76,6 @@ static void pm9261_nand_hw_init(void)
} }
#endif #endif
#ifdef CONFIG_DRIVER_DM9000
static void pm9261_dm9000_hw_init(void)
{
struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
/* Configure SMC CS2 for DM9000 */
writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) |
AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0),
&smc->cs[2].setup);
writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(8) |
AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(8),
&smc->cs[2].pulse);
writel(AT91_SMC_CYCLE_NWE(16) | AT91_SMC_CYCLE_NRD(16),
&smc->cs[2].cycle);
writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
AT91_SMC_MODE_EXNW_DISABLE |
AT91_SMC_MODE_BAT | AT91_SMC_MODE_DBW_16 |
AT91_SMC_MODE_TDF_CYCLE(1),
&smc->cs[2].mode);
/* Configure Interrupt pin as input, no pull-up */
at91_periph_clk_enable(ATMEL_ID_PIOA);
at91_set_pio_input(AT91_PIO_PORTA, 24, 0);
}
#endif
int board_early_init_f(void) int board_early_init_f(void)
{ {
return 0; return 0;
@ -132,13 +98,6 @@ int board_init(void)
return 0; return 0;
} }
#ifdef CONFIG_DRIVER_DM9000
int board_eth_init(struct bd_info *bis)
{
return dm9000_initialize(bis);
}
#endif
int dram_init(void) int dram_init(void)
{ {
/* dram_init must store complete ramsize in gd->ram_size */ /* dram_init must store complete ramsize in gd->ram_size */
@ -155,19 +114,6 @@ int dram_init_banksize(void)
return 0; return 0;
} }
#ifdef CONFIG_RESET_PHY_R
void reset_phy(void)
{
#ifdef CONFIG_DRIVER_DM9000
/*
* Initialize ethernet HW addr prior to starting Linux,
* needed for nfsroot
*/
eth_init();
#endif
}
#endif
#ifdef CONFIG_DISPLAY_BOARDINFO #ifdef CONFIG_DISPLAY_BOARDINFO
int checkboard (void) int checkboard (void)
{ {

View file

@ -25,8 +25,6 @@ CONFIG_SYS_PROMPT="pm9261> "
CONFIG_CMD_NAND=y CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y CONFIG_CMD_CACHE=y
CONFIG_MTDIDS_DEFAULT="nor0=physmap-flash.0,nand0=nand" CONFIG_MTDIDS_DEFAULT="nor0=physmap-flash.0,nand0=nand"
CONFIG_MTDPARTS_DEFAULT="mtdparts=physmap-flash.0:256k(u-boot)ro,64k(u-boot-env)ro,1408k(kernel),-(rootfs);nand:-(nand)" CONFIG_MTDPARTS_DEFAULT="mtdparts=physmap-flash.0:256k(u-boot)ro,64k(u-boot-env)ro,1408k(kernel),-(rootfs);nand:-(nand)"
@ -34,6 +32,7 @@ CONFIG_OF_CONTROL=y
CONFIG_ENV_OVERWRITE=y CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_IS_IN_FLASH=y
CONFIG_ENV_ADDR=0x10040000 CONFIG_ENV_ADDR=0x10040000
# CONFIG_NET is not set
CONFIG_DM=y CONFIG_DM=y
CONFIG_BLK=y CONFIG_BLK=y
CONFIG_CLK=y CONFIG_CLK=y
@ -62,3 +61,4 @@ CONFIG_USB_STORAGE=y
CONFIG_DM_VIDEO=y CONFIG_DM_VIDEO=y
# CONFIG_VIDEO_BPP32 is not set # CONFIG_VIDEO_BPP32 is not set
CONFIG_LCD=y CONFIG_LCD=y
CONFIG_REGEX=y

View file

@ -173,15 +173,6 @@
#define CONFIG_SYS_MAX_FLASH_SECT 256 #define CONFIG_SYS_MAX_FLASH_SECT 256
#define CONFIG_SYS_MAX_FLASH_BANKS 1 #define CONFIG_SYS_MAX_FLASH_BANKS 1
/* Ethernet */
#define CONFIG_DRIVER_DM9000 1
#define CONFIG_DM9000_BASE 0x30000000
#define DM9000_IO CONFIG_DM9000_BASE
#define DM9000_DATA (CONFIG_DM9000_BASE + 4)
#define CONFIG_DM9000_USE_16BIT 1
#define CONFIG_NET_RETRY_COUNT 20
#define CONFIG_RESET_PHY_R 1
/* USB */ /* USB */
#define CONFIG_USB_ATMEL #define CONFIG_USB_ATMEL
#define CONFIG_USB_ATMEL_CLK_SEL_PLLB #define CONFIG_USB_ATMEL_CLK_SEL_PLLB