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armv8/lsch3/config: Define USB XHCI controller base address for LS2085A

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Define base address of both usb xhci controllers in lsch3 config
in the format (IMMR + offset) for LS2085A

Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
This commit is contained in:
Nikhil Badola 2015-06-26 17:01:50 +05:30 committed by York Sun
parent ca7fb12cc1
commit f7ff0e5e96
1 changed files with 3 additions and 0 deletions
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3
arch/arm/include/asm/arch-fsl-lsch3/config.h
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@ -64,6 +64,9 @@
#define I2C3_BASE_ADDR (CONFIG_SYS_IMMR + 0x01020000)
#define I2C4_BASE_ADDR (CONFIG_SYS_IMMR + 0x01030000)
#define CONFIG_SYS_LS2085A_XHCI_USB1_ADDR (CONFIG_SYS_IMMR + 0x02100000)
#define CONFIG_SYS_LS2085A_XHCI_USB2_ADDR (CONFIG_SYS_IMMR + 0x02110000)
/* TZ Protection Controller Definitions */
#define TZPC_BASE 0x02200000
#define TZPCR0SIZE_BASE (TZPC_BASE)