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spi: sun4i_spi: Remove non-DM pin setup
This is now handled automatically by the pinctrl driver. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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1 changed files with 0 additions and 84 deletions
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@ -32,7 +32,6 @@
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#include <linux/bitops.h>
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#include <asm/bitops.h>
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#include <asm/gpio.h>
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#include <asm/io.h>
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#include <linux/iopoll.h>
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@ -180,87 +179,6 @@ static void sun4i_spi_set_cs(struct udevice *bus, u8 cs, bool enable)
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writel(reg, SPI_REG(priv, SPI_TCR));
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}
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static int sun4i_spi_parse_pins(struct udevice *dev)
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{
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const void *fdt = gd->fdt_blob;
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const char *pin_name;
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const fdt32_t *list;
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u32 phandle;
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int drive, pull = 0, pin, i;
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int offset;
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int size;
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list = fdt_getprop(fdt, dev_of_offset(dev), "pinctrl-0", &size);
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if (!list) {
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printf("WARNING: sun4i_spi: cannot find pinctrl-0 node\n");
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return -EINVAL;
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}
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while (size) {
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phandle = fdt32_to_cpu(*list++);
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size -= sizeof(*list);
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offset = fdt_node_offset_by_phandle(fdt, phandle);
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if (offset < 0)
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return offset;
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drive = fdt_getprop_u32_default_node(fdt, offset, 0,
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"drive-strength", 0);
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if (drive) {
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if (drive <= 10)
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drive = 0;
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else if (drive <= 20)
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drive = 1;
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else if (drive <= 30)
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drive = 2;
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else
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drive = 3;
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} else {
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drive = fdt_getprop_u32_default_node(fdt, offset, 0,
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"allwinner,drive",
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0);
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drive = min(drive, 3);
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}
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if (fdt_get_property(fdt, offset, "bias-disable", NULL))
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pull = 0;
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else if (fdt_get_property(fdt, offset, "bias-pull-up", NULL))
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pull = 1;
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else if (fdt_get_property(fdt, offset, "bias-pull-down", NULL))
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pull = 2;
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else
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pull = fdt_getprop_u32_default_node(fdt, offset, 0,
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"allwinner,pull",
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0);
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pull = min(pull, 2);
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for (i = 0; ; i++) {
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pin_name = fdt_stringlist_get(fdt, offset,
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"pins", i, NULL);
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if (!pin_name) {
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pin_name = fdt_stringlist_get(fdt, offset,
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"allwinner,pins",
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i, NULL);
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if (!pin_name)
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break;
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}
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pin = sunxi_name_to_gpio(pin_name);
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if (pin < 0)
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break;
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if (IS_ENABLED(CONFIG_MACH_SUN50I) ||
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IS_ENABLED(CONFIG_SUN50I_GEN_H6))
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sunxi_gpio_set_cfgpin(pin, SUN50I_GPC_SPI0);
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else
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sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SPI0);
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sunxi_gpio_set_drv(pin, drive);
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sunxi_gpio_set_pull(pin, pull);
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}
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}
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return 0;
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}
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static inline int sun4i_spi_set_clock(struct udevice *dev, bool enable)
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{
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struct sun4i_spi_priv *priv = dev_get_priv(dev);
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@ -507,8 +425,6 @@ static int sun4i_spi_probe(struct udevice *bus)
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return ret;
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}
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sun4i_spi_parse_pins(bus);
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priv->variant = plat->variant;
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priv->base = plat->base;
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priv->freq = plat->max_hz;
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