From a5041e33e4f05efec8a412641243c9281cba47e9 Mon Sep 17 00:00:00 2001 From: Nikita Shubin Date: Fri, 20 May 2022 14:41:17 +0300 Subject: [PATCH 1/4] riscv: cpu: set gp before board_init_f_init_reserve Restore global pointer before board_init_f_init_reserve call, as "a0" can be set in harts_early_init call and we end up with invalid global pointer. Signed-off-by: Nikita Shubin Reviewed-by: Leo Yu-Chi Liang --- arch/riscv/cpu/start.S | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S index f2ef5564a1..ac81783a90 100644 --- a/arch/riscv/cpu/start.S +++ b/arch/riscv/cpu/start.S @@ -143,6 +143,7 @@ call_harts_early_init: bnez tp, secondary_hart_loop #endif + mv a0, s0 jal board_init_f_init_reserve SREG s1, GD_FIRMWARE_FDT_ADDR(gp) From f4512618caa0182344aa55c5e15b2a14e28227cd Mon Sep 17 00:00:00 2001 From: Leo Yu-Chi Liang Date: Wed, 1 Jun 2022 10:01:49 +0800 Subject: [PATCH 2/4] riscv: ae350: Fix XIP config boot failure The booting flow is SPL -> OpenSBI -> U-Boot. The boot hart may change after OpenSBI and may not always be hart0, so wrap the related branch instruction with M-MODE. Current DTB setup for XIP is not valid. There is no chance for CONFIG_SYS_FDT_BASE, the DTB address used in XIP mode, to be returned. Fix this. Fixes: 2e8d2f88439d ("riscv: Remove OF_PRIOR_STAGE from RISC-V boards") Signed-off-by: Rick Chen Signed-off-by: Leo Yu-Chi Liang --- arch/riscv/cpu/start.S | 4 +++- board/AndesTech/ax25-ae350/ax25-ae350.c | 17 +++++++++++------ 2 files changed, 14 insertions(+), 7 deletions(-) diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S index ac81783a90..b7f21ab63e 100644 --- a/arch/riscv/cpu/start.S +++ b/arch/riscv/cpu/start.S @@ -140,9 +140,11 @@ call_harts_early_init: * accesses gd). */ mv gp, s0 +#if CONFIG_IS_ENABLED(RISCV_MMODE) bnez tp, secondary_hart_loop #endif - +#endif + mv a0, s0 jal board_init_f_init_reserve diff --git a/board/AndesTech/ax25-ae350/ax25-ae350.c b/board/AndesTech/ax25-ae350/ax25-ae350.c index d6a4291379..36f0dd4b0f 100644 --- a/board/AndesTech/ax25-ae350/ax25-ae350.c +++ b/board/AndesTech/ax25-ae350/ax25-ae350.c @@ -54,17 +54,22 @@ ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info) return 0; } +#define ANDES_HW_DTB_ADDRESS 0xF2000000 void *board_fdt_blob_setup(int *err) { *err = 0; -#if defined(CONFIG_OF_BOARD) - return (void *)(ulong)gd->arch.firmware_fdt_addr; -#elif defined(CONFIG_OF_SEPARATE) - return (void *)CONFIG_SYS_FDT_BASE; -#else + + if (IS_ENABLED(CONFIG_OF_SEPARATE) || IS_ENABLED(CONFIG_OF_BOARD)) { + if (gd->arch.firmware_fdt_addr) + return (void *)(ulong)gd->arch.firmware_fdt_addr; + } + + if (fdt_magic(CONFIG_SYS_FDT_BASE) == FDT_MAGIC) + return (void *)CONFIG_SYS_FDT_BASE; + return (void *)ANDES_HW_DTB_ADDRESS; + *err = -EINVAL; return NULL; -#endif } int smc_init(void) From 48da0ca16eb3f31f54373e126eb63e18eb4d828f Mon Sep 17 00:00:00 2001 From: Nikita Shubin Date: Mon, 8 Aug 2022 13:24:25 +0300 Subject: [PATCH 3/4] spl: opensbi: fix typo s/obensbi_info/opensbi_info/ Signed-off-by: Nikita Shubin Reviewed-by: Leo Yu-Chi Liang --- common/spl/spl_opensbi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/common/spl/spl_opensbi.c b/common/spl/spl_opensbi.c index 1c0abf8553..7fe0b5e158 100644 --- a/common/spl/spl_opensbi.c +++ b/common/spl/spl_opensbi.c @@ -66,7 +66,7 @@ void spl_invoke_opensbi(struct spl_image_info *spl_image) if (ret) ret = fit_image_get_load(spl_image->fdt_addr, uboot_node, &uboot_entry); - /* Prepare obensbi_info object */ + /* Prepare opensbi_info object */ opensbi_info.magic = FW_DYNAMIC_INFO_MAGIC_VALUE; opensbi_info.version = FW_DYNAMIC_INFO_VERSION; opensbi_info.next_addr = uboot_entry; From aa0eda17cf98448c3ef826204f38c76bf48b3345 Mon Sep 17 00:00:00 2001 From: Nikita Shubin Date: Mon, 8 Aug 2022 13:28:52 +0300 Subject: [PATCH 4/4] spl: opensbi: convert scratch options to config Convert hardcoded "opensbi_info.options" to config provided value, this allows changing options passed to OpenSBI. SPL_OPENSBI_SCRATCH_OPTIONS is defaulted to SBI_SCRATCH_NO_BOOT_PRINTS. Link: https://github.com/riscv-software-src/opensbi/blob/master/docs/firmware/fw_dynamic.md Signed-off-by: Nikita Shubin Reviewed-by: Anup Patel Reviewed-by: Leo Yu-Chi Liang --- common/spl/Kconfig | 8 ++++++++ common/spl/spl_opensbi.c | 2 +- 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/common/spl/Kconfig b/common/spl/Kconfig index ee98810e9e..70d97815f0 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -1488,6 +1488,14 @@ config SPL_OPENSBI_LOAD_ADDR help Load address of the OpenSBI binary. +config SPL_OPENSBI_SCRATCH_OPTIONS + hex "Scratch options passed to OpenSBI" + default 0x1 + depends on SPL_OPENSBI + help + Options passed to fw_dynamic, for example SBI_SCRATCH_NO_BOOT_PRINTS or + SBI_SCRATCH_DEBUG_PRINTS. + config SPL_TARGET string "Addtional build targets for 'make'" default "spl/u-boot-spl.srec" if RCAR_GEN2 diff --git a/common/spl/spl_opensbi.c b/common/spl/spl_opensbi.c index 7fe0b5e158..b0f40076c3 100644 --- a/common/spl/spl_opensbi.c +++ b/common/spl/spl_opensbi.c @@ -71,7 +71,7 @@ void spl_invoke_opensbi(struct spl_image_info *spl_image) opensbi_info.version = FW_DYNAMIC_INFO_VERSION; opensbi_info.next_addr = uboot_entry; opensbi_info.next_mode = FW_DYNAMIC_INFO_NEXT_MODE_S; - opensbi_info.options = SBI_SCRATCH_NO_BOOT_PRINTS; + opensbi_info.options = CONFIG_SPL_OPENSBI_SCRATCH_OPTIONS; opensbi_info.boot_hart = gd->arch.boot_hart; opensbi_entry = (void (*)(ulong, ulong, ulong))spl_image->entry_point;