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arm:exynos:fix: Fix clock calculation for Exynos4210 based targets.
Provide proper setting for the APLL fout frequency calculation for Exynos4 based targets (especially Exynos4210 - Trats board). Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Acked-by: Minkyu Kang <mk7.kang@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
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1 changed files with 4 additions and 5 deletions
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@ -141,18 +141,17 @@ static int exynos_get_pll_clk(int pllreg, unsigned int r, unsigned int k)
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fout = (m + k / div) * (freq / (p * (1 << s)));
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} else {
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/*
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* Exynos4210
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* Exynos4412 / Exynos5250
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* FOUT = MDIV * FIN / (PDIV * 2^SDIV)
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*
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* Exynos4412 / Exynos5250
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* Exynos4210
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* FOUT = MDIV * FIN / (PDIV * 2^(SDIV-1))
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*/
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if (proid_is_exynos4210())
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fout = m * (freq / (p * (1 << s)));
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else
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fout = m * (freq / (p * (1 << (s - 1))));
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else
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fout = m * (freq / (p * (1 << s)));
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}
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return fout;
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}
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