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x86: baytrail: Configure FSP UPD from device tree
Allow for configuration of FSP UPD from the device tree which will override any settings which the FSP was built with itself. Modify the MinnowMax and BayleyBay boards to transfer sensible UPD settings from the Intel FSPv4 Gold release to the respective dts files, with the condition that the memory-down parameters for MinnowMax are also used. Signed-off-by: Andrew Bradford <andrew.bradford@kodakalaris.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Removed fsp,mrc-debug-msg and fsp,enable-xhci for minnowmax, bayleybay Fixed lines >80col Signed-off-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Andrew Bradford
Simon Glass
parent
44a8b96f64
commit
f3b84a3032
6 changed files with 388 additions and 30 deletions
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@ -1,14 +1,18 @@
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/*
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* Copyright (C) 2013, Intel Corporation
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* Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
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* Copyright (C) 2015, Kodak Alaris, Inc
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*
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* SPDX-License-Identifier: Intel
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*/
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#include <common.h>
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#include <fdtdec.h>
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#include <asm/arch/fsp/azalia.h>
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#include <asm/fsp/fsp_support.h>
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DECLARE_GLOBAL_DATA_PTR;
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/* ALC262 Verb Table - 10EC0262 */
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static const uint32_t verb_table_data13[] = {
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/* Pin Complex (NID 0x11) */
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@ -116,41 +120,139 @@ const struct pch_azalia_config azalia_config = {
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.reset_wait_timer_us = 300
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};
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/**
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* Override the FSP's UPD.
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* If the device tree does not specify an integer setting, use the default
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* provided in Intel's Baytrail_FSP_Gold4.tgz release FSP/BayleyBayFsp.bsf file.
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*/
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void update_fsp_upd(struct upd_region *fsp_upd)
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{
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struct memory_down_data *mem;
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const void *blob = gd->fdt_blob;
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int node;
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/*
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* Configure everything here to avoid the poor hard-pressed user
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* needing to run Intel's binary configuration tool. It may also allow
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* us to support the 1GB single core variant easily.
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*
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* TODO(sjg@chromium.org): Move to device tree
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*/
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fsp_upd->mrc_init_tseg_size = 8;
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fsp_upd->mrc_init_mmio_size = 0x800;
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fsp_upd->emmc_boot_mode = 0xff;
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fsp_upd->enable_sdio = 1;
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fsp_upd->enable_sdcard = 1;
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fsp_upd->enable_hsuart0 = 1;
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fsp_upd->azalia_config_ptr = (uint32_t)&azalia_config;
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fsp_upd->enable_i2_c0 = 0;
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fsp_upd->enable_i2_c2 = 0;
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fsp_upd->enable_i2_c3 = 0;
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fsp_upd->enable_i2_c4 = 0;
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fsp_upd->enable_xhci = 0;
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fsp_upd->igd_render_standby = 1;
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node = fdtdec_next_compatible(blob, 0, COMPAT_INTEL_BAYTRAIL_FSP);
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if (node < 0) {
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debug("%s: Cannot find FSP node\n", __func__);
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return;
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}
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fsp_upd->mrc_init_tseg_size = fdtdec_get_int(blob, node,
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"fsp,mrc-init-tseg-size",
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0);
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fsp_upd->mrc_init_mmio_size = fdtdec_get_int(blob, node,
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"fsp,mrc-init-mmio-size",
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0x800);
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fsp_upd->mrc_init_spd_addr1 = fdtdec_get_int(blob, node,
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"fsp,mrc-init-spd-addr1",
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0xa0);
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fsp_upd->mrc_init_spd_addr2 = fdtdec_get_int(blob, node,
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"fsp,mrc-init-spd-addr2",
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0xa2);
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fsp_upd->emmc_boot_mode = fdtdec_get_int(blob, node,
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"fsp,emmc-boot-mode", 2);
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fsp_upd->enable_sdio = fdtdec_get_bool(blob, node, "fsp,enable-sdio");
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fsp_upd->enable_sdcard = fdtdec_get_bool(blob, node,
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"fsp,enable-sdcard");
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fsp_upd->enable_hsuart0 = fdtdec_get_bool(blob, node,
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"fsp,enable-hsuart0");
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fsp_upd->enable_hsuart1 = fdtdec_get_bool(blob, node,
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"fsp,enable-hsuart1");
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fsp_upd->enable_spi = fdtdec_get_bool(blob, node, "fsp,enable-spi");
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fsp_upd->enable_sata = fdtdec_get_bool(blob, node, "fsp,enable-sata");
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fsp_upd->sata_mode = fdtdec_get_int(blob, node, "fsp,sata-mode", 1);
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fsp_upd->enable_azalia = fdtdec_get_bool(blob, node,
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"fsp,enable-azalia");
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fsp_upd->enable_xhci = fdtdec_get_bool(blob, node, "fsp,enable-xhci");
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fsp_upd->enable_lpe = fdtdec_get_bool(blob, node, "fsp,enable-lpe");
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fsp_upd->lpss_sio_enable_pci_mode = fdtdec_get_bool(blob, node,
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"fsp,lpss-sio-enable-pci-mode");
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fsp_upd->enable_dma0 = fdtdec_get_bool(blob, node, "fsp,enable-dma0");
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fsp_upd->enable_dma1 = fdtdec_get_bool(blob, node, "fsp,enable-dma1");
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fsp_upd->enable_i2_c0 = fdtdec_get_bool(blob, node, "fsp,enable-i2c0");
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fsp_upd->enable_i2_c1 = fdtdec_get_bool(blob, node, "fsp,enable-i2c1");
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fsp_upd->enable_i2_c2 = fdtdec_get_bool(blob, node, "fsp,enable-i2c2");
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fsp_upd->enable_i2_c3 = fdtdec_get_bool(blob, node, "fsp,enable-i2c3");
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fsp_upd->enable_i2_c4 = fdtdec_get_bool(blob, node, "fsp,enable-i2c4");
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fsp_upd->enable_i2_c5 = fdtdec_get_bool(blob, node, "fsp,enable-i2c5");
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fsp_upd->enable_i2_c6 = fdtdec_get_bool(blob, node, "fsp,enable-i2c6");
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fsp_upd->enable_pwm0 = fdtdec_get_bool(blob, node, "fsp,enable-pwm0");
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fsp_upd->enable_pwm1 = fdtdec_get_bool(blob, node, "fsp,enable-pwm1");
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fsp_upd->enable_hsi = fdtdec_get_bool(blob, node, "fsp,enable-hsi");
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fsp_upd->igd_dvmt50_pre_alloc = fdtdec_get_int(blob, node,
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"fsp,igd-dvmt50-pre-alloc", 2);
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fsp_upd->aperture_size = fdtdec_get_int(blob, node, "fsp,aperture-size",
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2);
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fsp_upd->gtt_size = fdtdec_get_int(blob, node, "fsp,gtt-size", 2);
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fsp_upd->serial_debug_port_address = fdtdec_get_int(blob, node,
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"fsp,serial-debug-port-address", 0x3f8);
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fsp_upd->serial_debug_port_type = fdtdec_get_int(blob, node,
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"fsp,serial-debug-port-type", 1);
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fsp_upd->mrc_debug_msg = fdtdec_get_bool(blob, node,
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"fsp,mrc-debug-msg");
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fsp_upd->isp_enable = fdtdec_get_bool(blob, node, "fsp,isp-enable");
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fsp_upd->scc_enable_pci_mode = fdtdec_get_bool(blob, node,
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"fsp,scc-enable-pci-mode");
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fsp_upd->igd_render_standby = fdtdec_get_bool(blob, node,
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"fsp,igd-render-standby");
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fsp_upd->txe_uma_enable = fdtdec_get_bool(blob, node,
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"fsp,txe-uma-enable");
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fsp_upd->os_selection = fdtdec_get_int(blob, node, "fsp,os-selection",
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4);
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fsp_upd->emmc45_ddr50_enabled = fdtdec_get_bool(blob, node,
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"fsp,emmc45-ddr50-enabled");
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fsp_upd->emmc45_hs200_enabled = fdtdec_get_bool(blob, node,
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"fsp,emmc45-hs200-enabled");
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fsp_upd->emmc45_retune_timer_value = fdtdec_get_int(blob, node,
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"fsp,emmc45-retune-timer-value", 8);
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fsp_upd->enable_igd = fdtdec_get_bool(blob, node, "fsp,enable-igd");
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mem = &fsp_upd->memory_params;
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mem->enable_memory_down = 1;
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mem->dram_speed = 1;
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mem->dimm_width = 1;
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mem->dimm_density = 2;
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mem->dimm_tcl = 0xb;
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mem->dimm_trpt_rcd = 0xb;
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mem->dimm_twr = 0xc;
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mem->dimm_twtr = 6;
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mem->dimm_trrd = 6;
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mem->dimm_trtp = 6;
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mem->dimm_tfaw = 0x14;
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mem->enable_memory_down = fdtdec_get_bool(blob, node,
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"fsp,enable-memory-down");
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if (mem->enable_memory_down) {
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node = fdtdec_next_compatible(blob, node,
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COMPAT_INTEL_BAYTRAIL_FSP_MDP);
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if (node < 0) {
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debug("%s: Cannot find FSP memory-down-params node\n",
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__func__);
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} else {
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mem->dram_speed = fdtdec_get_int(blob, node,
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"fsp,dram-speed",
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0x02);
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mem->dram_type = fdtdec_get_int(blob, node,
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"fsp,dram-type", 0x01);
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mem->dimm_0_enable = fdtdec_get_bool(blob, node,
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"fsp,dimm-0-enable");
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mem->dimm_1_enable = fdtdec_get_bool(blob, node,
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"fsp,dimm-1-enable");
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mem->dimm_width = fdtdec_get_int(blob, node,
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"fsp,dimm-width",
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0x00);
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mem->dimm_density = fdtdec_get_int(blob, node,
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"fsp,dimm-density",
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0x01);
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mem->dimm_bus_width = fdtdec_get_int(blob, node,
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"fsp,dimm-bus-width", 0x03);
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mem->dimm_sides = fdtdec_get_int(blob, node,
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"fsp,dimm-sides",
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0x00);
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mem->dimm_tcl = fdtdec_get_int(blob, node,
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"fsp,dimm-tcl", 0x09);
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mem->dimm_trpt_rcd = fdtdec_get_int(blob, node,
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"fsp,dimm-trpt-rcd", 0x09);
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mem->dimm_twr = fdtdec_get_int(blob, node,
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"fsp,dimm-twr", 0x0A);
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mem->dimm_twtr = fdtdec_get_int(blob, node,
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"fsp,dimm-twtr", 0x05);
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mem->dimm_trrd = fdtdec_get_int(blob, node,
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"fsp,dimm-trrd", 0x04);
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mem->dimm_trtp = fdtdec_get_int(blob, node,
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"fsp,dimm-trtp", 0x05);
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mem->dimm_tfaw = fdtdec_get_int(blob, node,
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"fsp,dimm-tfaw", 0x14);
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}
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}
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}
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@ -188,6 +188,44 @@
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};
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};
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fsp {
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compatible = "intel,baytrail-fsp";
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fsp,mrc-init-tseg-size = <0>;
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fsp,mrc-init-mmio-size = <0x800>;
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fsp,mrc-init-spd-addr1 = <0xa0>;
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fsp,mrc-init-spd-addr2 = <0xa2>;
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fsp,emmc-boot-mode = <2>;
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fsp,enable-sdio;
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fsp,enable-sdcard;
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fsp,enable-hsuart1;
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fsp,enable-spi;
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fsp,enable-sata;
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fsp,sata-mode = <1>;
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fsp,enable-lpe;
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fsp,lpss-sio-enable-pci-mode;
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fsp,enable-dma0;
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fsp,enable-dma1;
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fsp,enable-i2c0;
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fsp,enable-i2c1;
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fsp,enable-i2c2;
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fsp,enable-i2c3;
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fsp,enable-i2c4;
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fsp,enable-i2c5;
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fsp,enable-i2c6;
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fsp,enable-pwm0;
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fsp,enable-pwm1;
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fsp,igd-dvmt50-pre-alloc = <2>;
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fsp,aperture-size = <2>;
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fsp,gtt-size = <2>;
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fsp,serial-debug-port-address = <0x3f8>;
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fsp,serial-debug-port-type = <1>;
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fsp,scc-enable-pci-mode;
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fsp,os-selection = <4>;
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fsp,emmc45-ddr50-enabled;
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fsp,emmc45-retune-timer-value = <8>;
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fsp,enable-igd;
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};
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microcode {
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update@0 {
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#include "microcode/m0230671117.dtsi"
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@ -122,6 +122,62 @@
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0x01000000 0x0 0x2000 0x2000 0 0xe000>;
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};
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fsp {
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compatible = "intel,baytrail-fsp";
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fsp,mrc-init-tseg-size = <0>;
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fsp,mrc-init-mmio-size = <0x800>;
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fsp,mrc-init-spd-addr1 = <0xa0>;
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fsp,mrc-init-spd-addr2 = <0xa2>;
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fsp,emmc-boot-mode = <2>;
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fsp,enable-sdio;
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fsp,enable-sdcard;
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fsp,enable-hsuart1;
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fsp,enable-spi;
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fsp,enable-sata;
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fsp,sata-mode = <1>;
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fsp,enable-lpe;
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fsp,lpss-sio-enable-pci-mode;
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fsp,enable-dma0;
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fsp,enable-dma1;
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fsp,enable-i2c0;
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fsp,enable-i2c1;
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fsp,enable-i2c2;
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fsp,enable-i2c3;
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fsp,enable-i2c4;
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fsp,enable-i2c5;
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fsp,enable-i2c6;
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fsp,enable-pwm0;
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fsp,enable-pwm1;
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fsp,igd-dvmt50-pre-alloc = <2>;
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fsp,aperture-size = <2>;
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fsp,gtt-size = <2>;
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fsp,serial-debug-port-address = <0x3f8>;
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fsp,serial-debug-port-type = <1>;
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fsp,scc-enable-pci-mode;
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fsp,os-selection = <4>;
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fsp,emmc45-ddr50-enabled;
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fsp,emmc45-retune-timer-value = <8>;
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fsp,enable-igd;
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fsp,enable-memory-down;
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fsp,memory-down-params {
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compatible = "intel,baytrail-fsp-mdp";
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fsp,dram-speed = <1>;
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fsp,dram-type = <1>;
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fsp,dimm-0-enable;
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fsp,dimm-width = <1>;
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fsp,dimm-density = <2>;
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fsp,dimm-bus-width = <3>;
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fsp,dimm-sides = <0>;
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fsp,dimm-tcl = <0xb>;
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fsp,dimm-trpt-rcd = <0xb>;
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fsp,dimm-twr = <0xc>;
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fsp,dimm-twtr = <6>;
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fsp,dimm-trrd = <6>;
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fsp,dimm-trtp = <6>;
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fsp,dimm-tfaw = <0x14>;
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};
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};
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spi {
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#address-cells = <1>;
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#size-cells = <0>;
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158
doc/device-tree-bindings/misc/intel,baytrail-fsp.txt
Normal file
158
doc/device-tree-bindings/misc/intel,baytrail-fsp.txt
Normal file
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@ -0,0 +1,158 @@
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Intel Bay Trail FSP UPD Binding
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===============================
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The device tree node which describes the overriding of the Intel Bay Trail FSP
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UPD data for configuring the SoC.
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All properties can be found within the `upd-region` struct in
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arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h, under the same names, and in
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Intel's FSP Binary Configuration Tool for Bay Trail. This list of properties is
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matched up to Intel's E3800 FSPv4 release.
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# Boolean properties:
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- fsp,enable-sdio
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- fsp,enable-sdcard
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- fsp,enable-hsuart0
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- fsp,enable-hsuart1
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- fsp,enable-spi
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- fsp,enable-sata
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- fsp,enable-azalia
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- fsp,enable-xhci
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- fsp,enable-lpe
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- fsp,lpss-sio-enable-pci-mode
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- fsp,enable-dma0
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- fsp,enable-dma1
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- fsp,enable-i2-c0
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- fsp,enable-i2-c1
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- fsp,enable-i2-c2
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- fsp,enable-i2-c3
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- fsp,enable-i2-c4
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- fsp,enable-i2-c5
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- fsp,enable-i2-c6
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- fsp,enable-pwm0
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- fsp,enable-pwm1
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- fsp,enable-hsi
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- fsp,mrc-debug-msg
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- fsp,isp-enable
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- fsp,scc-enable-pci-mode
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- fsp,igd-render-standby
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- fsp,txe-uma-enable
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- fsp,emmc45-ddr50-enabled
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- fsp,emmc45-hs200-enabled
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- fsp,enable-igd
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- fsp,enable-memory-down
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If you set "fsp,enable-memory-down" you are strongly encouraged to provide an
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"fsp,memory-down-params{};" to specify how your memory is configured. If you do
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not set "fsp,enable-memory-down", then the DIMM SPD information will be
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discovered by the FSP and used to setup main memory.
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# Integer properties:
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- fsp,mrc-init-tseg-size
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- fsp,mrc-init-mmio-size
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- fsp,mrc-init-spd-addr1
|
||||
- fsp,mrc-init-spd-addr2
|
||||
- fsp,emmc-boot-mode
|
||||
- fsp,sata-mode
|
||||
- fsp,igd-dvmt50-pre-alloc
|
||||
- fsp,aperture-size
|
||||
- fsp,gtt-size
|
||||
- fsp,serial-debug-port-address
|
||||
- fsp,serial-debug-port-type
|
||||
- fsp,os-selection
|
||||
- fsp,emmc45-retune-timer-value
|
||||
|
||||
- fsp,memory-down-params {
|
||||
|
||||
# Boolean properties:
|
||||
|
||||
- fsp,dimm-0-enable
|
||||
- fsp,dimm-1-enable
|
||||
|
||||
# Integer properties:
|
||||
|
||||
- fsp,dram-speed
|
||||
- fsp,dram-type
|
||||
- fsp,dimm-width
|
||||
- fsp,dimm-density
|
||||
- fsp,dimm-bus-width
|
||||
- fsp,dimm-sides
|
||||
- fsp,dimm-tcl
|
||||
- fsp,dimm-trpt-rcd
|
||||
- fsp,dimm-twr
|
||||
- fsp,dimm-twtr
|
||||
- fsp,dimm-trrd
|
||||
- fsp,dimm-trtp
|
||||
- fsp,dimm-tfaw
|
||||
};
|
||||
|
||||
|
||||
Example (from MinnowMax Dual Core):
|
||||
-----------------------------------
|
||||
|
||||
/ {
|
||||
...
|
||||
|
||||
fsp {
|
||||
compatible = "intel,baytrail-fsp";
|
||||
fsp,mrc-init-tseg-size = <0>;
|
||||
fsp,mrc-init-mmio-size = <0x800>;
|
||||
fsp,mrc-init-spd-addr1 = <0xa0>;
|
||||
fsp,mrc-init-spd-addr2 = <0xa2>;
|
||||
fsp,emmc-boot-mode = <2>;
|
||||
fsp,enable-sdio;
|
||||
fsp,enable-sdcard;
|
||||
fsp,enable-hsuart1;
|
||||
fsp,enable-spi;
|
||||
fsp,enable-sata;
|
||||
fsp,sata-mode = <1>;
|
||||
fsp,enable-xhci;
|
||||
fsp,enable-lpe;
|
||||
fsp,lpss-sio-enable-pci-mode;
|
||||
fsp,enable-dma0;
|
||||
fsp,enable-dma1;
|
||||
fsp,enable-i2c0;
|
||||
fsp,enable-i2c1;
|
||||
fsp,enable-i2c2;
|
||||
fsp,enable-i2c3;
|
||||
fsp,enable-i2c4;
|
||||
fsp,enable-i2c5;
|
||||
fsp,enable-i2c6;
|
||||
fsp,enable-pwm0;
|
||||
fsp,enable-pwm1;
|
||||
fsp,igd-dvmt50-pre-alloc = <2>;
|
||||
fsp,aperture-size = <2>;
|
||||
fsp,gtt-size = <2>;
|
||||
fsp,serial-debug-port-address = <0x3f8>;
|
||||
fsp,serial-debug-port-type = <1>;
|
||||
fsp,mrc-debug-msg;
|
||||
fsp,scc-enable-pci-mode;
|
||||
fsp,os-selection = <4>;
|
||||
fsp,emmc45-ddr50-enabled;
|
||||
fsp,emmc45-retune-timer-value = <8>;
|
||||
fsp,enable-igd;
|
||||
fsp,enable-memory-down;
|
||||
fsp,memory-down-params {
|
||||
compatible = "intel,baytrail-fsp-mdp";
|
||||
fsp,dram-speed = <1>;
|
||||
fsp,dram-type = <1>;
|
||||
fsp,dimm-0-enable;
|
||||
fsp,dimm-width = <1>;
|
||||
fsp,dimm-density = <2>;
|
||||
fsp,dimm-bus-width = <3>;
|
||||
fsp,dimm-sides = <0>;
|
||||
fsp,dimm-tcl = <0xb>;
|
||||
fsp,dimm-trpt-rcd = <0xb>;
|
||||
fsp,dimm-twr = <0xc>;
|
||||
fsp,dimm-twtr = <6>;
|
||||
fsp,dimm-trrd = <6>;
|
||||
fsp,dimm-trtp = <6>;
|
||||
fsp,dimm-tfaw = <0x14>;
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
};
|
||||
|
|
@ -182,6 +182,8 @@ enum fdt_compat_id {
|
|||
COMPAT_INTEL_PCH, /* Intel PCH */
|
||||
COMPAT_INTEL_IRQ_ROUTER, /* Intel Interrupt Router */
|
||||
COMPAT_ALTERA_SOCFPGA_DWMAC, /* SoCFPGA Ethernet controller */
|
||||
COMPAT_INTEL_BAYTRAIL_FSP, /* Intel Bay Trail FSP */
|
||||
COMPAT_INTEL_BAYTRAIL_FSP_MDP, /* Intel FSP memory-down params */
|
||||
|
||||
COMPAT_COUNT,
|
||||
};
|
||||
|
|
|
|||
|
|
@ -76,6 +76,8 @@ static const char * const compat_names[COMPAT_COUNT] = {
|
|||
COMPAT(COMPAT_INTEL_PCH, "intel,bd82x6x"),
|
||||
COMPAT(COMPAT_INTEL_IRQ_ROUTER, "intel,irq-router"),
|
||||
COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"),
|
||||
COMPAT(COMPAT_INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"),
|
||||
COMPAT(COMPAT_INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
|
||||
};
|
||||
|
||||
const char *fdtdec_get_compatible(enum fdt_compat_id id)
|
||||
|
|
|
|||
Loading…
Reference in a new issue