Convert CONFIG_PCI_SCAN_SHOW to Kconfig

This converts the following to Kconfig:
   CONFIG_PCI_SCAN_SHOW

Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Tom Rini 2022-06-20 08:07:48 -04:00
parent 4e7860288c
commit f27bca4c27
47 changed files with 10 additions and 125 deletions

View file

@ -74,6 +74,7 @@ CONFIG_CMD_E1000=y
CONFIG_FEC_MXC=y CONFIG_FEC_MXC=y
CONFIG_MII=y CONFIG_MII=y
CONFIG_PCI=y CONFIG_PCI=y
CONFIG_PCI_SCAN_SHOW=y
CONFIG_PCIE_IMX=y CONFIG_PCIE_IMX=y
CONFIG_PINCTRL=y CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y CONFIG_PINCTRL_IMX6=y

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@ -97,6 +97,7 @@ CONFIG_FEC_MXC=y
CONFIG_RGMII=y CONFIG_RGMII=y
CONFIG_MII=y CONFIG_MII=y
CONFIG_PCI=y CONFIG_PCI=y
CONFIG_PCI_SCAN_SHOW=y
CONFIG_PCIE_IMX=y CONFIG_PCIE_IMX=y
CONFIG_PINCTRL=y CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y CONFIG_PINCTRL_IMX6=y

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@ -60,6 +60,7 @@ CONFIG_DM_ETH=y
CONFIG_FEC_MXC=y CONFIG_FEC_MXC=y
CONFIG_MII=y CONFIG_MII=y
CONFIG_PCI=y CONFIG_PCI=y
CONFIG_PCI_SCAN_SHOW=y
CONFIG_PCIE_IMX=y CONFIG_PCIE_IMX=y
CONFIG_PINCTRL=y CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y CONFIG_PINCTRL_IMX6=y

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@ -75,6 +75,7 @@ CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_FEC_MXC=y CONFIG_FEC_MXC=y
CONFIG_RGMII=y CONFIG_RGMII=y
CONFIG_MII=y CONFIG_MII=y
CONFIG_PCI_SCAN_SHOW=y
CONFIG_PCIE_IMX=y CONFIG_PCIE_IMX=y
CONFIG_PINCTRL=y CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y CONFIG_PINCTRL_IMX6=y

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@ -83,6 +83,7 @@ CONFIG_FEC_MXC=y
CONFIG_MII=y CONFIG_MII=y
CONFIG_PCI=y CONFIG_PCI=y
# CONFIG_PCI_PNP is not set # CONFIG_PCI_PNP is not set
CONFIG_PCI_SCAN_SHOW=y
CONFIG_PCIE_IMX=y CONFIG_PCIE_IMX=y
CONFIG_PINCTRL=y CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y CONFIG_PINCTRL_IMX6=y

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@ -84,6 +84,7 @@ CONFIG_DM_ETH=y
CONFIG_FEC_MXC=y CONFIG_FEC_MXC=y
CONFIG_MII=y CONFIG_MII=y
CONFIG_PCI=y CONFIG_PCI=y
CONFIG_PCI_SCAN_SHOW=y
CONFIG_PCIE_IMX=y CONFIG_PCIE_IMX=y
CONFIG_PINCTRL=y CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y CONFIG_PINCTRL_IMX6=y

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@ -81,6 +81,10 @@ config PCI_ARID
support on PCI devices. This helps to skip some devices in BDF support on PCI devices. This helps to skip some devices in BDF
scan that are not present. scan that are not present.
config PCI_SCAN_SHOW
bool "Show PCI devices during startup"
depends on PCIE_IMX
config PCIE_ECAM_GENERIC config PCIE_ECAM_GENERIC
bool "Generic ECAM-based PCI host controller support" bool "Generic ECAM-based PCI host controller support"
help help

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@ -232,10 +232,6 @@
#define CONFIG_SYS_PCIE2_IO_PHYS 0xD8000000 #define CONFIG_SYS_PCIE2_IO_PHYS 0xD8000000
#define CONFIG_SYS_PCIE2_IO_SIZE 0x00800000 #define CONFIG_SYS_PCIE2_IO_SIZE 0x00800000
#ifdef CONFIG_PCI
#undef CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
#endif /* CONFIG_PCI */
/* /*
* TSEC * TSEC
*/ */

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@ -312,10 +312,6 @@
#endif #endif
#define CONFIG_SYS_SRIO1_MEM_SIZE 0x20000000 /* 512M */ #define CONFIG_SYS_SRIO1_MEM_SIZE 0x20000000 /* 512M */
#if defined(CONFIG_PCI)
#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
#endif /* CONFIG_PCI */
#if defined(CONFIG_TSEC_ENET) #if defined(CONFIG_TSEC_ENET)
#define CONFIG_TSEC1 1 #define CONFIG_TSEC1 1

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@ -94,8 +94,6 @@
#else #else
#define CONFIG_SYS_PCIE2_IO_PHYS 0xffc10000 #define CONFIG_SYS_PCIE2_IO_PHYS 0xffc10000
#endif #endif
#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
#endif #endif
#define CONFIG_HWCONFIG #define CONFIG_HWCONFIG

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@ -321,10 +321,6 @@
#define CONFIG_SYS_DPAA_PME #define CONFIG_SYS_DPAA_PME
#define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) #define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
#ifdef CONFIG_PCI
#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
#endif /* CONFIG_PCI */
#ifdef CONFIG_FMAN_ENET #ifdef CONFIG_FMAN_ENET
#define CONFIG_SYS_FM1_DTSEC1_PHY_ADDR 0x2 #define CONFIG_SYS_FM1_DTSEC1_PHY_ADDR 0x2
#define CONFIG_SYS_FM1_DTSEC2_PHY_ADDR 0x3 #define CONFIG_SYS_FM1_DTSEC2_PHY_ADDR 0x3

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@ -377,8 +377,6 @@
#define CONFIG_SYS_PCIE3_IO_VIRT 0xf8020000 #define CONFIG_SYS_PCIE3_IO_VIRT 0xf8020000
#define CONFIG_SYS_PCIE3_IO_PHYS 0xff8020000ull #define CONFIG_SYS_PCIE3_IO_PHYS 0xff8020000ull
#endif #endif
#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
#endif /* CONFIG_PCI */ #endif /* CONFIG_PCI */
/* /*

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@ -362,8 +362,6 @@
#define CONFIG_SYS_PCIE4_IO_VIRT 0xf8030000 #define CONFIG_SYS_PCIE4_IO_VIRT 0xf8030000
#define CONFIG_SYS_PCIE4_IO_PHYS 0xff8030000ull #define CONFIG_SYS_PCIE4_IO_PHYS 0xff8030000ull
#endif #endif
#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
#endif /* CONFIG_PCI */ #endif /* CONFIG_PCI */
/* /*

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@ -391,10 +391,6 @@
#define CONFIG_SYS_PCIE4_MEM_PHYS 0xc40000000ull #define CONFIG_SYS_PCIE4_MEM_PHYS 0xc40000000ull
#define CONFIG_SYS_PCIE4_IO_PHYS 0xff8030000ull #define CONFIG_SYS_PCIE4_IO_PHYS 0xff8030000ull
#ifdef CONFIG_PCI
#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
#endif
/* Qman/Bman */ /* Qman/Bman */
#ifndef CONFIG_NOBQFMAN #ifndef CONFIG_NOBQFMAN
#define CONFIG_SYS_BMAN_NUM_PORTALS 18 #define CONFIG_SYS_BMAN_NUM_PORTALS 18

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@ -344,10 +344,6 @@
#define CONFIG_SYS_PCIE4_MEM_PHYS 0xc40000000ull #define CONFIG_SYS_PCIE4_MEM_PHYS 0xc40000000ull
#define CONFIG_SYS_PCIE4_IO_PHYS 0xff8030000ull #define CONFIG_SYS_PCIE4_IO_PHYS 0xff8030000ull
#ifdef CONFIG_PCI
#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
#endif
/* Qman/Bman */ /* Qman/Bman */
#ifndef CONFIG_NOBQFMAN #ifndef CONFIG_NOBQFMAN
#define CONFIG_SYS_BMAN_NUM_PORTALS 18 #define CONFIG_SYS_BMAN_NUM_PORTALS 18

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@ -138,10 +138,6 @@
#define CONFIG_SYS_PCIE4_MEM_PHYS 0xc60000000ull #define CONFIG_SYS_PCIE4_MEM_PHYS 0xc60000000ull
#define CONFIG_SYS_PCIE4_IO_PHYS 0xff8030000ull #define CONFIG_SYS_PCIE4_IO_PHYS 0xff8030000ull
#ifdef CONFIG_PCI
#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
#endif /* CONFIG_PCI */
/* /*
* Environment * Environment
*/ */

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@ -19,9 +19,6 @@
#define FDT_MODULE "apalis-v1.2" #define FDT_MODULE "apalis-v1.2"
#define FDT_MODULE_V1_0 "apalis" #define FDT_MODULE_V1_0 "apalis"
/* PCI host support */
#undef CONFIG_PCI_SCAN_SHOW
/* /*
* Custom Distro Boot configuration: * Custom Distro Boot configuration:
* 1. 8bit SD port (MMC1) * 1. 8bit SD port (MMC1)

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@ -28,9 +28,6 @@
#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
/* PCIe support */
#define CONFIG_PCI_SCAN_SHOW
/* Keep device tree and initrd in lower memory so the kernel can access them */ /* Keep device tree and initrd in lower memory so the kernel can access them */
#define RELOCATION_LIMITS_ENV_SETTINGS \ #define RELOCATION_LIMITS_ENV_SETTINGS \
"fdt_high=0x10000000\0" \ "fdt_high=0x10000000\0" \

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@ -17,9 +17,6 @@
#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
/* PCIe support */
#define CONFIG_PCI_SCAN_SHOW
/* /*
* Environment Configuration * Environment Configuration
*/ */

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@ -314,10 +314,6 @@
#define CONFIG_SYS_DPAA_PME #define CONFIG_SYS_DPAA_PME
#define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) #define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
#ifdef CONFIG_PCI
#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
#endif /* CONFIG_PCI */
#ifdef CONFIG_FMAN_ENET #ifdef CONFIG_FMAN_ENET
#define CONFIG_SYS_FM1_DTSEC1_PHY_ADDR 0x1c #define CONFIG_SYS_FM1_DTSEC1_PHY_ADDR 0x1c
#define CONFIG_SYS_FM1_DTSEC2_PHY_ADDR 0x1d #define CONFIG_SYS_FM1_DTSEC2_PHY_ADDR 0x1d

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@ -14,9 +14,6 @@
#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
/* PCIe support */
#define CONFIG_PCI_SCAN_SHOW
/* NAND */ /* NAND */
/* Keep device tree and initrd in lower memory so the kernel can access them */ /* Keep device tree and initrd in lower memory so the kernel can access them */

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@ -17,9 +17,6 @@
#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
/* PCIe support */
#define CONFIG_PCI_SCAN_SHOW
/* Keep device tree and initrd in lower memory so the kernel can access them */ /* Keep device tree and initrd in lower memory so the kernel can access them */
#define CONFIG_EXTRA_ENV_SETTINGS \ #define CONFIG_EXTRA_ENV_SETTINGS \
"fdt_high=0x10000000\0" \ "fdt_high=0x10000000\0" \

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@ -21,9 +21,6 @@
#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
/* PCIe support */
#define CONFIG_PCI_SCAN_SHOW
/* NAND */ /* NAND */
/* /*

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@ -19,9 +19,6 @@
/* I2C */ /* I2C */
#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE #define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
/* PCIe support */
#define CONFIG_PCI_SCAN_SHOW
/* /*
* mv-common.h should be defined after CMD configs since it used them * mv-common.h should be defined after CMD configs since it used them
* to enable certain macros * to enable certain macros

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@ -13,9 +13,6 @@
#define PHYS_SDRAM_1_SIZE 0x7B000000 #define PHYS_SDRAM_1_SIZE 0x7B000000
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
/* PCI CONFIG */
#define CONFIG_PCI_SCAN_SHOW
/* BOOT */ /* BOOT */
#define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024) #define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024)

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@ -109,6 +109,4 @@
#define CONFIG_IMX6_PWM_PER_CLK 66000000 #define CONFIG_IMX6_PWM_PER_CLK 66000000
#define CONFIG_PCI_SCAN_SHOW
#endif /* __GE_BX50V3_CONFIG_H */ #endif /* __GE_BX50V3_CONFIG_H */

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@ -28,9 +28,6 @@
#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
/* PCIe support */
#define CONFIG_PCI_SCAN_SHOW
/* Keep device tree and initrd in lower memory so the kernel can access them */ /* Keep device tree and initrd in lower memory so the kernel can access them */
#define RELOCATION_LIMITS_ENV_SETTINGS \ #define RELOCATION_LIMITS_ENV_SETTINGS \
"fdt_high=0x10000000\0" \ "fdt_high=0x10000000\0" \

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@ -25,8 +25,6 @@
func(USB, usb, 0) \ func(USB, usb, 0) \
func(DHCP, dhcp, na) func(DHCP, dhcp, na)
#define CONFIG_PCI_SCAN_SHOW
#undef CONFIG_EXTRA_ENV_SETTINGS #undef CONFIG_EXTRA_ENV_SETTINGS
#define CONFIG_EXTRA_ENV_SETTINGS \ #define CONFIG_EXTRA_ENV_SETTINGS \
"verify=no\0" \ "verify=no\0" \

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@ -82,8 +82,6 @@
DSPI_CTAR_CSSCK(2) | DSPI_CTAR_ASC(0) | \ DSPI_CTAR_CSSCK(2) | DSPI_CTAR_ASC(0) | \
DSPI_CTAR_DT(0)) DSPI_CTAR_DT(0))
#define CONFIG_PCI_SCAN_SHOW
#undef CONFIG_EXTRA_ENV_SETTINGS #undef CONFIG_EXTRA_ENV_SETTINGS
#define CONFIG_EXTRA_ENV_SETTINGS \ #define CONFIG_EXTRA_ENV_SETTINGS \
"verify=no\0" \ "verify=no\0" \

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@ -36,8 +36,6 @@
#define __PHY_ETH2_MASK 0xFB #define __PHY_ETH2_MASK 0xFB
#define __PHY_ETH1_MASK 0xFD #define __PHY_ETH1_MASK 0xFD
#define CONFIG_PCI_SCAN_SHOW
#undef CONFIG_EXTRA_ENV_SETTINGS #undef CONFIG_EXTRA_ENV_SETTINGS
#define CONFIG_EXTRA_ENV_SETTINGS \ #define CONFIG_EXTRA_ENV_SETTINGS \
"verify=no\0" \ "verify=no\0" \

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@ -99,10 +99,6 @@
#define FSL_PCIE_COMPAT "fsl,ls1021a-pcie" #define FSL_PCIE_COMPAT "fsl,ls1021a-pcie"
#ifdef CONFIG_PCI
#define CONFIG_PCI_SCAN_SHOW
#endif
#define CONFIG_PEN_ADDR_BIG_ENDIAN #define CONFIG_PEN_ADDR_BIG_ENDIAN
#define CONFIG_SMP_PEN_ADDR 0x01ee0200 #define CONFIG_SMP_PEN_ADDR 0x01ee0200

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@ -301,10 +301,6 @@
#endif #endif
#ifdef CONFIG_PCI
#define CONFIG_PCI_SCAN_SHOW
#endif
#define CONFIG_PEN_ADDR_BIG_ENDIAN #define CONFIG_PEN_ADDR_BIG_ENDIAN
#define CONFIG_SMP_PEN_ADDR 0x01ee0200 #define CONFIG_SMP_PEN_ADDR 0x01ee0200

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@ -81,9 +81,6 @@
/* PCIe */ /* PCIe */
#define FSL_PCIE_COMPAT "fsl,ls1021a-pcie" #define FSL_PCIE_COMPAT "fsl,ls1021a-pcie"
#ifdef CONFIG_PCI
#define CONFIG_PCI_SCAN_SHOW
#endif
#define CONFIG_HWCONFIG #define CONFIG_HWCONFIG
#define HWCONFIG_BUFFER_SIZE 256 #define HWCONFIG_BUFFER_SIZE 256

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@ -171,10 +171,6 @@
#define CONFIG_SYS_I2C_EEPROM_NXID #define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 1 #define CONFIG_SYS_EEPROM_BUS_NUM 1
#ifdef CONFIG_PCI
#define CONFIG_PCI_SCAN_SHOW
#endif
#define CONFIG_PEN_ADDR_BIG_ENDIAN #define CONFIG_PEN_ADDR_BIG_ENDIAN
#define CONFIG_SMP_PEN_ADDR 0x01ee0200 #define CONFIG_SMP_PEN_ADDR 0x01ee0200

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@ -108,13 +108,6 @@
/* I2C */ /* I2C */
/* PCIe */
#ifndef SPL_NO_PCIE
#ifdef CONFIG_PCI
#define CONFIG_PCI_SCAN_SHOW
#endif
#endif
/* DSPI */ /* DSPI */
/* FMan ucode */ /* FMan ucode */

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@ -76,10 +76,6 @@
/* I2C */ /* I2C */
#ifdef CONFIG_PCI
#define CONFIG_PCI_SCAN_SHOW
#endif
/* SATA */ /* SATA */
#ifndef SPL_NO_SATA #ifndef SPL_NO_SATA
#define CONFIG_SYS_SATA AHCI_BASE_ADDR #define CONFIG_SYS_SATA AHCI_BASE_ADDR

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@ -251,10 +251,6 @@
#define CONFIG_FSL_MEMAC #define CONFIG_FSL_MEMAC
#ifdef CONFIG_PCI
#define CONFIG_PCI_SCAN_SHOW
#endif
/* Initial environment variables */ /* Initial environment variables */
#undef CONFIG_EXTRA_ENV_SETTINGS #undef CONFIG_EXTRA_ENV_SETTINGS
#ifdef CONFIG_NXP_ESBC #ifdef CONFIG_NXP_ESBC

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@ -238,10 +238,6 @@
#define CONFIG_FSL_MEMAC #define CONFIG_FSL_MEMAC
#ifdef CONFIG_PCI
#define CONFIG_PCI_SCAN_SHOW
#endif
#define BOOT_TARGET_DEVICES(func) \ #define BOOT_TARGET_DEVICES(func) \
func(USB, usb, 0) \ func(USB, usb, 0) \
func(MMC, mmc, 0) \ func(MMC, mmc, 0) \

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@ -89,11 +89,6 @@
/* Qixis */ /* Qixis */
#define CONFIG_SYS_I2C_FPGA_ADDR 0x66 #define CONFIG_SYS_I2C_FPGA_ADDR 0x66
/* PCI */
#ifdef CONFIG_PCI
#define CONFIG_PCI_SCAN_SHOW
#endif
/* USB */ /* USB */
#define COUNTER_FREQUENCY_REAL (get_board_sys_clk() / 4) #define COUNTER_FREQUENCY_REAL (get_board_sys_clk() / 4)

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@ -24,7 +24,6 @@
#define CONFIG_SYS_FSL_USDHC_NUM 3 #define CONFIG_SYS_FSL_USDHC_NUM 3
#ifdef CONFIG_CMD_PCI #ifdef CONFIG_CMD_PCI
#define CONFIG_PCI_SCAN_SHOW
#define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12) #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12)
#define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(3, 19) #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(3, 19)
#endif #endif

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@ -129,7 +129,6 @@
#endif #endif
#ifdef CONFIG_CMD_PCI #ifdef CONFIG_CMD_PCI
#define CONFIG_PCI_SCAN_SHOW
#define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(2, 0) #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(2, 0)
#define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(2, 1) #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(2, 1)
#endif #endif

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@ -97,11 +97,4 @@
/* Environment organization */ /* Environment organization */
/*
* PCI express
*/
#ifdef CONFIG_CMD_PCI
#define CONFIG_PCI_SCAN_SHOW
#endif
#endif /* __CONFIG_H */ #endif /* __CONFIG_H */

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@ -48,7 +48,6 @@
/* PCI express */ /* PCI express */
#ifdef CONFIG_CMD_PCI #ifdef CONFIG_CMD_PCI
#define CONFIG_PCI_SCAN_SHOW
#define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(3, 29) #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(3, 29)
#define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(7, 12) #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(7, 12)
#endif #endif

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@ -384,8 +384,6 @@
#else #else
#define CONFIG_SYS_PCIE1_IO_PHYS 0xffc00000 #define CONFIG_SYS_PCIE1_IO_PHYS 0xffc00000
#endif #endif
#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
#endif /* CONFIG_PCI */ #endif /* CONFIG_PCI */
#if defined(CONFIG_TSEC_ENET) #if defined(CONFIG_TSEC_ENET)

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@ -26,7 +26,6 @@
/* PCI */ /* PCI */
#ifdef CONFIG_CMD_PCI #ifdef CONFIG_CMD_PCI
#define CONFIG_PCI_SCAN_SHOW
#define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12) #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12)
#endif #endif

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@ -45,7 +45,6 @@
#define CONFIG_MXC_USB_FLAGS 0 #define CONFIG_MXC_USB_FLAGS 0
#ifdef CONFIG_CMD_PCI #ifdef CONFIG_CMD_PCI
#define CONFIG_PCI_SCAN_SHOW
#define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(4, 6) #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(4, 6)
#endif #endif

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@ -47,9 +47,6 @@
#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
/* PCIe support */
#define CONFIG_PCI_SCAN_SHOW
/* NAND */ /* NAND */
#include <asm/arch/config.h> #include <asm/arch/config.h>