mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-29 16:10:58 +00:00
Merge branch 'mpc86xx'
This commit is contained in:
Jon Loeliger
commit
f1f33de332
12 changed files with 503 additions and 517 deletions
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@ -122,7 +122,8 @@ initdram(int board_type)
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#if defined(CFG_DRAM_TEST)
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int testdram(void)
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int
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testdram(void)
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{
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uint *pstart = (uint *) CFG_MEMTEST_START;
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uint *pend = (uint *) CFG_MEMTEST_END;
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@ -160,7 +161,8 @@ int testdram(void)
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/*
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* Fixed sdram init -- doesn't use serial presence detect.
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*/
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long int fixed_sdram(void)
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long int
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fixed_sdram(void)
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{
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#if !defined(CFG_RAMBOOT)
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volatile immap_t *immap = (immap_t *) CFG_IMMR;
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@ -215,8 +217,7 @@ static struct pci_config_table pci_fsl86xxads_config_table[] = {
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PCI_IDSEL_NUMBER, PCI_ANY_ID,
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pci_cfgfunc_config_device, {PCI_ENET0_IOADDR,
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PCI_ENET0_MEMADDR,
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PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER
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} },
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PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER}},
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{}
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};
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#endif
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@ -230,9 +231,7 @@ static struct pci_controller hose = {
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#endif /* CONFIG_PCI */
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void
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pci_init_board(void)
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void pci_init_board(void)
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{
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#ifdef CONFIG_PCI
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extern void pci_mpc86xx_init(struct pci_controller *hose);
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@ -305,7 +304,8 @@ mpc8641_reset_board(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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corepll = strfractoint(argv[4]);
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val = val + set_px_corepll(corepll);
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val = val + set_px_mpxpll(simple_strtoul(argv[5], NULL, 10));
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val = val + set_px_mpxpll(simple_strtoul(argv[5],
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NULL, 10));
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if (val == 3) {
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puts("Setting registers VCFGEN0, VCFGEN1, VBOOT, and VCTL\n");
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set_altbank();
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@ -360,12 +360,14 @@ my_usage:
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puts("See MPC8641HPCN Design Workbook for valid values of command line parameters.\n");
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}
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/*
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* get_board_sys_clk
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* Reads the FPGA on board for CONFIG_SYS_CLK_FREQ
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*/
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unsigned long get_board_sys_clk(ulong dummy)
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unsigned long
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get_board_sys_clk(ulong dummy)
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{
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u8 i, go_bit, rd_clks;
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ulong val = 0;
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@ -422,4 +424,3 @@ unsigned long get_board_sys_clk(ulong dummy)
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return val;
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}
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@ -251,13 +251,10 @@ int disable_watchdog(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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return 0;
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}
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U_BOOT_CMD(
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diswd, 1, 0, disable_watchdog,
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"diswd - Disable watchdog timer \n",
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NULL
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);
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NULL);
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/*
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* This function takes the non-integral cpu:mpx pll ratio
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@ -48,29 +48,33 @@ int mac_show(void)
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int i;
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unsigned char ethaddr[8][18];
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printf("ID %c%c%c%c\n", mac_data.id[0],\
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mac_data.id[1],\
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mac_data.id[2],\
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printf("ID %c%c%c%c\n",
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mac_data.id[0],
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mac_data.id[1],
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mac_data.id[2],
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mac_data.id[3]);
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printf("Errata %c%c%c%c%c\n", mac_data.errata[0],\
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mac_data.errata[1],\
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mac_data.errata[2],\
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mac_data.errata[3],\
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printf("Errata %c%c%c%c%c\n",
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mac_data.errata[0],
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mac_data.errata[1],
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mac_data.errata[2],
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mac_data.errata[3],
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mac_data.errata[4]);
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printf("Date %c%c%c%c%c%c%c\n", mac_data.date[0],\
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mac_data.date[1],\
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mac_data.date[2],\
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mac_data.date[3],\
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mac_data.date[4],\
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mac_data.date[5],\
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printf("Date %c%c%c%c%c%c%c\n",
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mac_data.date[0],
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mac_data.date[1],
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mac_data.date[2],
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mac_data.date[3],
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mac_data.date[4],
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mac_data.date[5],
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mac_data.date[6]);
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for (i = 0; i < 8; i++) {
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sprintf(ethaddr[i],"%02x:%02x:%02x:%02x:%02x:%02x",\
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mac_data.mac[i][0],\
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mac_data.mac[i][1],\
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mac_data.mac[i][2],\
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mac_data.mac[i][3],\
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mac_data.mac[i][4],\
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sprintf(ethaddr[i],
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"%02x:%02x:%02x:%02x:%02x:%02x",
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mac_data.mac[i][0],
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mac_data.mac[i][1],
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mac_data.mac[i][2],
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mac_data.mac[i][3],
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mac_data.mac[i][4],
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mac_data.mac[i][5]);
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printf("MAC %d %s\n", i, ethaddr[i]);
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}
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@ -100,10 +104,10 @@ int mac_read(void)
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printf("Check CRC on reading ...");
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crc = crc32(crc, data, length - 4);
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if (crc != mac_data.crc) {
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printf("CRC checksum is invalid, in EEPROM CRC is %x, calculated CRC is %x\n",mac_data.crc,crc);
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printf("CRC checksum is invalid, in EEPROM CRC is %x, calculated CRC is %x\n",
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mac_data.crc, crc);
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return -1;
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}
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else {
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} else {
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printf("CRC OK\n");
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mac_show();
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}
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@ -125,7 +129,9 @@ int mac_prog(void)
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crc = crc32(crc, eeprom_data, length - 4);
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mac_data.crc = crc;
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for (i = 0, ptr = eeprom_data; i < length; i += 8, ptr += 8) {
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ret = i2c_write(dev, i, 1, ptr, (length-i) <8 ? (length-i) : 8);
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ret =
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i2c_write(dev, i, 1, ptr,
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(length - i) < 8 ? (length - i) : 8);
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udelay(5000); /* 5ms write cycle timing */
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if (ret)
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break;
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@ -133,8 +139,7 @@ int mac_prog(void)
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if (ret) {
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printf("Programming failed.\n");
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return -1;
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}
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else {
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} else {
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printf("Programming %d bytes. Reading back ...\n", length);
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mac_read();
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}
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@ -180,7 +185,8 @@ int do_mac (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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}
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break;
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case 'p': /* number of ports */
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mac_data.tab_size = (unsigned char)simple_strtoul(argv[2],NULL,16);
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mac_data.tab_size =
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(unsigned char)simple_strtoul(argv[2], NULL, 16);
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break;
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case '0': /* mac 0 */
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case '1': /* mac 1 */
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@ -192,7 +198,9 @@ int do_mac (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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case '7': /* mac 7 */
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mac_val = simple_strtoull(argv[2], NULL, 16);
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for (i = 0; i < 6; i++) {
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mac_data.mac[cmd-'0'][i] = *((unsigned char *)(((unsigned int)(&mac_val))+i+2));
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mac_data.mac[cmd - '0'][i] =
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*((unsigned char *)
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(((unsigned int)(&mac_val)) + i + 2));
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}
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break;
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case 'h': /* help */
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@ -200,8 +208,7 @@ int do_mac (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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printf("Usage:\n%s\n", cmdtp->usage);
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break;
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}
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}
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else {
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} else {
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mac_show();
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}
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return 0;
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@ -210,7 +217,10 @@ int do_mac (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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int mac_read_from_eeprom(void)
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{
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int length, i;
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unsigned char dev = ID_EEPROM_ADDR, *data, ethaddr[4][18], enetvar[32];
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unsigned char dev = ID_EEPROM_ADDR;
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unsigned char *data;
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unsigned char ethaddr[4][18];
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unsigned char enetvar[32];
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unsigned int crc = 0;
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length = sizeof(EEPROM_data);
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@ -223,18 +233,20 @@ int mac_read_from_eeprom(void)
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crc = crc32(crc, data, length - 4);
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if (crc != mac_data.crc) {
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return -1;
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}
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else {
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} else {
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for (i = 0; i < 4; i++) {
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if (memcmp(&mac_data.mac[i], "\0\0\0\0\0\0", 6)) {
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sprintf(ethaddr[i], "%02x:%02x:%02x:%02x:%02x:%02x", \
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mac_data.mac[i][0], \
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mac_data.mac[i][1], \
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mac_data.mac[i][2], \
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mac_data.mac[i][3], \
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mac_data.mac[i][4], \
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sprintf(ethaddr[i],
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"%02x:%02x:%02x:%02x:%02x:%02x",
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mac_data.mac[i][0],
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mac_data.mac[i][1],
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mac_data.mac[i][2],
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mac_data.mac[i][3],
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mac_data.mac[i][4],
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mac_data.mac[i][5]);
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sprintf(enetvar, i ? "eth%daddr" : "ethaddr", i);
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sprintf(enetvar,
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i ? "eth%daddr" : "ethaddr",
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i);
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setenv(enetvar, ethaddr[i]);
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}
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}
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@ -38,7 +38,8 @@ extern void mpc8641_reset_board(cmd_tbl_t *cmdtp, int flag,
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#endif
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int checkcpu (void)
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int
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checkcpu(void)
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{
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sys_info_t sysinfo;
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uint pvr, svr;
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@ -126,8 +127,10 @@ soft_restart(unsigned long addr)
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{
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#ifndef CONFIG_MPC8641HPCN
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/* SRR0 has system reset vector, SRR1 has default MSR value */
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/* rfi restores MSR from SRR1 and sets the PC to the SRR0 value */
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/*
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* SRR0 has system reset vector, SRR1 has default MSR value
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* rfi restores MSR from SRR1 and sets the PC to the SRR0 value
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*/
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__asm__ __volatile__ ("mtspr 26, %0" :: "r" (addr));
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__asm__ __volatile__ ("li 4, (1 << 6)" ::: "r4");
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|
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@ -192,7 +195,8 @@ do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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/*
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* Get timebase clock frequency
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*/
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unsigned long get_tbclk(void)
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unsigned long
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get_tbclk(void)
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{
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sys_info_t sys_info;
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|
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|
|
@ -210,7 +214,8 @@ watchdog_reset(void)
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|||
|
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#if defined(CONFIG_DDR_ECC)
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void dma_init(void)
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void
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dma_init(void)
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{
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volatile immap_t *immap = (immap_t *) CFG_IMMR;
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volatile ccsr_dma_t *dma = &immap->im_dma;
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|
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@ -220,7 +225,8 @@ void dma_init(void)
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asm("sync; isync");
|
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}
|
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|
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uint dma_check(void)
|
||||
uint
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dma_check(void)
|
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{
|
||||
volatile immap_t *immap = (immap_t *) CFG_IMMR;
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volatile ccsr_dma_t *dma = &immap->im_dma;
|
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|
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@ -237,7 +243,8 @@ uint dma_check(void)
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return status;
|
||||
}
|
||||
|
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int dma_xfer(void *dest, uint count, void *src)
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int
|
||||
dma_xfer(void *dest, uint count, void *src)
|
||||
{
|
||||
volatile immap_t *immap = (immap_t *) CFG_IMMR;
|
||||
volatile ccsr_dma_t *dma = &immap->im_dma;
|
||||
|
|
@ -256,7 +263,8 @@ int dma_xfer(void *dest, uint count, void *src)
|
|||
|
||||
|
||||
#ifdef CONFIG_OF_FLAT_TREE
|
||||
void ft_cpu_setup(void *blob, bd_t *bd)
|
||||
void
|
||||
ft_cpu_setup(void *blob, bd_t *bd)
|
||||
{
|
||||
u32 *p;
|
||||
ulong clock;
|
||||
|
|
|
|||
|
|
@ -174,8 +174,7 @@ __i2c_read (u8 *data, int length)
|
|||
/* Generate ack on last next to last byte */
|
||||
if (i == length - 2)
|
||||
writeb(MPC86xx_I2CCR_MEN | MPC86xx_I2CCR_MSTA
|
||||
| MPC86xx_I2CCR_TXAK,
|
||||
I2CCCR);
|
||||
| MPC86xx_I2CCR_TXAK, I2CCCR);
|
||||
|
||||
/* Generate stop on last byte */
|
||||
if (i == length - 1)
|
||||
|
|
@ -236,7 +235,8 @@ exit:
|
|||
return !(i == length);
|
||||
}
|
||||
|
||||
int i2c_probe (uchar chip)
|
||||
int
|
||||
i2c_probe(uchar chip)
|
||||
{
|
||||
int tmp;
|
||||
|
||||
|
|
@ -250,7 +250,8 @@ int i2c_probe (uchar chip)
|
|||
return i2c_read(chip, 0, 1, (char *)&tmp, 1);
|
||||
}
|
||||
|
||||
uchar i2c_reg_read (uchar i2c_addr, uchar reg)
|
||||
uchar
|
||||
i2c_reg_read(uchar i2c_addr, uchar reg)
|
||||
{
|
||||
char buf[1];
|
||||
|
||||
|
|
@ -259,7 +260,8 @@ uchar i2c_reg_read (uchar i2c_addr, uchar reg)
|
|||
return buf[0];
|
||||
}
|
||||
|
||||
void i2c_reg_write (uchar i2c_addr, uchar reg, uchar val)
|
||||
void
|
||||
i2c_reg_write(uchar i2c_addr, uchar reg, uchar val)
|
||||
{
|
||||
i2c_write(i2c_addr, reg, 1, &val, 1);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -64,7 +64,6 @@ static __inline__ unsigned long get_dec (void)
|
|||
return val;
|
||||
}
|
||||
|
||||
|
||||
static __inline__ void set_dec(unsigned long val)
|
||||
{
|
||||
if (val)
|
||||
|
|
@ -77,7 +76,6 @@ int interrupt_init_cpu (unsigned *decrementer_count)
|
|||
return 0;
|
||||
}
|
||||
|
||||
|
||||
int interrupt_init(void)
|
||||
{
|
||||
int ret;
|
||||
|
|
@ -89,18 +87,21 @@ int interrupt_init (void)
|
|||
return ret;
|
||||
|
||||
decrementer_count = get_tbclk() / CFG_HZ;
|
||||
debug("interrupt init: tbclk() = %d MHz, decrementer_count = %d\n", (get_tbclk()/1000000), decrementer_count);
|
||||
debug("interrupt init: tbclk() = %d MHz, decrementer_count = %d\n",
|
||||
(get_tbclk() / 1000000),
|
||||
decrementer_count);
|
||||
|
||||
set_dec(decrementer_count);
|
||||
|
||||
set_msr(get_msr() | MSR_EE);
|
||||
|
||||
debug("MSR = 0x%08lx, Decrementer reg = 0x%08lx\n", get_msr(), get_dec());
|
||||
debug("MSR = 0x%08lx, Decrementer reg = 0x%08lx\n",
|
||||
get_msr(),
|
||||
get_dec());
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
void enable_interrupts(void)
|
||||
{
|
||||
set_msr(get_msr() | MSR_EE);
|
||||
|
|
@ -115,7 +116,6 @@ int disable_interrupts (void)
|
|||
return (msr & MSR_EE) != 0;
|
||||
}
|
||||
|
||||
|
||||
void increment_timestamp(void)
|
||||
{
|
||||
timestamp++;
|
||||
|
|
@ -126,13 +126,11 @@ void increment_timestamp(void)
|
|||
* with interrupts disabled.
|
||||
* Trivial implementation - no need to be really accurate.
|
||||
*/
|
||||
void
|
||||
timer_interrupt_cpu (struct pt_regs *regs)
|
||||
void timer_interrupt_cpu(struct pt_regs *regs)
|
||||
{
|
||||
/* nothing to do here */
|
||||
}
|
||||
|
||||
|
||||
void timer_interrupt(struct pt_regs *regs)
|
||||
{
|
||||
/* call cpu specific function from $(CPU)/interrupts.c */
|
||||
|
|
@ -158,7 +156,6 @@ void timer_interrupt (struct pt_regs *regs)
|
|||
board_show_activity(timestamp);
|
||||
#endif /* CONFIG_SHOW_ACTIVITY */
|
||||
|
||||
|
||||
}
|
||||
|
||||
void reset_timer(void)
|
||||
|
|
@ -180,22 +177,18 @@ void set_timer (ulong t)
|
|||
* Install and free a interrupt handler. Not implemented yet.
|
||||
*/
|
||||
|
||||
void
|
||||
irq_install_handler(int vec, interrupt_handler_t *handler, void *arg)
|
||||
void irq_install_handler(int vec, interrupt_handler_t *handler, void *arg)
|
||||
{
|
||||
}
|
||||
|
||||
void
|
||||
irq_free_handler(int vec)
|
||||
void irq_free_handler(int vec)
|
||||
{
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* irqinfo - print information about PCI devices,not implemented.
|
||||
*/
|
||||
int
|
||||
do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
|
||||
int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
|
||||
{
|
||||
printf("\nInterrupt-unsupported:\n");
|
||||
|
||||
|
|
@ -205,14 +198,7 @@ do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
|
|||
/*
|
||||
* Handle external interrupts
|
||||
*/
|
||||
void
|
||||
external_interrupt(struct pt_regs *regs)
|
||||
void external_interrupt(struct pt_regs *regs)
|
||||
{
|
||||
puts("external_interrupt (oops!)\n");
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -47,46 +47,53 @@ pci_mpc86xx_init(struct pci_controller *hose)
|
|||
uint io_sel = (gur->pordevsr & MPC86xx_PORDEVSR_IO_SEL) >> 16;
|
||||
|
||||
if ((io_sel == 2 || io_sel == 3 || io_sel == 5 || io_sel == 6 ||
|
||||
io_sel == 7 || io_sel == 0xf) && !(devdisr & MPC86xx_DEVDISR_PCIEX1)){
|
||||
io_sel == 7 || io_sel == 0xf)
|
||||
&& !(devdisr & MPC86xx_DEVDISR_PCIEX1)) {
|
||||
printf("PCI-EXPRESS 1: Configured as %s \n",
|
||||
pcie1_agent ? "Agent" : "Host");
|
||||
if(pcie1_agent) return; /*Don't scan bus when configured as agent*/
|
||||
if (pcie1_agent)
|
||||
return; /*Don't scan bus when configured as agent */
|
||||
printf(" Scanning PCIE bus");
|
||||
debug("0x%08x=0x%08x ", &pcie1->pme_msg_det,pcie1->pme_msg_det);
|
||||
debug("0x%08x=0x%08x ",
|
||||
&pcie1->pme_msg_det,
|
||||
pcie1->pme_msg_det);
|
||||
if (pcie1->pme_msg_det) {
|
||||
pcie1->pme_msg_det = 0xffffffff;
|
||||
debug(" with errors. Clearing. Now 0x%08x",
|
||||
pcie1->pme_msg_det);
|
||||
}
|
||||
debug("\n");
|
||||
}
|
||||
else{
|
||||
} else {
|
||||
printf("PCI-EXPRESS 1 disabled!\n");
|
||||
return;
|
||||
}
|
||||
|
||||
/*set first_bus=0 only skipped B0:D0:F0 which is
|
||||
/*
|
||||
* Set first_bus=0 only skipped B0:D0:F0 which is
|
||||
* a reserved device in M1575, but make it easy for
|
||||
* most of the scan process.
|
||||
*/
|
||||
hose->first_busno = 0x00;
|
||||
hose->last_busno = 0xfe;
|
||||
|
||||
pcie_setup_indirect(hose,
|
||||
(CFG_IMMR+0x8000),
|
||||
(CFG_IMMR+0x8004));
|
||||
pcie_setup_indirect(hose, (CFG_IMMR + 0x8000), (CFG_IMMR + 0x8004));
|
||||
|
||||
pci_hose_read_config_word(hose, PCI_BDF(0,0,0), PCI_COMMAND, &temp16);
|
||||
pci_hose_read_config_word(hose,
|
||||
PCI_BDF(0, 0, 0), PCI_COMMAND, &temp16);
|
||||
temp16 |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER |
|
||||
PCI_COMMAND_MEMORY | PCI_COMMAND_IO;
|
||||
pci_hose_write_config_word(hose, PCI_BDF(0,0,0), PCI_COMMAND, temp16);
|
||||
pci_hose_write_config_word(hose,
|
||||
PCI_BDF(0, 0, 0), PCI_COMMAND, temp16);
|
||||
|
||||
pci_hose_write_config_word(hose, PCI_BDF(0, 0, 0), PCI_STATUS, 0xffff);
|
||||
pci_hose_write_config_byte(hose, PCI_BDF(0,0,0), PCI_LATENCY_TIMER, 0x80);
|
||||
pci_hose_write_config_byte(hose,
|
||||
PCI_BDF(0, 0, 0), PCI_LATENCY_TIMER, 0x80);
|
||||
|
||||
pci_hose_read_config_dword(hose, PCI_BDF(0,0,0), PCI_PRIMARY_BUS, &temp32);
|
||||
pci_hose_read_config_dword(hose, PCI_BDF(0, 0, 0), PCI_PRIMARY_BUS,
|
||||
&temp32);
|
||||
temp32 = (temp32 & 0xff000000) | (0xff) | (0x0 << 8) | (0xfe << 16);
|
||||
pci_hose_write_config_dword(hose, PCI_BDF(0,0,0), PCI_PRIMARY_BUS, temp32);
|
||||
pci_hose_write_config_dword(hose, PCI_BDF(0, 0, 0), PCI_PRIMARY_BUS,
|
||||
temp32);
|
||||
|
||||
pcie1->powar1 = 0;
|
||||
pcie1->powar2 = 0;
|
||||
|
|
|
|||
|
|
@ -28,20 +28,23 @@
|
|||
|
||||
static int
|
||||
indirect_read_config_pcie(struct pci_controller *hose,
|
||||
pci_dev_t dev, int offset,
|
||||
int len,u32 *val)
|
||||
pci_dev_t dev,
|
||||
int offset,
|
||||
int len,
|
||||
u32 *val)
|
||||
{
|
||||
int bus = PCI_BUS(dev);
|
||||
char devfn = ( (PCI_DEV(dev) << 4 ) | (PCI_FUNC(dev)) ) ;
|
||||
|
||||
unsigned char *cfg_data;
|
||||
volatile unsigned char *cfg_data;
|
||||
u32 temp;
|
||||
|
||||
PEX_FIX;
|
||||
if (bus == 0xff) {
|
||||
PCI_CFG_OUT(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000001);
|
||||
PCI_CFG_OUT(hose->cfg_addr,
|
||||
dev | (offset & 0xfc) | 0x80000001);
|
||||
} else {
|
||||
PCI_CFG_OUT(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000);
|
||||
PCI_CFG_OUT(hose->cfg_addr,
|
||||
dev | (offset & 0xfc) | 0x80000000);
|
||||
}
|
||||
/*
|
||||
* Note: the caller has already checked that offset is
|
||||
|
|
@ -50,7 +53,7 @@ indirect_read_config_pcie(struct pci_controller *hose,
|
|||
/* ERRATA PCI-Ex 12 - Configuration Address/Data Alignment */
|
||||
cfg_data = hose->cfg_data;
|
||||
PEX_FIX;
|
||||
temp = in_le32(cfg_data);
|
||||
temp = in_le32((u32 *) cfg_data);
|
||||
switch (len) {
|
||||
case 1:
|
||||
*val = (temp >> (((offset & 3)) * 8)) & 0xff;
|
||||
|
|
@ -74,16 +77,16 @@ indirect_write_config_pcie(struct pci_controller *hose,
|
|||
u32 val)
|
||||
{
|
||||
int bus = PCI_BUS(dev);
|
||||
char devfn = ( (PCI_DEV(dev) << 4 ) | (PCI_FUNC(dev)) ) ;
|
||||
|
||||
unsigned char *cfg_data;
|
||||
volatile unsigned char *cfg_data;
|
||||
u32 temp;
|
||||
|
||||
PEX_FIX;
|
||||
if (bus == 0xff) {
|
||||
PCI_CFG_OUT(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000001);
|
||||
PCI_CFG_OUT(hose->cfg_addr,
|
||||
dev | (offset & 0xfc) | 0x80000001);
|
||||
} else {
|
||||
PCI_CFG_OUT(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000);
|
||||
PCI_CFG_OUT(hose->cfg_addr,
|
||||
dev | (offset & 0xfc) | 0x80000000);
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
@ -95,23 +98,23 @@ indirect_write_config_pcie(struct pci_controller *hose,
|
|||
switch (len) {
|
||||
case 1:
|
||||
PEX_FIX;
|
||||
temp = in_le32(cfg_data);
|
||||
temp = in_le32((u32 *) cfg_data);
|
||||
temp = (temp & ~(0xff << ((offset & 3) * 8))) |
|
||||
(val << ((offset & 3) * 8));
|
||||
PEX_FIX;
|
||||
out_le32(cfg_data, temp);
|
||||
out_le32((u32 *) cfg_data, temp);
|
||||
break;
|
||||
case 2:
|
||||
PEX_FIX;
|
||||
temp = in_le32(cfg_data);
|
||||
temp = in_le32((u32 *) cfg_data);
|
||||
temp = (temp & ~(0xffff << ((offset & 3) * 8)));
|
||||
temp |= (val << ((offset & 3) * 8));
|
||||
PEX_FIX;
|
||||
out_le32(cfg_data, temp);
|
||||
out_le32((u32 *) cfg_data, temp);
|
||||
break;
|
||||
default:
|
||||
PEX_FIX;
|
||||
out_le32(cfg_data, val);
|
||||
out_le32((u32 *) cfg_data, val);
|
||||
break;
|
||||
}
|
||||
PEX_FIX;
|
||||
|
|
@ -155,7 +158,7 @@ static int
|
|||
indirect_write_config_byte_pcie(struct pci_controller *hose,
|
||||
pci_dev_t dev,
|
||||
int offset,
|
||||
char val)
|
||||
u8 val)
|
||||
{
|
||||
return indirect_write_config_pcie(hose, dev, offset, 1, (u32) val);
|
||||
}
|
||||
|
|
@ -173,15 +176,13 @@ static int
|
|||
indirect_write_config_dword_pcie(struct pci_controller *hose,
|
||||
pci_dev_t dev,
|
||||
int offset,
|
||||
unsigned short val)
|
||||
u32 val)
|
||||
{
|
||||
return indirect_write_config_pcie(hose, dev, offset, 4, val);
|
||||
}
|
||||
|
||||
void
|
||||
pcie_setup_indirect(struct pci_controller* hose,
|
||||
u32 cfg_addr,
|
||||
u32 cfg_data)
|
||||
pcie_setup_indirect(struct pci_controller *hose, u32 cfg_addr, u32 cfg_data)
|
||||
{
|
||||
pci_set_ops(hose,
|
||||
indirect_read_config_byte_pcie,
|
||||
|
|
|
|||
|
|
@ -662,142 +662,140 @@ get_svr:
|
|||
blr
|
||||
|
||||
|
||||
/*------------------------------------------------------------------------------- */
|
||||
/* Function: in8 */
|
||||
/* Description: Input 8 bits */
|
||||
/*------------------------------------------------------------------------------- */
|
||||
/*
|
||||
* Function: in8
|
||||
* Description: Input 8 bits
|
||||
*/
|
||||
.globl in8
|
||||
in8:
|
||||
lbz r3,0x0000(r3)
|
||||
blr
|
||||
|
||||
/*------------------------------------------------------------------------------- */
|
||||
/* Function: out8 */
|
||||
/* Description: Output 8 bits */
|
||||
/*------------------------------------------------------------------------------- */
|
||||
/*
|
||||
* Function: out8
|
||||
* Description: Output 8 bits
|
||||
*/
|
||||
.globl out8
|
||||
out8:
|
||||
stb r4,0x0000(r3)
|
||||
blr
|
||||
|
||||
/*------------------------------------------------------------------------------- */
|
||||
/* Function: out16 */
|
||||
/* Description: Output 16 bits */
|
||||
/*------------------------------------------------------------------------------- */
|
||||
/*
|
||||
* Function: out16
|
||||
* Description: Output 16 bits
|
||||
*/
|
||||
.globl out16
|
||||
out16:
|
||||
sth r4,0x0000(r3)
|
||||
blr
|
||||
|
||||
/*------------------------------------------------------------------------------- */
|
||||
/* Function: out16r */
|
||||
/* Description: Byte reverse and output 16 bits */
|
||||
/*------------------------------------------------------------------------------- */
|
||||
/*
|
||||
* Function: out16r
|
||||
* Description: Byte reverse and output 16 bits
|
||||
*/
|
||||
.globl out16r
|
||||
out16r:
|
||||
sthbrx r4,r0,r3
|
||||
blr
|
||||
|
||||
/*------------------------------------------------------------------------------- */
|
||||
/* Function: out32 */
|
||||
/* Description: Output 32 bits */
|
||||
/*------------------------------------------------------------------------------- */
|
||||
/*
|
||||
* Function: out32
|
||||
* Description: Output 32 bits
|
||||
*/
|
||||
.globl out32
|
||||
out32:
|
||||
stw r4,0x0000(r3)
|
||||
blr
|
||||
|
||||
/*------------------------------------------------------------------------------- */
|
||||
/* Function: out32r */
|
||||
/* Description: Byte reverse and output 32 bits */
|
||||
/*------------------------------------------------------------------------------- */
|
||||
/*
|
||||
* Function: out32r
|
||||
* Description: Byte reverse and output 32 bits
|
||||
*/
|
||||
.globl out32r
|
||||
out32r:
|
||||
stwbrx r4,r0,r3
|
||||
blr
|
||||
|
||||
/*------------------------------------------------------------------------------- */
|
||||
/* Function: in16 */
|
||||
/* Description: Input 16 bits */
|
||||
/*------------------------------------------------------------------------------- */
|
||||
/*
|
||||
* Function: in16
|
||||
* Description: Input 16 bits
|
||||
*/
|
||||
.globl in16
|
||||
in16:
|
||||
lhz r3,0x0000(r3)
|
||||
blr
|
||||
|
||||
/*------------------------------------------------------------------------------- */
|
||||
/* Function: in16r */
|
||||
/* Description: Input 16 bits and byte reverse */
|
||||
/*------------------------------------------------------------------------------- */
|
||||
/*
|
||||
* Function: in16r
|
||||
* Description: Input 16 bits and byte reverse
|
||||
*/
|
||||
.globl in16r
|
||||
in16r:
|
||||
lhbrx r3,r0,r3
|
||||
blr
|
||||
|
||||
/*------------------------------------------------------------------------------- */
|
||||
/* Function: in32 */
|
||||
/* Description: Input 32 bits */
|
||||
/*------------------------------------------------------------------------------- */
|
||||
/*
|
||||
* Function: in32
|
||||
* Description: Input 32 bits
|
||||
*/
|
||||
.globl in32
|
||||
in32:
|
||||
lwz 3,0x0000(3)
|
||||
blr
|
||||
|
||||
/*------------------------------------------------------------------------------- */
|
||||
/* Function: in32r */
|
||||
/* Description: Input 32 bits and byte reverse */
|
||||
/*------------------------------------------------------------------------------- */
|
||||
/*
|
||||
* Function: in32r
|
||||
* Description: Input 32 bits and byte reverse
|
||||
*/
|
||||
.globl in32r
|
||||
in32r:
|
||||
lwbrx r3,r0,r3
|
||||
blr
|
||||
|
||||
/*------------------------------------------------------------------------------- */
|
||||
/* Function: ppcDcbf */
|
||||
/* Description: Data Cache block flush */
|
||||
/* Input: r3 = effective address */
|
||||
/* Output: none. */
|
||||
/*------------------------------------------------------------------------------- */
|
||||
/*
|
||||
* Function: ppcDcbf
|
||||
* Description: Data Cache block flush
|
||||
* Input: r3 = effective address
|
||||
* Output: none.
|
||||
*/
|
||||
.globl ppcDcbf
|
||||
ppcDcbf:
|
||||
dcbf r0,r3
|
||||
blr
|
||||
|
||||
/*------------------------------------------------------------------------------- */
|
||||
/* Function: ppcDcbi */
|
||||
/* Description: Data Cache block Invalidate */
|
||||
/* Input: r3 = effective address */
|
||||
/* Output: none. */
|
||||
/*------------------------------------------------------------------------------- */
|
||||
/*
|
||||
* Function: ppcDcbi
|
||||
* Description: Data Cache block Invalidate
|
||||
* Input: r3 = effective address
|
||||
* Output: none.
|
||||
*/
|
||||
.globl ppcDcbi
|
||||
ppcDcbi:
|
||||
dcbi r0,r3
|
||||
blr
|
||||
|
||||
/*--------------------------------------------------------------------------
|
||||
/*
|
||||
* Function: ppcDcbz
|
||||
* Description: Data Cache block zero.
|
||||
* Input: r3 = effective address
|
||||
* Output: none.
|
||||
*-------------------------------------------------------------------------- */
|
||||
|
||||
*/
|
||||
.globl ppcDcbz
|
||||
ppcDcbz:
|
||||
dcbz r0,r3
|
||||
blr
|
||||
|
||||
/*-------------------------------------------------------------------------- */
|
||||
/* Function: ppcSync */
|
||||
/* Description: Processor Synchronize */
|
||||
/* Input: none. */
|
||||
/* Output: none. */
|
||||
/*-------------------------------------------------------------------------- */
|
||||
/*
|
||||
* Function: ppcSync
|
||||
* Description: Processor Synchronize
|
||||
* Input: none.
|
||||
* Output: none.
|
||||
*/
|
||||
.globl ppcSync
|
||||
ppcSync:
|
||||
sync
|
||||
blr
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/*
|
||||
* void relocate_code (addr_sp, gd, addr_moni)
|
||||
*
|
||||
|
|
@ -1205,7 +1203,6 @@ secondary_cpu_setup:
|
|||
bl icache_enable
|
||||
sync
|
||||
|
||||
|
||||
/* TBEN in HID0 */
|
||||
mfspr r4, HID0
|
||||
oris r4, r4, 0x0400
|
||||
|
|
|
|||
|
|
@ -64,7 +64,8 @@ print_backtrace(unsigned long *sp)
|
|||
if (cnt++ % 7 == 0)
|
||||
printf("\n");
|
||||
printf("%08lX ", i);
|
||||
if (cnt > 32) break;
|
||||
if (cnt > 32)
|
||||
break;
|
||||
sp = (unsigned long *)*sp;
|
||||
}
|
||||
printf("\n");
|
||||
|
|
@ -80,21 +81,19 @@ show_regs(struct pt_regs * regs)
|
|||
regs->nip, regs->xer, regs->link, regs, regs->trap, regs->dar);
|
||||
printf("MSR: %08lx EE: %01x PR: %01x FP:"
|
||||
" %01x ME: %01x IR/DR: %01x%01x\n",
|
||||
regs->msr, regs->msr&MSR_EE ? 1 : 0, regs->msr&MSR_PR ? 1 : 0,
|
||||
regs->msr & MSR_FP ? 1 : 0,regs->msr&MSR_ME ? 1 : 0,
|
||||
regs->msr&MSR_IR ? 1 : 0,
|
||||
regs->msr, regs->msr & MSR_EE ? 1 : 0,
|
||||
regs->msr & MSR_PR ? 1 : 0, regs->msr & MSR_FP ? 1 : 0,
|
||||
regs->msr & MSR_ME ? 1 : 0, regs->msr & MSR_IR ? 1 : 0,
|
||||
regs->msr & MSR_DR ? 1 : 0);
|
||||
|
||||
printf("\n");
|
||||
for (i = 0; i < 32; i++) {
|
||||
if ((i % 8) == 0)
|
||||
{
|
||||
if ((i % 8) == 0) {
|
||||
printf("GPR%02d: ", i);
|
||||
}
|
||||
|
||||
printf("%08lX ", regs->gpr[i]);
|
||||
if ((i % 8) == 7)
|
||||
{
|
||||
if ((i % 8) == 7) {
|
||||
printf("\n");
|
||||
}
|
||||
}
|
||||
|
|
@ -203,7 +202,6 @@ SoftEmuException(struct pt_regs *regs)
|
|||
panic("Software Emulation Exception");
|
||||
}
|
||||
|
||||
|
||||
void
|
||||
UnknownException(struct pt_regs *regs)
|
||||
{
|
||||
|
|
@ -216,36 +214,13 @@ UnknownException(struct pt_regs *regs)
|
|||
_exception(0, regs);
|
||||
}
|
||||
|
||||
/* Probe an address by reading. If not present, return -1, otherwise
|
||||
* return 0.
|
||||
/*
|
||||
* Probe an address by reading.
|
||||
* If not present, return -1,
|
||||
* otherwise return 0.
|
||||
*/
|
||||
int
|
||||
addr_probe(uint *addr)
|
||||
{
|
||||
#if 0
|
||||
int retval;
|
||||
|
||||
__asm__ __volatile__( \
|
||||
"1: lwz %0,0(%1)\n" \
|
||||
" eieio\n" \
|
||||
" li %0,0\n" \
|
||||
"2:\n" \
|
||||
".section .fixup,\"ax\"\n" \
|
||||
"3: li %0,-1\n" \
|
||||
" b 2b\n" \
|
||||
".section __ex_table,\"a\"\n" \
|
||||
" .align 2\n" \
|
||||
" .long 1b,3b\n" \
|
||||
".text" \
|
||||
: "=r" (retval) : "r"(addr));
|
||||
|
||||
return (retval);
|
||||
#endif
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
|
|
|||
Loading…
Reference in a new issue