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pci: msc01: Use PCI_CONF1_ADDRESS() macro

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PCI msc01 driver uses standard format of Config Address for PCI
Configuration Mechanism #1 but with cleared Enable bit.

So use new U-Boot macro PCI_CONF1_ADDRESS() with clearing PCI_CONF1_ENABLE
bit and remove old custom driver address macros.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Pali Rohár 2021-11-26 11:42:44 +01:00 committed by Tom Rini
parent 247ffc6b36
commit f146bd96e4
2 changed files with 2 additions and 14 deletions
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7
drivers/pci/pci_msc01.c
View file

@ -34,16 +34,13 @@ static int msc01_config_access(struct msc01_pci_controller *msc01,
void *cfgdata = msc01->base + MSC01_PCI_CFGDATA_OFS; void *cfgdata = msc01->base + MSC01_PCI_CFGDATA_OFS;
unsigned int bus = PCI_BUS(bdf); unsigned int bus = PCI_BUS(bdf);
unsigned int dev = PCI_DEV(bdf); unsigned int dev = PCI_DEV(bdf);
unsigned int devfn = PCI_DEV(bdf) << 3 | PCI_FUNC(bdf); unsigned int func = PCI_FUNC(bdf);
/* clear abort status */ /* clear abort status */
__raw_writel(aborts, intstat); __raw_writel(aborts, intstat);
/* setup address */ /* setup address */
__raw_writel((bus << MSC01_PCI_CFGADDR_BNUM_SHF) | __raw_writel((PCI_CONF1_ADDRESS(bus, dev, func, where) & ~PCI_CONF1_ENABLE),
(dev << MSC01_PCI_CFGADDR_DNUM_SHF) |
(devfn << MSC01_PCI_CFGADDR_FNUM_SHF) |
((where / 4) << MSC01_PCI_CFGADDR_RNUM_SHF),
msc01->base + MSC01_PCI_CFGADDR_OFS); msc01->base + MSC01_PCI_CFGADDR_OFS);
/* perform access */ /* perform access */

9
include/msc01.h
View file

@ -71,15 +71,6 @@
#define MSC01_PCI_INTSTAT_MA_SHF 7 #define MSC01_PCI_INTSTAT_MA_SHF 7
#define MSC01_PCI_INTSTAT_MA_MSK (0x1 << MSC01_PCI_INTSTAT_MA_SHF) #define MSC01_PCI_INTSTAT_MA_MSK (0x1 << MSC01_PCI_INTSTAT_MA_SHF)
#define MSC01_PCI_CFGADDR_BNUM_SHF 16
#define MSC01_PCI_CFGADDR_BNUM_MSK (0xff << MSC01_PCI_CFGADDR_BNUM_SHF)
#define MSC01_PCI_CFGADDR_DNUM_SHF 11
#define MSC01_PCI_CFGADDR_DNUM_MSK (0x1f << MSC01_PCI_CFGADDR_DNUM_SHF)
#define MSC01_PCI_CFGADDR_FNUM_SHF 8
#define MSC01_PCI_CFGADDR_FNUM_MSK (0x3 << MSC01_PCI_CFGADDR_FNUM_SHF)
#define MSC01_PCI_CFGADDR_RNUM_SHF 2
#define MSC01_PCI_CFGADDR_RNUM_MSK (0x3f << MSC01_PCI_CFGADDR_RNUM_SHF)
#define MSC01_PCI_HEAD0_VENDORID_SHF 0 #define MSC01_PCI_HEAD0_VENDORID_SHF 0
#define MSC01_PCI_HEAD0_DEVICEID_SHF 16 #define MSC01_PCI_HEAD0_DEVICEID_SHF 16