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microblaze: cache: improve dcache Kconfig options

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Replace CONFIG_DCACHE with a Kconfig option more limited in scope -
XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports
the "wdc" (Write to Data Cache) instruction. It will be used to guard
"wdc" invocations in microblaze cache code.

Also, drop all ifdefs around flush_cache() calls and only keep one
CONFIG_IS_ENABLED() guard within flush_cache() itself.

Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
This commit is contained in:
Ovidiu Panait 2022-05-31 21:14:26 +03:00 committed by Michal Simek
parent 0ad71dc53a
commit ef0a592ae8
4 changed files with 21 additions and 11 deletions
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4
arch/microblaze/Kconfig
View file

@ -39,10 +39,6 @@ config TARGET_MICROBLAZE_GENERIC
endchoice
config DCACHE
bool "Enable dcache support"
default y
config ICACHE
bool "Enable icache support"
default y

15
arch/microblaze/cpu/cache.c
View file

@ -49,26 +49,31 @@ void dcache_enable(void)
void dcache_disable(void)
{
#ifdef CONFIG_DCACHE
flush_cache(0, XILINX_DCACHE_BYTE_SIZE);
#endif
MSRCLR(0x80);
}
void flush_cache(ulong addr, ulong size)
{
int i;
for (i = 0; i < size; i += 4)
for (i = 0; i < size; i += 4) {
asm volatile (
#ifdef CONFIG_ICACHE
"wic %0, r0;"
#endif
"nop;"
#ifdef CONFIG_DCACHE
:
: "r" (addr + i)
: "memory");
if (CONFIG_IS_ENABLED(XILINX_MICROBLAZE0_USE_WDC)) {
asm volatile (
"wdc.flush %0, r0;"
#endif
"nop;"
:
: "r" (addr + i)
: "memory");
}
}
}

2
arch/microblaze/lib/bootm.c
View file

@ -57,9 +57,7 @@ static void boot_jump_linux(bootm_headers_t *images, int flag)
"(fake run for tracing)" : "");
bootstage_mark_name(BOOTSTAGE_ID_BOOTM_HANDOFF, "start_kernel");
#ifdef CONFIG_DCACHE
flush_cache(0, XILINX_DCACHE_BYTE_SIZE);
#endif
if (!fake) {
/*

11
board/xilinx/microblaze-generic/Kconfig
View file

@ -63,4 +63,15 @@ config XILINX_MICROBLAZE0_VECTOR_BASE_ADDR
Memory address location of the exception vector table. It is
configurable via the C_BASE_VECTORS hdl parameter.
config XILINX_MICROBLAZE0_USE_WDC
bool "MicroBlaze wdc instruction support"
default y
help
Enable this option if the MicroBlaze processor is configured with
support for the "wdc" (Write to Data Cache) instruction.
config SPL_XILINX_MICROBLAZE0_USE_WDC
bool
default XILINX_MICROBLAZE0_USE_WDC
endif