mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-09-21 07:01:57 +00:00
mp2usb: remove board support
this board was cancelled long time ago so remove it as it won't be maintained anymore Signed-off-by: Eric Bnard <eric@eukrea.com>
This commit is contained in:
Eric Bénard
Wolfgang Denk
parent
91a3c14cd0
commit
ee986e2a7d
5 changed files with 0 additions and 945 deletions
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@ -1,50 +0,0 @@
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#
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# (C) Copyright 2003-2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk
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LIB = $(obj)lib$(BOARD).o
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COBJS := mp2usb.o flash.o
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SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS))
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SOBJS := $(addprefix $(obj),$(SOBJS))
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$(LIB): $(obj).depend $(OBJS)
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$(call cmd_link_o_target, $(OBJS))
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clean:
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rm -f $(SOBJS) $(OBJS)
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distclean: clean
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rm -f $(LIB) core *.bak $(obj).depend
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#########################################################################
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk
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sinclude $(obj).depend
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#########################################################################
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@ -1,3 +0,0 @@
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CONFIG_SYS_TEXT_BASE = 0x27F00000
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## For testing: load at 0x20100000 and "go" at 0x201000A4
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#CONFIG_SYS_TEXT_BASE = 0x20100000
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@ -1,552 +0,0 @@
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/*
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* (C) Copyright 2001
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* Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
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*
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* (C) Copyright 2001
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* Modified for the MP2USB by (C) Copyright 2005 Eric Benard
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* ebenard@eukrea.com
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <linux/byteorder/swab.h>
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#define CONFIG_SYS_MAX_FLASH_BANKS 1
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#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors (x1) */
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flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
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#define FLASH_PORT_WIDTH ushort
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#define FLASH_PORT_WIDTHV vu_short
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#define SWAP(x) __swab16(x)
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#define FPW FLASH_PORT_WIDTH
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#define FPWV FLASH_PORT_WIDTHV
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#define mb() __asm__ __volatile__ ("" : : : "memory")
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/* Intel-compatible flash commands */
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#define INTEL_PROGRAM 0x00100010
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#define INTEL_ERASE 0x00200020
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#define INTEL_PROG 0x00400040
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#define INTEL_CLEAR 0x00500050
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#define INTEL_LOCKBIT 0x00600060
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#define INTEL_PROTECT 0x00010001
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#define INTEL_STATUS 0x00700070
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#define INTEL_READID 0x00900090
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#define INTEL_SUSPEND 0x00B000B0
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#define INTEL_CONFIRM 0x00D000D0
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#define INTEL_RESET 0xFFFFFFFF
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/* Intel-compatible flash status bits */
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#define INTEL_FINISHED 0x00800080
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#define INTEL_OK 0x00800080
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/*-----------------------------------------------------------------------
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* Functions
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*/
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static ulong flash_get_size (FPW *addr, flash_info_t *info);
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static int write_data (flash_info_t *info, ulong dest, FPW data);
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static void flash_get_offsets (ulong base, flash_info_t *info);
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void inline spin_wheel (void);
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/*-----------------------------------------------------------------------
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*/
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unsigned long flash_init (void)
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{
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int i;
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ulong size = 0;
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for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
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switch (i) {
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case 0:
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flash_get_size ((FPW *) PHYS_FLASH_1, &flash_info[i]);
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flash_get_offsets (PHYS_FLASH_1, &flash_info[i]);
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break;
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default:
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panic ("configured too many flash banks!\n");
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break;
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}
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size += flash_info[i].size;
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}
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/* Protect monitor and environment sectors
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*/
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flash_protect ( FLAG_PROTECT_SET,
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CONFIG_SYS_FLASH_BASE,
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CONFIG_SYS_FLASH_BASE + monitor_flash_len - 1,
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&flash_info[0] );
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flash_protect ( FLAG_PROTECT_SET,
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CONFIG_ENV_ADDR,
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CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[0] );
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return size;
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}
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/*-----------------------------------------------------------------------
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*/
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static void flash_get_offsets (ulong base, flash_info_t *info)
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{
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int i;
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if (info->flash_id == FLASH_UNKNOWN) {
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return;
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}
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if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
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for (i = 0; i < info->sector_count; i++) {
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info->start[i] = base + (i * PHYS_FLASH_SECT_SIZE);
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info->protect[i] = 0;
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}
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}
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}
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/*-----------------------------------------------------------------------
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*/
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void flash_print_info (flash_info_t *info)
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{
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int i;
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if (info->flash_id == FLASH_UNKNOWN) {
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printf ("missing or unknown FLASH type\n");
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return;
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}
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switch (info->flash_id & FLASH_VENDMASK) {
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case FLASH_MAN_INTEL:
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printf ("INTEL ");
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break;
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default:
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printf ("Unknown Vendor ");
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break;
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}
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switch (info->flash_id & FLASH_TYPEMASK) {
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case FLASH_28F640J3A:
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printf ("28F640J3A\n");
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break;
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case FLASH_28F128J3A:
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printf ("28F128J3A\n");
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break;
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default:
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printf ("Unknown Chip Type\n");
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break;
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}
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printf (" Size: %ld MB in %d Sectors\n",
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info->size >> 20, info->sector_count);
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printf (" Sector Start Addresses:");
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for (i = 0; i < info->sector_count; ++i) {
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if ((i % 5) == 0)
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printf ("\n ");
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printf (" %08lX%s",
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info->start[i],
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info->protect[i] ? " (RO)" : " ");
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}
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printf ("\n");
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return;
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}
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/*
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* The following code cannot be run from FLASH!
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*/
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static ulong flash_get_size (FPW *addr, flash_info_t *info)
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{
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volatile FPW value;
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/* Write auto select command: read Manufacturer ID */
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addr[0x5555] = (FPW) 0x00AA00AA;
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addr[0x2AAA] = (FPW) 0x00550055;
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addr[0x5555] = (FPW) 0x00900090;
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mb ();
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value = addr[0];
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switch (value) {
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case (FPW) INTEL_MANUFACT:
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info->flash_id = FLASH_MAN_INTEL;
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break;
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default:
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info->flash_id = FLASH_UNKNOWN;
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info->sector_count = 0;
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info->size = 0;
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addr[0] = (FPW) INTEL_RESET; /* restore read mode */
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return (0); /* no or unknown flash */
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}
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mb ();
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value = addr[1]; /* device ID */
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switch (value) {
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case (FPW) INTEL_ID_28F640J3A:
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info->flash_id += FLASH_28F640J3A;
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info->sector_count = 64;
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info->size = 0x00800000;
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break; /* => 8 MB */
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case (FPW) INTEL_ID_28F128J3A:
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info->flash_id += FLASH_28F128J3A;
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info->sector_count = 128;
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info->size = 0x01000000;
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break; /* => 16 MB */
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default:
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info->flash_id = FLASH_UNKNOWN;
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break;
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}
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if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) {
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printf ("** ERROR: sector count %d > max (%d) **\n",
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info->sector_count, CONFIG_SYS_MAX_FLASH_SECT);
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info->sector_count = CONFIG_SYS_MAX_FLASH_SECT;
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}
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addr[0] = (FPW) INTEL_RESET; /* restore read mode */
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return (info->size);
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}
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/*-----------------------------------------------------------------------
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*/
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int flash_erase (flash_info_t *info, int s_first, int s_last)
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{
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int prot, sect;
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ulong type, start, last;
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int rcode = 0;
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int cflag, iflag;
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if ((s_first < 0) || (s_first > s_last)) {
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if (info->flash_id == FLASH_UNKNOWN) {
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printf ("- missing\n");
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} else {
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printf ("- no sectors to erase\n");
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}
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return 1;
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}
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type = (info->flash_id & FLASH_VENDMASK);
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if ((type != FLASH_MAN_INTEL)) {
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printf ("Can't erase unknown flash type %08lx - aborted\n",
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info->flash_id);
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return 1;
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}
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prot = 0;
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for (sect = s_first; sect <= s_last; ++sect) {
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if (info->protect[sect]) {
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prot++;
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}
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}
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if (prot) {
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printf ("- Warning: %d protected sectors will not be erased!\n",
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prot);
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} else {
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printf ("\n");
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}
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start = get_timer (0);
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last = start;
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/*
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* Disable interrupts which might cause a timeout
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* here. Remember that our exception vectors are
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* at address 0 in the flash, and we don't want a
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* (ticker) exception to happen while the flash
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* chip is in programming mode.
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*/
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cflag = icache_status ();
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icache_disable ();
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/* Disable interrupts which might cause a timeout here */
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iflag = disable_interrupts ();
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/* Start erase on unprotected sectors */
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for (sect = s_first; sect <= s_last; sect++) {
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if (info->protect[sect] == 0) { /* not protected */
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FPWV *addr = (FPWV *) (info->start[sect]);
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FPW status;
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printf ("Erasing sector %2d ... ", sect);
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/* arm simple, non interrupt dependent timer */
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reset_timer_masked ();
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*addr = (FPW) INTEL_CLEAR; /* clear status register */
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*addr = (FPW) INTEL_ERASE; /* erase setup */
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*addr = (FPW) INTEL_CONFIRM; /* erase confirm */
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while (((status = *addr) & (FPW) INTEL_FINISHED) != (FPW) INTEL_FINISHED) {
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if (get_timer_masked () > CONFIG_SYS_FLASH_ERASE_TOUT) {
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printf ("Timeout\n");
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*addr = (FPW) INTEL_SUSPEND; /* suspend erase */
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*addr = (FPW) INTEL_RESET; /* reset to read mode */
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rcode = 1;
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break;
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}
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||||||
}
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||||||
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*addr = (FPWV)INTEL_CLEAR; /* clear status register cmd. */
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*addr = (FPWV)INTEL_RESET; /* resest to read mode */
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printf (" done\n");
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}
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}
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if (iflag)
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enable_interrupts ();
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if (cflag)
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icache_enable ();
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return rcode;
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}
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/*-----------------------------------------------------------------------
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* Copy memory to flash, returns:
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* 0 - OK
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* 1 - write timeout
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||||||
* 2 - Flash not erased
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* 4 - Flash not identified
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*/
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int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
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|
||||||
{
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ulong cp, wp;
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FPW data;
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||||||
int count, i, l, rc, port_width;
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||||||
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if (info->flash_id == FLASH_UNKNOWN) {
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return 4;
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}
|
|
||||||
|
|
||||||
/* get lower word aligned address */
|
|
||||||
wp = (addr & ~1);
|
|
||||||
port_width = 2;
|
|
||||||
|
|
||||||
/*
|
|
||||||
* handle unaligned start bytes
|
|
||||||
*/
|
|
||||||
if ((l = addr - wp) != 0) {
|
|
||||||
data = 0;
|
|
||||||
for (i = 0, cp = wp; i < l; ++i, ++cp) {
|
|
||||||
data = (data << 8) | (*(uchar *) cp);
|
|
||||||
}
|
|
||||||
for (; i < port_width && cnt > 0; ++i) {
|
|
||||||
data = (data << 8) | *src++;
|
|
||||||
--cnt;
|
|
||||||
++cp;
|
|
||||||
}
|
|
||||||
for (; cnt == 0 && i < port_width; ++i, ++cp) {
|
|
||||||
data = (data << 8) | (*(uchar *) cp);
|
|
||||||
}
|
|
||||||
|
|
||||||
if ((rc = write_data (info, wp, SWAP (data))) != 0) {
|
|
||||||
return (rc);
|
|
||||||
}
|
|
||||||
wp += port_width;
|
|
||||||
}
|
|
||||||
|
|
||||||
/*
|
|
||||||
* handle word aligned part
|
|
||||||
*/
|
|
||||||
count = 0;
|
|
||||||
while (cnt >= port_width) {
|
|
||||||
data = 0;
|
|
||||||
for (i = 0; i < port_width; ++i) {
|
|
||||||
data = (data << 8) | *src++;
|
|
||||||
}
|
|
||||||
if ((rc = write_data (info, wp, SWAP (data))) != 0) {
|
|
||||||
return (rc);
|
|
||||||
}
|
|
||||||
wp += port_width;
|
|
||||||
cnt -= port_width;
|
|
||||||
if (count++ > 0x800) {
|
|
||||||
spin_wheel ();
|
|
||||||
count = 0;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
if (cnt == 0) {
|
|
||||||
return (0);
|
|
||||||
}
|
|
||||||
|
|
||||||
/*
|
|
||||||
* handle unaligned tail bytes
|
|
||||||
*/
|
|
||||||
data = 0;
|
|
||||||
for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) {
|
|
||||||
data = (data << 8) | *src++;
|
|
||||||
--cnt;
|
|
||||||
}
|
|
||||||
for (; i < port_width; ++i, ++cp) {
|
|
||||||
data = (data << 8) | (*(uchar *) cp);
|
|
||||||
}
|
|
||||||
|
|
||||||
return (write_data (info, wp, SWAP (data)));
|
|
||||||
}
|
|
||||||
|
|
||||||
/*-----------------------------------------------------------------------
|
|
||||||
* Write a word or halfword to Flash, returns:
|
|
||||||
* 0 - OK
|
|
||||||
* 1 - write timeout
|
|
||||||
* 2 - Flash not erased
|
|
||||||
*/
|
|
||||||
static int write_data (flash_info_t *info, ulong dest, FPW data)
|
|
||||||
{
|
|
||||||
FPWV *addr = (FPWV *) dest;
|
|
||||||
ulong status;
|
|
||||||
int cflag, iflag;
|
|
||||||
|
|
||||||
/* Check if Flash is (sufficiently) erased */
|
|
||||||
if ((*addr & data) != data) {
|
|
||||||
printf ("not erased at %08lx (%lx)\n", (ulong) addr, (ulong) *addr);
|
|
||||||
return (2);
|
|
||||||
}
|
|
||||||
/*
|
|
||||||
* Disable interrupts which might cause a timeout
|
|
||||||
* here. Remember that our exception vectors are
|
|
||||||
* at address 0 in the flash, and we don't want a
|
|
||||||
* (ticker) exception to happen while the flash
|
|
||||||
* chip is in programming mode.
|
|
||||||
*/
|
|
||||||
cflag = icache_status ();
|
|
||||||
icache_disable ();
|
|
||||||
/* Disable interrupts which might cause a timeout here */
|
|
||||||
iflag = disable_interrupts ();
|
|
||||||
|
|
||||||
*addr = (FPW) INTEL_PROG; /* write setup */
|
|
||||||
*addr = data;
|
|
||||||
|
|
||||||
/* arm simple, non interrupt dependent timer */
|
|
||||||
reset_timer_masked ();
|
|
||||||
|
|
||||||
/* wait while polling the status register */
|
|
||||||
while (((status = *addr) & (FPW) INTEL_FINISHED) != (FPW) INTEL_FINISHED) {
|
|
||||||
if (get_timer_masked () > CONFIG_SYS_FLASH_WRITE_TOUT) {
|
|
||||||
*addr = (FPW) INTEL_RESET; /* restore read mode */
|
|
||||||
return (1);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
*addr = (FPW) INTEL_RESET; /* restore read mode */
|
|
||||||
|
|
||||||
if (iflag)
|
|
||||||
enable_interrupts ();
|
|
||||||
|
|
||||||
if (cflag)
|
|
||||||
icache_enable ();
|
|
||||||
|
|
||||||
return (0);
|
|
||||||
}
|
|
||||||
|
|
||||||
void inline spin_wheel (void)
|
|
||||||
{
|
|
||||||
static int p = 0;
|
|
||||||
static char w[] = "\\/-";
|
|
||||||
|
|
||||||
printf ("\010%c", w[p]);
|
|
||||||
(++p == 3) ? (p = 0) : 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
/*-----------------------------------------------------------------------
|
|
||||||
* Set/Clear sector's lock bit, returns:
|
|
||||||
* 0 - OK
|
|
||||||
* 1 - Error (timeout, voltage problems, etc.)
|
|
||||||
*/
|
|
||||||
int flash_real_protect(flash_info_t *info, long sector, int prot)
|
|
||||||
{
|
|
||||||
int i;
|
|
||||||
int rc = 0;
|
|
||||||
FPWV *addr = (FPWV *)(info->start[sector]);
|
|
||||||
int flag = disable_interrupts();
|
|
||||||
|
|
||||||
*addr = (FPW) INTEL_CLEAR; /* Clear status register */
|
|
||||||
if (prot) { /* Set sector lock bit */
|
|
||||||
*addr = (FPW) INTEL_LOCKBIT; /* Sector lock bit */
|
|
||||||
*addr = (FPW) INTEL_PROTECT; /* set */
|
|
||||||
}
|
|
||||||
else { /* Clear sector lock bit */
|
|
||||||
*addr = (FPW) INTEL_LOCKBIT; /* All sectors lock bits */
|
|
||||||
*addr = (FPW) INTEL_CONFIRM; /* clear */
|
|
||||||
}
|
|
||||||
|
|
||||||
reset_timer_masked ();
|
|
||||||
|
|
||||||
while ((*addr & (FPW) INTEL_FINISHED) != (FPW) INTEL_FINISHED) {
|
|
||||||
if (get_timer_masked () > CONFIG_SYS_FLASH_UNLOCK_TOUT) {
|
|
||||||
printf("Flash lock bit operation timed out\n");
|
|
||||||
rc = 1;
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
if (*addr != (FPW) INTEL_OK) {
|
|
||||||
printf("Flash lock bit operation failed at %08X, CSR=%08X\n",
|
|
||||||
(uint)addr, (uint)*addr);
|
|
||||||
rc = 1;
|
|
||||||
}
|
|
||||||
|
|
||||||
if (!rc)
|
|
||||||
info->protect[sector] = prot;
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Clear lock bit command clears all sectors lock bits, so
|
|
||||||
* we have to restore lock bits of protected sectors.
|
|
||||||
*/
|
|
||||||
if (!prot)
|
|
||||||
{
|
|
||||||
for (i = 0; i < info->sector_count; i++)
|
|
||||||
{
|
|
||||||
if (info->protect[i])
|
|
||||||
{
|
|
||||||
reset_timer_masked ();
|
|
||||||
addr = (FPWV *) (info->start[i]);
|
|
||||||
*addr = (FPW) INTEL_LOCKBIT; /* Sector lock bit */
|
|
||||||
*addr = (FPW) INTEL_PROTECT; /* set */
|
|
||||||
while ((*addr & (FPW) INTEL_FINISHED) != (FPW) INTEL_FINISHED)
|
|
||||||
{
|
|
||||||
if (get_timer_masked () > CONFIG_SYS_FLASH_UNLOCK_TOUT)
|
|
||||||
{
|
|
||||||
printf("Flash lock bit operation timed out\n");
|
|
||||||
rc = 1;
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
if (flag)
|
|
||||||
enable_interrupts();
|
|
||||||
|
|
||||||
*addr = (FPW) INTEL_RESET; /* Reset to read array mode */
|
|
||||||
|
|
||||||
return rc;
|
|
||||||
}
|
|
||||||
|
|
@ -1,98 +0,0 @@
|
||||||
/*
|
|
||||||
* (C) Copyright 2002
|
|
||||||
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
|
|
||||||
* Marius Groeger <mgroeger@sysgo.de>
|
|
||||||
*
|
|
||||||
* Modified for the MP2USB by (C) Copyright 2005 Eric Benard
|
|
||||||
* ebenard@eukrea.com
|
|
||||||
*
|
|
||||||
* See file CREDITS for list of people who contributed to this
|
|
||||||
* project.
|
|
||||||
*
|
|
||||||
* This program is free software; you can redistribute it and/or
|
|
||||||
* modify it under the terms of the GNU General Public License as
|
|
||||||
* published by the Free Software Foundation; either version 2 of
|
|
||||||
* the License, or (at your option) any later version.
|
|
||||||
*
|
|
||||||
* This program is distributed in the hope that it will be useful,
|
|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
||||||
* GNU General Public License for more details.
|
|
||||||
*
|
|
||||||
* You should have received a copy of the GNU General Public License
|
|
||||||
* along with this program; if not, write to the Free Software
|
|
||||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
|
||||||
* MA 02111-1307 USA
|
|
||||||
*/
|
|
||||||
|
|
||||||
#include <common.h>
|
|
||||||
#include <asm/arch/AT91RM9200.h>
|
|
||||||
#include <netdev.h>
|
|
||||||
#include <asm/io.h>
|
|
||||||
#if defined(CONFIG_DRIVER_ETHER)
|
|
||||||
#include <at91rm9200_net.h>
|
|
||||||
#include <dm9161.h>
|
|
||||||
#endif
|
|
||||||
#include <asm/mach-types.h>
|
|
||||||
|
|
||||||
DECLARE_GLOBAL_DATA_PTR;
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Miscelaneous platform dependent initialisations
|
|
||||||
*/
|
|
||||||
|
|
||||||
int board_init (void)
|
|
||||||
{
|
|
||||||
/* Enable Ctrlc */
|
|
||||||
console_init_f ();
|
|
||||||
|
|
||||||
/* memory and cpu-speed are setup before relocation */
|
|
||||||
/* so we do _nothing_ here */
|
|
||||||
|
|
||||||
/* arch number of MP2USB-Board. */
|
|
||||||
gd->bd->bi_arch_number = MACH_TYPE_MP2USB;
|
|
||||||
/* adress of boot parameters */
|
|
||||||
gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
int dram_init (void)
|
|
||||||
{
|
|
||||||
gd->bd->bi_dram[0].start = PHYS_SDRAM;
|
|
||||||
gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
#ifdef CONFIG_DRIVER_ETHER
|
|
||||||
#if defined(CONFIG_CMD_NET)
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Name:
|
|
||||||
* at91rm9200_GetPhyInterface
|
|
||||||
* Description:
|
|
||||||
* Initialise the interface functions to the PHY
|
|
||||||
* Arguments:
|
|
||||||
* None
|
|
||||||
* Return value:
|
|
||||||
* None
|
|
||||||
*/
|
|
||||||
void at91rm9200_GetPhyInterface(AT91PS_PhyOps p_phyops)
|
|
||||||
{
|
|
||||||
p_phyops->Init = dm9161_InitPhy;
|
|
||||||
p_phyops->IsPhyConnected = dm9161_IsPhyConnected;
|
|
||||||
p_phyops->GetLinkSpeed = dm9161_GetLinkSpeed;
|
|
||||||
p_phyops->AutoNegotiate = dm9161_AutoNegotiate;
|
|
||||||
}
|
|
||||||
|
|
||||||
#endif
|
|
||||||
#endif /* CONFIG_DRIVER_ETHER */
|
|
||||||
|
|
||||||
#ifdef CONFIG_DRIVER_AT91EMAC
|
|
||||||
int board_eth_init(bd_t *bis)
|
|
||||||
{
|
|
||||||
int rc = 0;
|
|
||||||
rc = at91emac_register(bis, 0);
|
|
||||||
return rc;
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
|
|
@ -1,242 +0,0 @@
|
||||||
/*
|
|
||||||
* 2004-2005 Gary Jennejohn <garyj@denx.de>
|
|
||||||
*
|
|
||||||
* Modified for the MP2USB by (C) Copyright 2005 Eric Benard
|
|
||||||
* ebenard@eukrea.com
|
|
||||||
*
|
|
||||||
* Configuration settings for the MP2USB board.
|
|
||||||
*
|
|
||||||
* See file CREDITS for list of people who contributed to this
|
|
||||||
* project.
|
|
||||||
*
|
|
||||||
* This program is free software; you can redistribute it and/or
|
|
||||||
* modify it under the terms of the GNU General Public License as
|
|
||||||
* published by the Free Software Foundation; either version 2 of
|
|
||||||
* the License, or (at your option) any later version.
|
|
||||||
*
|
|
||||||
* This program is distributed in the hope that it will be useful,
|
|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
||||||
* GNU General Public License for more details.
|
|
||||||
*
|
|
||||||
* You should have received a copy of the GNU General Public License
|
|
||||||
* along with this program; if not, write to the Free Software
|
|
||||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
|
||||||
* MA 02111-1307 USA
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef __CONFIG_H
|
|
||||||
#define __CONFIG_H
|
|
||||||
|
|
||||||
#define CONFIG_AT91_LEGACY
|
|
||||||
|
|
||||||
/* ARM asynchronous clock */
|
|
||||||
#define AT91C_MAIN_CLOCK 179712000 /* from 18.432 MHz crystal (18432000 / 4 * 45) */
|
|
||||||
#define AT91C_MASTER_CLOCK (AT91C_MAIN_CLOCK/3) /* peripheral clock */
|
|
||||||
|
|
||||||
#define AT91_SLOW_CLOCK 32768 /* slow clock */
|
|
||||||
|
|
||||||
#define CONFIG_ARM920T 1 /* This is an ARM920T Core */
|
|
||||||
#define CONFIG_AT91RM9200 1 /* It's an Atmel AT91RM9200 SoC */
|
|
||||||
#define CONFIG_AT91RM9200DK 1 /* on an AT91RM9200DK Board */
|
|
||||||
#define CONFIG_MP2USB 1 /* on an MP2USB Board */
|
|
||||||
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
|
|
||||||
#define USE_920T_MMU 1
|
|
||||||
|
|
||||||
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
|
|
||||||
#define CONFIG_SETUP_MEMORY_TAGS 1
|
|
||||||
#define CONFIG_INITRD_TAG 1
|
|
||||||
|
|
||||||
#define CONFIG_SYS_ATMEL_PLL_INIT_BUG 1
|
|
||||||
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
|
|
||||||
#define CONFIG_SYS_USE_MAIN_OSCILLATOR 1
|
|
||||||
/* flash */
|
|
||||||
#define CONFIG_SYS_EBI_CFGR_VAL 0x00000000
|
|
||||||
#define CONFIG_SYS_SMC_CSR0_VAL 0x00003084 /* 16bit, 2 TDF, 4 WS */
|
|
||||||
|
|
||||||
/* clocks */
|
|
||||||
#define CONFIG_SYS_PLLAR_VAL 0x20263E04 /* 180 MHz for PCK */
|
|
||||||
#define CONFIG_SYS_PLLBR_VAL 0x1048bE0E /* 48 MHz (divider by 2 for USB) */
|
|
||||||
#define CONFIG_SYS_MCKR_VAL 0x00000202 /* PCK/3 = MCK Master Clock = 60MHz from PLLA */
|
|
||||||
|
|
||||||
/* sdram */
|
|
||||||
#define CONFIG_SYS_PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as peripheral (D16/D31) */
|
|
||||||
#define CONFIG_SYS_PIOC_BSR_VAL 0x00000000
|
|
||||||
#define CONFIG_SYS_PIOC_PDR_VAL 0xFFFF0000
|
|
||||||
#define CONFIG_SYS_EBI_CSA_VAL 0x00000002 /* CS1=CONFIG_SYS_SDRAM */
|
|
||||||
#define CONFIG_SYS_SDRC_CR_VAL 0x3211295A /* set up the CONFIG_SYS_SDRAM */
|
|
||||||
#define CONFIG_SYS_SDRAM 0x20000000 /* address of the CONFIG_SYS_SDRAM */
|
|
||||||
#define CONFIG_SYS_SDRAM1 0x20000020 /* address of the CONFIG_SYS_SDRAM */
|
|
||||||
#define CONFIG_SYS_SDRAM_VAL 0x00000000 /* value written to CONFIG_SYS_SDRAM */
|
|
||||||
#define CONFIG_SYS_SDRC_MR_VAL 0x00000002 /* Precharge All */
|
|
||||||
#define CONFIG_SYS_SDRC_MR_VAL1 0x00000004 /* refresh */
|
|
||||||
#define CONFIG_SYS_SDRC_MR_VAL2 0x00000003 /* Load Mode Register */
|
|
||||||
#define CONFIG_SYS_SDRC_MR_VAL3 0x00000000 /* Normal Mode */
|
|
||||||
#define CONFIG_SYS_SDRC_TR_VAL 0x000002E0 /* Write refresh rate */
|
|
||||||
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Size of malloc() pool
|
|
||||||
*/
|
|
||||||
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
|
|
||||||
|
|
||||||
#define CONFIG_BAUDRATE 115200
|
|
||||||
|
|
||||||
#define CONFIG_SYS_AT91C_BRGR_DIVISOR 33 /* hardcode so no __divsi3 : AT91C_MASTER_CLOCK /(baudrate * 16) */
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Hardware drivers
|
|
||||||
*/
|
|
||||||
|
|
||||||
/* define one of these to choose the DBGU, USART0 or USART1 as console */
|
|
||||||
#define CONFIG_AT91RM9200_USART
|
|
||||||
#define CONFIG_DBGU
|
|
||||||
#undef CONFIG_USART0
|
|
||||||
#undef CONFIG_USART1
|
|
||||||
|
|
||||||
#undef CONFIG_HWFLOW /* don't include RTS/CTS flow control support */
|
|
||||||
|
|
||||||
#undef CONFIG_MODEM_SUPPORT /* disable modem initialization stuff */
|
|
||||||
|
|
||||||
#define CONFIG_USB_OHCI_NEW 1
|
|
||||||
#define CONFIG_USB_KEYBOARD 1
|
|
||||||
#define CONFIG_USB_STORAGE 1
|
|
||||||
#define CONFIG_DOS_PARTITION 1
|
|
||||||
#define CONFIG_AT91C_PQFP_UHPBUG 1
|
|
||||||
|
|
||||||
#undef CONFIG_SYS_USB_OHCI_BOARD_INIT
|
|
||||||
#define CONFIG_SYS_USB_OHCI_CPU_INIT 1
|
|
||||||
#define CONFIG_SYS_USB_OHCI_REGS_BASE AT91_USB_HOST_BASE
|
|
||||||
#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91rm9200"
|
|
||||||
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15
|
|
||||||
|
|
||||||
#undef CONFIG_HARD_I2C
|
|
||||||
|
|
||||||
#ifdef CONFIG_HARD_I2C
|
|
||||||
#define CONFIG_SYS_I2C_SPEED 0 /* not used */
|
|
||||||
#define CONFIG_SYS_I2C_SLAVE 0 /* not used */
|
|
||||||
#define CONFIG_RTC_RS5C372A /* RICOH I2C RTC */
|
|
||||||
#define CONFIG_SYS_I2C_RTC_ADDR 0x32
|
|
||||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
|
|
||||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
|
|
||||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
|
|
||||||
#endif
|
|
||||||
/* still about 20 kB free with this defined */
|
|
||||||
#define CONFIG_SYS_LONGHELP
|
|
||||||
|
|
||||||
#define CONFIG_BOOTDELAY 3
|
|
||||||
|
|
||||||
#if !defined(CONFIG_HARD_I2C)
|
|
||||||
#define CONFIG_TIMESTAMP
|
|
||||||
#endif
|
|
||||||
|
|
||||||
|
|
||||||
/*
|
|
||||||
* BOOTP options
|
|
||||||
*/
|
|
||||||
#define CONFIG_BOOTP_BOOTFILESIZE
|
|
||||||
#define CONFIG_BOOTP_BOOTPATH
|
|
||||||
#define CONFIG_BOOTP_GATEWAY
|
|
||||||
#define CONFIG_BOOTP_HOSTNAME
|
|
||||||
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Command line configuration.
|
|
||||||
*/
|
|
||||||
#include <config_cmd_default.h>
|
|
||||||
|
|
||||||
#define CONFIG_CMD_DHCP
|
|
||||||
#define CONFIG_CMD_NFS
|
|
||||||
#define CONFIG_CMD_SNTP
|
|
||||||
|
|
||||||
#if defined(CONFIG_HARD_I2C)
|
|
||||||
|
|
||||||
#define CONFIG_CMD_DATE
|
|
||||||
#define CONFIG_CMD_EEPROM
|
|
||||||
#define CONFIG_CMD_I2C
|
|
||||||
#define CONFIG_CMD_MISC
|
|
||||||
|
|
||||||
#else
|
|
||||||
|
|
||||||
#define CONFIG_CMD_CACHE
|
|
||||||
#define CONFIG_CMD_USB
|
|
||||||
|
|
||||||
#undef CONFIG_CMD_BDI
|
|
||||||
#undef CONFIG_CMD_FPGA
|
|
||||||
#undef CONFIG_CMD_IMI
|
|
||||||
#undef CONFIG_CMD_LOADS
|
|
||||||
#undef CONFIG_CMD_MISC
|
|
||||||
#undef CONFIG_CMD_SOURCE
|
|
||||||
|
|
||||||
#endif
|
|
||||||
|
|
||||||
|
|
||||||
#define CONFIG_SYS_LONGHELP
|
|
||||||
|
|
||||||
#define CONFIG_NR_DRAM_BANKS 1
|
|
||||||
#define PHYS_SDRAM 0x20000000
|
|
||||||
#define PHYS_SDRAM_SIZE 0x08000000 /* 128 megs */
|
|
||||||
|
|
||||||
#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
|
|
||||||
#define CONFIG_SYS_MEMTEST_END CONFIG_SYS_MEMTEST_START + PHYS_SDRAM_SIZE - 262144
|
|
||||||
|
|
||||||
#define CONFIG_NET_MULTI 1
|
|
||||||
#ifdef CONFIG_NET_MULTI
|
|
||||||
#define CONFIG_DRIVER_AT91EMAC 1
|
|
||||||
#define CONFIG_SYS_RX_ETH_BUFFER 8
|
|
||||||
#else
|
|
||||||
#define CONFIG_DRIVER_ETHER 1
|
|
||||||
#endif
|
|
||||||
#define CONFIG_NET_RETRY_COUNT 20
|
|
||||||
#undef CONFIG_AT91C_USE_RMII
|
|
||||||
|
|
||||||
#define PHYS_FLASH_1 0x10000000
|
|
||||||
#define PHYS_FLASH_SIZE 0x1000000 /* 16 megs main flash */
|
|
||||||
#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
|
|
||||||
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
|
|
||||||
#define CONFIG_SYS_MAX_FLASH_BANKS 1
|
|
||||||
#define CONFIG_SYS_MAX_FLASH_SECT 256
|
|
||||||
#define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Timeout for Flash Erase */
|
|
||||||
#define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Timeout for Flash Write */
|
|
||||||
#define CONFIG_SYS_FLASH_LOCK_TOUT (10*CONFIG_SYS_HZ) /* Timeout for Flash Set Lock Bit */
|
|
||||||
#define CONFIG_SYS_FLASH_UNLOCK_TOUT (10*CONFIG_SYS_HZ) /* Timeout for Flash Clear Lock Bits */
|
|
||||||
#define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
|
|
||||||
|
|
||||||
#define CONFIG_ENV_IS_IN_FLASH 1
|
|
||||||
#define CONFIG_ENV_OFFSET 0x20000 /* after u-boot.bin */
|
|
||||||
#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE+CONFIG_ENV_OFFSET)
|
|
||||||
#define CONFIG_ENV_SIZE 0x20000
|
|
||||||
|
|
||||||
#define CONFIG_SYS_LOAD_ADDR 0x21000000 /* default load address */
|
|
||||||
|
|
||||||
#define CONFIG_SYS_BAUDRATE_TABLE { 115200, 57600, 38400, 19200, 9600 }
|
|
||||||
|
|
||||||
#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
|
|
||||||
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
|
|
||||||
#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
|
|
||||||
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
|
|
||||||
|
|
||||||
#define CONFIG_SYS_STDIO_DEREGISTER /* needs stdio_deregister */
|
|
||||||
|
|
||||||
#define CONFIG_SYS_HZ 1000
|
|
||||||
#define CONFIG_SYS_HZ_CLOCK (AT91C_MASTER_CLOCK/2) /* AT91C_TC0_CMR is implicitly set to */
|
|
||||||
/* AT91C_TC_TIMER_DIV1_CLOCK */
|
|
||||||
|
|
||||||
#define CONFIG_STACKSIZE (32*1024) /* regular stack */
|
|
||||||
|
|
||||||
#ifdef CONFIG_USE_IRQ
|
|
||||||
#error CONFIG_USE_IRQ not supported
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#define CONFIG_SYS_DEVICE_NULLDEV 1 /* enble null device */
|
|
||||||
#undef CONFIG_SILENT_CONSOLE /* enable silent startup */
|
|
||||||
|
|
||||||
#define CONFIG_AUTOBOOT_KEYED
|
|
||||||
#define CONFIG_AUTOBOOT_PROMPT \
|
|
||||||
"Press SPACE to abort autoboot in %d seconds\n", bootdelay
|
|
||||||
#define CONFIG_AUTOBOOT_STOP_STR " "
|
|
||||||
#define CONFIG_AUTOBOOT_DELAY_STR "d"
|
|
||||||
|
|
||||||
#define CONFIG_VERSION_VARIABLE 1 /* include version env variable */
|
|
||||||
|
|
||||||
#endif /* __CONFIG_H */
|
|
||||||
Loading…
Reference in a new issue