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imx6: iomux: Add generic function to set RGMII IO voltage on IMX6 SoCs
This commit provides generic function to set the RGMII/HSIC IO voltage level on iMX6 devices. Signed-off-by: Lukasz Majewski <lukma@denx.de>
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2 changed files with 24 additions and 0 deletions
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@ -178,4 +178,17 @@
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|IOMUXC_GPR13_SATA_PHY_3_MASK \
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|IOMUXC_GPR13_SATA_PHY_2_MASK \
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|IOMUXC_GPR13_SATA_PHY_1_MASK)
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/*
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* Setup RGMII voltage levels on iMX6 SoC - the
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*
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* IOMUXC_SW_PAD_CTL_GRP_DDR_TYPE_RGMII - register
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*
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* 1P2V_IO - USB_HSIC, MIPI_HSI
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* 1P5V_IO - ENET pins
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*/
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#define IOMUXC_SW_PAD_CTL_GRP_DDR_TYPE_RGMII 0x020e0790
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#define DDR_SEL_1P2V_IO (0x2 << 18)
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#define DDR_SEL_1P5V_IO (0x3 << 18)
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#endif /* __ASM_ARCH_IOMUX_H__ */
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@ -6,6 +6,7 @@
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*/
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#include <asm/mach-imx/sys_proto.h>
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#include <asm/arch/iomux.h>
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#define USBPHY_PWD 0x00000000
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@ -16,3 +17,13 @@
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int imx6_pcie_toggle_power(void);
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int imx6_pcie_toggle_reset(void);
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/**
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* iomuxc_set_rgmii_io_voltage - set voltage level of RGMII/USB pins
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*
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* @param io_vol - the voltage IO level of pins
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*/
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static inline void iomuxc_set_rgmii_io_voltage(int io_vol)
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{
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__raw_writel(io_vol, IOMUXC_SW_PAD_CTL_GRP_DDR_TYPE_RGMII);
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}
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