powerpc: dts: add QorIQ DPAA 1 FMan v3 device tree nodes

Add the QorIQ DPAA Frame Manager version 3 device tree nodes
description. The device tree fragments are copied over with little
modification from the Linux kernel source code.

Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This commit is contained in:
Madalin Bucur 2020-04-30 16:00:03 +03:00 committed by Priyanka Jain
parent 37fa0b07b4
commit eb3c194c40
21 changed files with 1026 additions and 0 deletions

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// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
* QorIQ FMan v3 1g port #0 device tree stub [ controller @ offset 0x400000 ]
*
* Copyright 2012 - 2015 Freescale Semiconductor Inc.
* Copyright 2020 NXP
*
*/
fman@400000 {
fman0_rx_0x08: port@88000 {
cell-index = <0x8>;
compatible = "fsl,fman-v3-port-rx";
reg = <0x88000 0x1000>;
fsl,fman-10g-port;
fsl,fman-best-effort-port;
};
fman0_tx_0x28: port@a8000 {
cell-index = <0x28>;
compatible = "fsl,fman-v3-port-tx";
reg = <0xa8000 0x1000>;
fsl,fman-10g-port;
fsl,fman-best-effort-port;
};
ethernet@e0000 {
cell-index = <0>;
compatible = "fsl,fman-memac";
reg = <0xe0000 0x1000>;
fsl,fman-ports = <&fman0_rx_0x08 &fman0_tx_0x28>;
ptp-timer = <&ptp_timer0>;
pcsphy-handle = <&pcsphy0>;
};
mdio@e1000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
reg = <0xe1000 0x1000>;
fsl,erratum-a011043; /* must ignore read errors */
pcsphy0: ethernet-phy@0 {
reg = <0x0>;
};
};
};

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// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
* QorIQ FMan v3 10g port #0 device tree stub [ controller @ offset 0x400000 ]
*
* Copyright 2012 - 2015 Freescale Semiconductor Inc.
* Copyright 2020 NXP
*
*/
fman@400000 {
fman0_rx_0x10: port@90000 {
cell-index = <0x10>;
compatible = "fsl,fman-v3-port-rx";
reg = <0x90000 0x1000>;
fsl,fman-10g-port;
};
fman0_tx_0x30: port@b0000 {
cell-index = <0x30>;
compatible = "fsl,fman-v3-port-tx";
reg = <0xb0000 0x1000>;
fsl,fman-10g-port;
};
ethernet@f0000 {
cell-index = <0x8>;
compatible = "fsl,fman-memac";
reg = <0xf0000 0x1000>;
fsl,fman-ports = <&fman0_rx_0x10 &fman0_tx_0x30>;
pcsphy-handle = <&pcsphy6>;
};
mdio@f1000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
reg = <0xf1000 0x1000>;
fsl,erratum-a011043; /* must ignore read errors */
pcsphy6: ethernet-phy@0 {
reg = <0x0>;
};
};
};

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// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
* QorIQ FMan v3 1g port #1 device tree stub [ controller @ offset 0x400000 ]
*
* Copyright 2012 - 2015 Freescale Semiconductor Inc.
* Copyright 2020 NXP
*
*/
fman@400000 {
fman0_rx_0x09: port@89000 {
cell-index = <0x9>;
compatible = "fsl,fman-v3-port-rx";
reg = <0x89000 0x1000>;
fsl,fman-10g-port;
fsl,fman-best-effort-port;
};
fman0_tx_0x29: port@a9000 {
cell-index = <0x29>;
compatible = "fsl,fman-v3-port-tx";
reg = <0xa9000 0x1000>;
fsl,fman-10g-port;
fsl,fman-best-effort-port;
};
ethernet@e2000 {
cell-index = <1>;
compatible = "fsl,fman-memac";
reg = <0xe2000 0x1000>;
fsl,fman-ports = <&fman0_rx_0x09 &fman0_tx_0x29>;
ptp-timer = <&ptp_timer0>;
pcsphy-handle = <&pcsphy1>;
};
mdio@e3000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
reg = <0xe3000 0x1000>;
fsl,erratum-a011043; /* must ignore read errors */
pcsphy1: ethernet-phy@0 {
reg = <0x0>;
};
};
};

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// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
* QorIQ FMan v3 10g port #1 device tree stub [ controller @ offset 0x400000 ]
*
* Copyright 2012 - 2015 Freescale Semiconductor Inc.
* Copyright 2020 NXP
*
*/
fman@400000 {
fman0_rx_0x11: port@91000 {
cell-index = <0x11>;
compatible = "fsl,fman-v3-port-rx";
reg = <0x91000 0x1000>;
fsl,fman-10g-port;
};
fman0_tx_0x31: port@b1000 {
cell-index = <0x31>;
compatible = "fsl,fman-v3-port-tx";
reg = <0xb1000 0x1000>;
fsl,fman-10g-port;
};
ethernet@f2000 {
cell-index = <0x9>;
compatible = "fsl,fman-memac";
reg = <0xf2000 0x1000>;
fsl,fman-ports = <&fman0_rx_0x11 &fman0_tx_0x31>;
pcsphy-handle = <&pcsphy7>;
};
mdio@f3000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
reg = <0xf3000 0x1000>;
fsl,erratum-a011043; /* must ignore read errors */
pcsphy7: ethernet-phy@0 {
reg = <0x0>;
};
};
};

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// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
* QorIQ FMan v3 1g port #0 device tree stub [ controller @ offset 0x400000 ]
*
* Copyright 2012 - 2015 Freescale Semiconductor Inc.
* Copyright 2020 NXP
*
*/
fman@400000 {
fman0_rx_0x08: port@88000 {
cell-index = <0x8>;
compatible = "fsl,fman-v3-port-rx";
reg = <0x88000 0x1000>;
};
fman0_tx_0x28: port@a8000 {
cell-index = <0x28>;
compatible = "fsl,fman-v3-port-tx";
reg = <0xa8000 0x1000>;
};
ethernet@e0000 {
cell-index = <0>;
compatible = "fsl,fman-memac";
reg = <0xe0000 0x1000>;
fsl,fman-ports = <&fman0_rx_0x08 &fman0_tx_0x28>;
ptp-timer = <&ptp_timer0>;
pcsphy-handle = <&pcsphy0>;
};
mdio@e1000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
reg = <0xe1000 0x1000>;
fsl,erratum-a011043; /* must ignore read errors */
pcsphy0: ethernet-phy@0 {
reg = <0x0>;
};
};
};

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// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
* QorIQ FMan v3 1g port #1 device tree stub [ controller @ offset 0x400000 ]
*
* Copyright 2012 - 2015 Freescale Semiconductor Inc.
* Copyright 2020 NXP
*
*/
fman@400000 {
fman0_rx_0x09: port@89000 {
cell-index = <0x9>;
compatible = "fsl,fman-v3-port-rx";
reg = <0x89000 0x1000>;
};
fman0_tx_0x29: port@a9000 {
cell-index = <0x29>;
compatible = "fsl,fman-v3-port-tx";
reg = <0xa9000 0x1000>;
};
ethernet@e2000 {
cell-index = <1>;
compatible = "fsl,fman-memac";
reg = <0xe2000 0x1000>;
fsl,fman-ports = <&fman0_rx_0x09 &fman0_tx_0x29>;
ptp-timer = <&ptp_timer0>;
pcsphy-handle = <&pcsphy1>;
};
mdio@e3000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
reg = <0xe3000 0x1000>;
fsl,erratum-a011043; /* must ignore read errors */
pcsphy1: ethernet-phy@0 {
reg = <0x0>;
};
};
};

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// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
* QorIQ FMan v3 1g port #2 device tree stub [ controller @ offset 0x400000 ]
*
* Copyright 2012 - 2015 Freescale Semiconductor Inc.
* Copyright 2020 NXP
*
*/
fman@400000 {
fman0_rx_0x0a: port@8a000 {
cell-index = <0xa>;
compatible = "fsl,fman-v3-port-rx";
reg = <0x8a000 0x1000>;
};
fman0_tx_0x2a: port@aa000 {
cell-index = <0x2a>;
compatible = "fsl,fman-v3-port-tx";
reg = <0xaa000 0x1000>;
};
ethernet@e4000 {
cell-index = <2>;
compatible = "fsl,fman-memac";
reg = <0xe4000 0x1000>;
fsl,fman-ports = <&fman0_rx_0x0a &fman0_tx_0x2a>;
ptp-timer = <&ptp_timer0>;
pcsphy-handle = <&pcsphy2>;
};
mdio@e5000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
reg = <0xe5000 0x1000>;
fsl,erratum-a011043; /* must ignore read errors */
pcsphy2: ethernet-phy@0 {
reg = <0x0>;
};
};
};

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// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
* QorIQ FMan v3 1g port #3 device tree stub [ controller @ offset 0x400000 ]
*
* Copyright 2012 - 2015 Freescale Semiconductor Inc.
* Copyright 2020 NXP
*
*/
fman@400000 {
fman0_rx_0x0b: port@8b000 {
cell-index = <0xb>;
compatible = "fsl,fman-v3-port-rx";
reg = <0x8b000 0x1000>;
};
fman0_tx_0x2b: port@ab000 {
cell-index = <0x2b>;
compatible = "fsl,fman-v3-port-tx";
reg = <0xab000 0x1000>;
};
ethernet@e6000 {
cell-index = <3>;
compatible = "fsl,fman-memac";
reg = <0xe6000 0x1000>;
fsl,fman-ports = <&fman0_rx_0x0b &fman0_tx_0x2b>;
ptp-timer = <&ptp_timer0>;
pcsphy-handle = <&pcsphy3>;
};
mdio@e7000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
reg = <0xe7000 0x1000>;
fsl,erratum-a011043; /* must ignore read errors */
pcsphy3: ethernet-phy@0 {
reg = <0x0>;
};
};
};

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// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
* QorIQ FMan v3 1g port #4 device tree stub [ controller @ offset 0x400000 ]
*
* Copyright 2012 - 2015 Freescale Semiconductor Inc.
* Copyright 2020 NXP
*
*/
fman@400000 {
fman0_rx_0x0c: port@8c000 {
cell-index = <0xc>;
compatible = "fsl,fman-v3-port-rx";
reg = <0x8c000 0x1000>;
};
fman0_tx_0x2c: port@ac000 {
cell-index = <0x2c>;
compatible = "fsl,fman-v3-port-tx";
reg = <0xac000 0x1000>;
};
ethernet@e8000 {
cell-index = <4>;
compatible = "fsl,fman-memac";
reg = <0xe8000 0x1000>;
fsl,fman-ports = <&fman0_rx_0x0c &fman0_tx_0x2c>;
ptp-timer = <&ptp_timer0>;
pcsphy-handle = <&pcsphy4>;
};
mdio@e9000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
reg = <0xe9000 0x1000>;
fsl,erratum-a011043; /* must ignore read errors */
pcsphy4: ethernet-phy@0 {
reg = <0x0>;
};
};
};

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// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
* QorIQ FMan v3 1g port #5 device tree stub [ controller @ offset 0x400000 ]
*
* Copyright 2012 - 2015 Freescale Semiconductor Inc.
* Copyright 2020 NXP
*
*/
fman@400000 {
fman0_rx_0x0d: port@8d000 {
cell-index = <0xd>;
compatible = "fsl,fman-v3-port-rx";
reg = <0x8d000 0x1000>;
};
fman0_tx_0x2d: port@ad000 {
cell-index = <0x2d>;
compatible = "fsl,fman-v3-port-tx";
reg = <0xad000 0x1000>;
};
ethernet@ea000 {
cell-index = <5>;
compatible = "fsl,fman-memac";
reg = <0xea000 0x1000>;
fsl,fman-ports = <&fman0_rx_0x0d &fman0_tx_0x2d>;
ptp-timer = <&ptp_timer0>;
pcsphy-handle = <&pcsphy5>;
};
mdio@eb000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
reg = <0xeb000 0x1000>;
fsl,erratum-a011043; /* must ignore read errors */
pcsphy5: ethernet-phy@0 {
reg = <0x0>;
};
};
};

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// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
* QorIQ FMan v3 device tree stub [ controller @ offset 0x400000 ]
*
* Copyright 2012 - 2015 Freescale Semiconductor Inc.
* Copyright 2020 NXP
*
*/
fman0: fman@400000 {
#address-cells = <1>;
#size-cells = <1>;
cell-index = <0>;
compatible = "fsl,fman";
ranges = <0 0x400000 0xfe000>;
reg = <0x400000 0xfe000>;
interrupts = <96 2 0 0>, <16 2 1 1>;
clocks = <&clockgen 3 0>;
clock-names = "fmanclk";
fsl,qman-channel-range = <0x800 0x10>;
ptimer-handle = <&ptp_timer0>;
muram@0 {
compatible = "fsl,fman-muram";
reg = <0x0 0x60000>;
};
fman0_oh_0x2: port@82000 {
cell-index = <0x2>;
compatible = "fsl,fman-v3-port-oh";
reg = <0x82000 0x1000>;
};
fman0_oh_0x3: port@83000 {
cell-index = <0x3>;
compatible = "fsl,fman-v3-port-oh";
reg = <0x83000 0x1000>;
};
fman0_oh_0x4: port@84000 {
cell-index = <0x4>;
compatible = "fsl,fman-v3-port-oh";
reg = <0x84000 0x1000>;
};
fman0_oh_0x5: port@85000 {
cell-index = <0x5>;
compatible = "fsl,fman-v3-port-oh";
reg = <0x85000 0x1000>;
};
fman0_oh_0x6: port@86000 {
cell-index = <0x6>;
compatible = "fsl,fman-v3-port-oh";
reg = <0x86000 0x1000>;
};
fman0_oh_0x7: port@87000 {
cell-index = <0x7>;
compatible = "fsl,fman-v3-port-oh";
reg = <0x87000 0x1000>;
};
mdio0: mdio@fc000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
reg = <0xfc000 0x1000>;
};
xmdio0: mdio@fd000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
reg = <0xfd000 0x1000>;
};
};
ptp_timer0: ptp-timer@4fe000 {
compatible = "fsl,fman-ptp-timer";
reg = <0x4fe000 0x1000>;
interrupts = <96 2 0 0>;
clocks = <&clockgen 3 0>;
};

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// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
* QorIQ FMan v3 10g port #0 device tree stub [ controller @ offset 0x500000 ]
*
* Copyright 2012 - 2015 Freescale Semiconductor Inc.
* Copyright 2020 NXP
*
*/
fman@500000 {
fman1_rx_0x10: port@90000 {
cell-index = <0x10>;
compatible = "fsl,fman-v3-port-rx";
reg = <0x90000 0x1000>;
fsl,fman-10g-port;
};
fman1_tx_0x30: port@b0000 {
cell-index = <0x30>;
compatible = "fsl,fman-v3-port-tx";
reg = <0xb0000 0x1000>;
fsl,fman-10g-port;
};
ethernet@f0000 {
cell-index = <0x8>;
compatible = "fsl,fman-memac";
reg = <0xf0000 0x1000>;
fsl,fman-ports = <&fman1_rx_0x10 &fman1_tx_0x30>;
pcsphy-handle = <&pcsphy14>;
};
mdio@f1000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
reg = <0xf1000 0x1000>;
fsl,erratum-a011043; /* must ignore read errors */
pcsphy14: ethernet-phy@0 {
reg = <0x0>;
};
};
};

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// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
* QorIQ FMan v3 10g port #1 device tree stub [ controller @ offset 0x500000 ]
*
* Copyright 2012 - 2015 Freescale Semiconductor Inc.
* Copyright 2020 NXP
*
*/
fman@500000 {
fman1_rx_0x11: port@91000 {
cell-index = <0x11>;
compatible = "fsl,fman-v3-port-rx";
reg = <0x91000 0x1000>;
fsl,fman-10g-port;
};
fman1_tx_0x31: port@b1000 {
cell-index = <0x31>;
compatible = "fsl,fman-v3-port-tx";
reg = <0xb1000 0x1000>;
fsl,fman-10g-port;
};
ethernet@f2000 {
cell-index = <0x9>;
compatible = "fsl,fman-memac";
reg = <0xf2000 0x1000>;
fsl,fman-ports = <&fman1_rx_0x11 &fman1_tx_0x31>;
pcsphy-handle = <&pcsphy15>;
};
mdio@f3000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
reg = <0xf3000 0x1000>;
fsl,erratum-a011043; /* must ignore read errors */
pcsphy15: ethernet-phy@0 {
reg = <0x0>;
};
};
};

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// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
* QorIQ FMan v3 1g port #0 device tree stub [ controller @ offset 0x500000 ]
*
* Copyright 2012 - 2015 Freescale Semiconductor Inc.
* Copyright 2020 NXP
*
*/
fman@500000 {
fman1_rx_0x08: port@88000 {
cell-index = <0x8>;
compatible = "fsl,fman-v3-port-rx";
reg = <0x88000 0x1000>;
};
fman1_tx_0x28: port@a8000 {
cell-index = <0x28>;
compatible = "fsl,fman-v3-port-tx";
reg = <0xa8000 0x1000>;
};
ethernet@e0000 {
cell-index = <0>;
compatible = "fsl,fman-memac";
reg = <0xe0000 0x1000>;
fsl,fman-ports = <&fman1_rx_0x08 &fman1_tx_0x28>;
ptp-timer = <&ptp_timer1>;
pcsphy-handle = <&pcsphy8>;
};
mdio@e1000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
reg = <0xe1000 0x1000>;
fsl,erratum-a011043; /* must ignore read errors */
pcsphy8: ethernet-phy@0 {
reg = <0x0>;
};
};
};

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// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
* QorIQ FMan v3 1g port #1 device tree stub [ controller @ offset 0x500000 ]
*
* Copyright 2012 - 2015 Freescale Semiconductor Inc.
* Copyright 2020 NXP
*
*/
fman@500000 {
fman1_rx_0x09: port@89000 {
cell-index = <0x9>;
compatible = "fsl,fman-v3-port-rx";
reg = <0x89000 0x1000>;
};
fman1_tx_0x29: port@a9000 {
cell-index = <0x29>;
compatible = "fsl,fman-v3-port-tx";
reg = <0xa9000 0x1000>;
};
ethernet@e2000 {
cell-index = <1>;
compatible = "fsl,fman-memac";
reg = <0xe2000 0x1000>;
fsl,fman-ports = <&fman1_rx_0x09 &fman1_tx_0x29>;
ptp-timer = <&ptp_timer1>;
pcsphy-handle = <&pcsphy9>;
};
mdio@e3000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
reg = <0xe3000 0x1000>;
fsl,erratum-a011043; /* must ignore read errors */
pcsphy9: ethernet-phy@0 {
reg = <0x0>;
};
};
};

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// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
* QorIQ FMan v3 1g port #2 device tree stub [ controller @ offset 0x500000 ]
*
* Copyright 2012 - 2015 Freescale Semiconductor Inc.
* Copyright 2020 NXP
*
*/
fman@500000 {
fman1_rx_0x0a: port@8a000 {
cell-index = <0xa>;
compatible = "fsl,fman-v3-port-rx";
reg = <0x8a000 0x1000>;
};
fman1_tx_0x2a: port@aa000 {
cell-index = <0x2a>;
compatible = "fsl,fman-v3-port-tx";
reg = <0xaa000 0x1000>;
};
ethernet@e4000 {
cell-index = <2>;
compatible = "fsl,fman-memac";
reg = <0xe4000 0x1000>;
fsl,fman-ports = <&fman1_rx_0x0a &fman1_tx_0x2a>;
ptp-timer = <&ptp_timer1>;
pcsphy-handle = <&pcsphy10>;
};
mdio@e5000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
reg = <0xe5000 0x1000>;
fsl,erratum-a011043; /* must ignore read errors */
pcsphy10: ethernet-phy@0 {
reg = <0x0>;
};
};
};

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// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
* QorIQ FMan v3 1g port #3 device tree stub [ controller @ offset 0x500000 ]
*
* Copyright 2012 - 2015 Freescale Semiconductor Inc.
* Copyright 2020 NXP
*
*/
fman@500000 {
fman1_rx_0x0b: port@8b000 {
cell-index = <0xb>;
compatible = "fsl,fman-v3-port-rx";
reg = <0x8b000 0x1000>;
};
fman1_tx_0x2b: port@ab000 {
cell-index = <0x2b>;
compatible = "fsl,fman-v3-port-tx";
reg = <0xab000 0x1000>;
};
ethernet@e6000 {
cell-index = <3>;
compatible = "fsl,fman-memac";
reg = <0xe6000 0x1000>;
fsl,fman-ports = <&fman1_rx_0x0b &fman1_tx_0x2b>;
ptp-timer = <&ptp_timer1>;
pcsphy-handle = <&pcsphy11>;
};
mdio@e7000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
reg = <0xe7000 0x1000>;
fsl,erratum-a011043; /* must ignore read errors */
pcsphy11: ethernet-phy@0 {
reg = <0x0>;
};
};
};

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// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
* QorIQ FMan v3 1g port #4 device tree stub [ controller @ offset 0x500000 ]
*
* Copyright 2012 - 2015 Freescale Semiconductor Inc.
* Copyright 2020 NXP
*
*/
fman@500000 {
fman1_rx_0x0c: port@8c000 {
cell-index = <0xc>;
compatible = "fsl,fman-v3-port-rx";
reg = <0x8c000 0x1000>;
};
fman1_tx_0x2c: port@ac000 {
cell-index = <0x2c>;
compatible = "fsl,fman-v3-port-tx";
reg = <0xac000 0x1000>;
};
ethernet@e8000 {
cell-index = <4>;
compatible = "fsl,fman-memac";
reg = <0xe8000 0x1000>;
fsl,fman-ports = <&fman1_rx_0x0c &fman1_tx_0x2c>;
ptp-timer = <&ptp_timer1>;
pcsphy-handle = <&pcsphy12>;
};
mdio@e9000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
reg = <0xe9000 0x1000>;
fsl,erratum-a011043; /* must ignore read errors */
pcsphy12: ethernet-phy@0 {
reg = <0x0>;
};
};
};

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// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
* QorIQ FMan v3 1g port #5 device tree stub [ controller @ offset 0x500000 ]
*
* Copyright 2012 - 2015 Freescale Semiconductor Inc.
* Copyright 2020 NXP
*
*/
fman@500000 {
fman1_rx_0x0d: port@8d000 {
cell-index = <0xd>;
compatible = "fsl,fman-v3-port-rx";
reg = <0x8d000 0x1000>;
};
fman1_tx_0x2d: port@ad000 {
cell-index = <0x2d>;
compatible = "fsl,fman-v3-port-tx";
reg = <0xad000 0x1000>;
};
ethernet@ea000 {
cell-index = <5>;
compatible = "fsl,fman-memac";
reg = <0xea000 0x1000>;
fsl,fman-ports = <&fman1_rx_0x0d &fman1_tx_0x2d>;
ptp-timer = <&ptp_timer1>;
pcsphy-handle = <&pcsphy13>;
};
mdio@eb000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
reg = <0xeb000 0x1000>;
fsl,erratum-a011043; /* must ignore read errors */
pcsphy13: ethernet-phy@0 {
reg = <0x0>;
};
};
};

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// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
* QorIQ FMan v3 device tree stub [ controller @ offset 0x500000 ]
*
* Copyright 2012 - 2015 Freescale Semiconductor Inc.
* Copyright 2020 NXP
*
*/
fman1: fman@500000 {
#address-cells = <1>;
#size-cells = <1>;
cell-index = <1>;
compatible = "fsl,fman";
ranges = <0 0x500000 0xfe000>;
reg = <0x500000 0xfe000>;
interrupts = <97 2 0 0>, <16 2 1 0>;
clocks = <&clockgen 3 1>;
clock-names = "fmanclk";
fsl,qman-channel-range = <0x820 0x10>;
ptimer-handle = <&ptp_timer1>;
muram@0 {
compatible = "fsl,fman-muram";
reg = <0x0 0x60000>;
};
fman1_oh_0x2: port@82000 {
cell-index = <0x2>;
compatible = "fsl,fman-v3-port-oh";
reg = <0x82000 0x1000>;
};
fman1_oh_0x3: port@83000 {
cell-index = <0x3>;
compatible = "fsl,fman-v3-port-oh";
reg = <0x83000 0x1000>;
};
fman1_oh_0x4: port@84000 {
cell-index = <0x4>;
compatible = "fsl,fman-v3-port-oh";
reg = <0x84000 0x1000>;
};
fman1_oh_0x5: port@85000 {
cell-index = <0x5>;
compatible = "fsl,fman-v3-port-oh";
reg = <0x85000 0x1000>;
};
fman1_oh_0x6: port@86000 {
cell-index = <0x6>;
compatible = "fsl,fman-v3-port-oh";
reg = <0x86000 0x1000>;
};
fman1_oh_0x7: port@87000 {
cell-index = <0x7>;
compatible = "fsl,fman-v3-port-oh";
reg = <0x87000 0x1000>;
};
mdio1: mdio@fc000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
reg = <0xfc000 0x1000>;
};
mdio@fd000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
reg = <0xfd000 0x1000>;
};
};
ptp_timer1: ptp-timer@5fe000 {
compatible = "fsl,fman-ptp-timer";
reg = <0x5fe000 0x1000>;
interrupts = <97 2 0 0>;
clocks = <&clockgen 3 1>;
};

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// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
* QorIQ FMan v3 device tree stub [ controller @ offset 0x400000 ]
*
* Copyright 2012 - 2015 Freescale Semiconductor Inc.
* Copyright 2020 NXP
*
*/
fman0: fman@400000 {
#address-cells = <1>;
#size-cells = <1>;
cell-index = <0>;
compatible = "fsl,fman";
ranges = <0 0x400000 0xfe000>;
reg = <0x400000 0xfe000>;
interrupts = <96 2 0 0>, <16 2 1 1>;
clocks = <&clockgen 3 0>;
clock-names = "fmanclk";
fsl,qman-channel-range = <0x800 0x10>;
ptimer-handle = <&ptp_timer0>;
muram@0 {
compatible = "fsl,fman-muram";
reg = <0x0 0x30000>;
};
fman0_oh_0x2: port@82000 {
cell-index = <0x2>;
compatible = "fsl,fman-v3-port-oh";
reg = <0x82000 0x1000>;
};
fman0_oh_0x3: port@83000 {
cell-index = <0x3>;
compatible = "fsl,fman-v3-port-oh";
reg = <0x83000 0x1000>;
};
fman0_oh_0x4: port@84000 {
cell-index = <0x4>;
compatible = "fsl,fman-v3-port-oh";
reg = <0x84000 0x1000>;
};
fman0_oh_0x5: port@85000 {
cell-index = <0x5>;
compatible = "fsl,fman-v3-port-oh";
reg = <0x85000 0x1000>;
};
mdio0: mdio@fc000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
reg = <0xfc000 0x1000>;
};
xmdio0: mdio@fd000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
reg = <0xfd000 0x1000>;
};
};
ptp_timer0: ptp-timer@4fe000 {
compatible = "fsl,fman-ptp-timer";
reg = <0x4fe000 0x1000>;
interrupts = <96 2 0 0>;
clocks = <&clockgen 3 0>;
};