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add a new AT91 GPIO driver

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* add a real AT91 GPIO driver instead of header inline code
* resolve the mixing of port and pins
* change board config files to use new driver
* add macros to gpio to realize backward compatibility

Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
This commit is contained in:
Jens Scharsig 2010-02-03 22:46:16 +01:00 committed by Tom Rix
parent 5d8e359c38
commit ea8fbba731
17 changed files with 258 additions and 152 deletions
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1
drivers/gpio/Makefile
View file

@ -25,6 +25,7 @@ include $(TOPDIR)/config.mk
LIB := $(obj)libgpio.a
COBJS-$(CONFIG_AT91_GPIO) += at91_gpio.o
COBJS-$(CONFIG_KIRKWOOD_GPIO) += kw_gpio.o
COBJS-$(CONFIG_MX31_GPIO) += mx31_gpio.o
COBJS-$(CONFIG_PCA953X) += pca953x.o

214
drivers/gpio/at91_gpio.c Normal file
View file

@ -0,0 +1,214 @@
/*
* Memory Setup stuff - taken from blob memsetup.S
*
* Copyright (C) 2009 Jens Scharsig (js_at_ng@scharsoft.de)
*
* Copyright (C) 2005 HP Labs
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <config.h>
#include <common.h>
#include <asm/sizes.h>
#include <asm/arch/hardware.h>
#include <asm/arch/io.h>
#include <asm/arch/at91_pio.h>
int at91_set_pio_pullup(unsigned port, unsigned pin, int use_pullup)
{
at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
u32 mask;
if ((port < AT91_PIO_PORTS) && (pin < 32)) {
mask = 1 << pin;
if (use_pullup)
writel(1 << pin, &pio->port[port].puer);
else
writel(1 << pin, &pio->port[port].pudr);
writel(mask, &pio->port[port].per);
}
return 0;
}
/*
* mux the pin to the "GPIO" peripheral role.
*/
int at91_set_pio_periph(unsigned port, unsigned pin, int use_pullup)
{
at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
u32 mask;
if ((port < AT91_PIO_PORTS) && (pin < 32)) {
mask = 1 << pin;
writel(mask, &pio->port[port].idr);
at91_set_pio_pullup(port, pin, use_pullup);
writel(mask, &pio->port[port].per);
}
return 0;
}
/*
* mux the pin to the "A" internal peripheral role.
*/
int at91_set_a_periph(unsigned port, unsigned pin, int use_pullup)
{
at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
u32 mask;
if ((port < AT91_PIO_PORTS) && (pin < 32)) {
mask = 1 << pin;
writel(mask, &pio->port[port].idr);
at91_set_pio_pullup(port, pin, use_pullup);
writel(mask, &pio->port[port].asr);
writel(mask, &pio->port[port].pdr);
}
return 0;
}
/*
* mux the pin to the "B" internal peripheral role.
*/
int at91_set_b_periph(unsigned port, unsigned pin, int use_pullup)
{
at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
u32 mask;
if ((port < AT91_PIO_PORTS) && (pin < 32)) {
mask = 1 << pin;
writel(mask, &pio->port[port].idr);
at91_set_pio_pullup(port, pin, use_pullup);
writel(mask, &pio->port[port].bsr);
writel(mask, &pio->port[port].pdr);
}
return 0;
}
/*
* mux the pin to the gpio controller (instead of "A" or "B" peripheral), and
* configure it for an input.
*/
int at91_set_pio_input(unsigned port, u32 pin, int use_pullup)
{
at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
u32 mask;
if ((port < AT91_PIO_PORTS) && (pin < 32)) {
mask = 1 << pin;
writel(mask, &pio->port[port].idr);
at91_set_pio_pullup(port, pin, use_pullup);
writel(mask, &pio->port[port].odr);
writel(mask, &pio->port[port].per);
}
return 0;
}
/*
* mux the pin to the gpio controller (instead of "A" or "B" peripheral),
* and configure it for an output.
*/
int at91_set_pio_output(unsigned port, u32 pin, int value)
{
at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
u32 mask;
if ((port < AT91_PIO_PORTS) && (pin < 32)) {
mask = 1 << pin;
writel(mask, &pio->port[port].idr);
writel(mask, &pio->port[port].pudr);
if (value)
writel(mask, &pio->port[port].sodr);
else
writel(mask, &pio->port[port].codr);
writel(mask, &pio->port[port].oer);
writel(mask, &pio->port[port].per);
}
return 0;
}
/*
* enable/disable the glitch filter. mostly used with IRQ handling.
*/
int at91_set_pio_deglitch(unsigned port, unsigned pin, int is_on)
{
at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
u32 mask;
if ((port < AT91_PIO_PORTS) && (pin < 32)) {
mask = 1 << pin;
if (is_on)
writel(mask, &pio->port[port].ifer);
else
writel(mask, &pio->port[port].ifdr);
}
return 0;
}
/*
* enable/disable the multi-driver. This is only valid for output and
* allows the output pin to run as an open collector output.
*/
int at91_set_pio_multi_drive(unsigned port, unsigned pin, int is_on)
{
at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
u32 mask;
if ((port < AT91_PIO_PORTS) && (pin < 32)) {
mask = 1 << pin;
if (is_on)
writel(mask, &pio->port[port].mder);
else
writel(mask, &pio->port[port].mddr);
}
return 0;
}
/*
* assuming the pin is muxed as a gpio output, set its value.
*/
int at91_set_pio_value(unsigned port, unsigned pin, int value)
{
at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
u32 mask;
if ((port < AT91_PIO_PORTS) && (pin < 32)) {
mask = 1 << pin;
if (value)
writel(mask, &pio->port[port].sodr);
else
writel(mask, &pio->port[port].codr);
}
return 0;
}
/*
* read the pin's value (works even if it's not muxed as a gpio).
*/
int at91_get_pio_value(unsigned port, unsigned pin)
{
u32 pdsr = 0;
at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
u32 mask;
if ((port < AT91_PIO_PORTS) && (pin < 32)) {
mask = 1 << pin;
pdsr = readl(&pio->port[port].pdsr) & mask;
}
return pdsr != 0;
}

14
include/asm-arm/arch-at91/at91_pio.h
View file

@ -100,10 +100,20 @@ typedef union at91_pio {
at91_port_t port[AT91_PIO_PORTS];
} at91_pio_t;
#ifdef CONFIG_AT91_GPIO
int at91_set_a_periph(unsigned port, unsigned pin, int use_pullup);
int at91_set_b_periph(unsigned port, unsigned pin, int use_pullup);
int at91_set_pio_input(unsigned port, unsigned pin, int use_pullup);
int at91_set_pio_multi_drive(unsigned port, unsigned pin, int is_on);
int at91_set_pio_output(unsigned port, unsigned pin, int value);
int at91_set_pio_periph(unsigned port, unsigned pin, int use_pullup);
int at91_set_pio_pullup(unsigned port, unsigned pin, int use_pullup);
int at91_set_pio_deglitch(unsigned port, unsigned pin, int is_on);
int at91_set_pio_value(unsigned port, unsigned pin, int value);
int at91_get_pio_value(unsigned port, unsigned pin);
#endif
#endif
#define AT91_PIN_TO_MASK(x) (1<<x)
#define AT91_PORTPIN(PORT, PIN) ((0x0##PORT - 9) * 32 + ((PIN) & 0x1F))
#define AT91_PIO_PORTA 0x0
#define AT91_PIO_PORTB 0x1
#define AT91_PIO_PORTC 0x2

168
include/asm-arm/arch-at91/gpio.h
View file

@ -216,155 +216,23 @@ static inline unsigned pin_to_mask(unsigned pin)
return 1 << (pin % 32);
}
/*
* mux the pin to the "GPIO" peripheral role.
*/
static inline int at91_set_GPIO_periph(unsigned pin, int use_pullup)
{
void *pio = pin_to_controller(pin);
unsigned mask = pin_to_mask(pin);
__raw_writel(mask, pio + PIO_IDR);
__raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR));
__raw_writel(mask, pio + PIO_PER);
return 0;
}
/*
* mux the pin to the "A" internal peripheral role.
*/
static inline int at91_set_A_periph(unsigned pin, int use_pullup)
{
void *pio = pin_to_controller(pin);
unsigned mask = pin_to_mask(pin);
__raw_writel(mask, pio + PIO_IDR);
__raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR));
__raw_writel(mask, pio + PIO_ASR);
__raw_writel(mask, pio + PIO_PDR);
return 0;
}
/*
* mux the pin to the "B" internal peripheral role.
*/
static inline int at91_set_B_periph(unsigned pin, int use_pullup)
{
void *pio = pin_to_controller(pin);
unsigned mask = pin_to_mask(pin);
__raw_writel(mask, pio + PIO_IDR);
__raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR));
__raw_writel(mask, pio + PIO_BSR);
__raw_writel(mask, pio + PIO_PDR);
return 0;
}
/*
* mux the pin to the gpio controller (instead of "A" or "B" peripheral), and
* configure it for an input.
*/
static inline int at91_set_gpio_input(unsigned pin, int use_pullup)
{
void *pio = pin_to_controller(pin);
unsigned mask = pin_to_mask(pin);
__raw_writel(mask, pio + PIO_IDR);
__raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR));
__raw_writel(mask, pio + PIO_ODR);
__raw_writel(mask, pio + PIO_PER);
return 0;
}
/*
* mux the pin to the gpio controller (instead of "A" or "B" peripheral),
* and configure it for an output.
*/
static inline int at91_set_gpio_output(unsigned pin, int value)
{
void *pio = pin_to_controller(pin);
unsigned mask = pin_to_mask(pin);
__raw_writel(mask, pio + PIO_IDR);
__raw_writel(mask, pio + PIO_PUDR);
__raw_writel(mask, pio + (value ? PIO_SODR : PIO_CODR));
__raw_writel(mask, pio + PIO_OER);
__raw_writel(mask, pio + PIO_PER);
return 0;
}
/*
* enable/disable the glitch filter; mostly used with IRQ handling.
*/
static inline int at91_set_deglitch(unsigned pin, int is_on)
{
void *pio = pin_to_controller(pin);
unsigned mask = pin_to_mask(pin);
__raw_writel(mask, pio + (is_on ? PIO_IFER : PIO_IFDR));
return 0;
}
/*
* enable/disable the multi-driver; This is only valid for output and
* allows the output pin to run as an open collector output.
*/
static inline int at91_set_multi_drive(unsigned pin, int is_on)
{
void *pio = pin_to_controller(pin);
unsigned mask = pin_to_mask(pin);
__raw_writel(mask, pio + (is_on ? PIO_MDER : PIO_MDDR));
return 0;
}
static inline int gpio_direction_input(unsigned pin)
{
void *pio = pin_to_controller(pin);
unsigned mask = pin_to_mask(pin);
if (!(__raw_readl(pio + PIO_PSR) & mask))
return -EINVAL;
__raw_writel(mask, pio + PIO_ODR);
return 0;
}
static inline int gpio_direction_output(unsigned pin, int value)
{
void *pio = pin_to_controller(pin);
unsigned mask = pin_to_mask(pin);
if (!(__raw_readl(pio + PIO_PSR) & mask))
return -EINVAL;
__raw_writel(mask, pio + (value ? PIO_SODR : PIO_CODR));
__raw_writel(mask, pio + PIO_OER);
return 0;
}
/*
* assuming the pin is muxed as a gpio output, set its value.
*/
static inline int at91_set_gpio_value(unsigned pin, int value)
{
void *pio = pin_to_controller(pin);
unsigned mask = pin_to_mask(pin);
__raw_writel(mask, pio + (value ? PIO_SODR : PIO_CODR));
return 0;
}
/*
* read the pin's value (works even if it's not muxed as a gpio).
*/
static inline int at91_get_gpio_value(unsigned pin)
{
void *pio = pin_to_controller(pin);
unsigned mask = pin_to_mask(pin);
u32 pdsr;
pdsr = __raw_readl(pio + PIO_PDSR);
return (pdsr & mask) != 0;
}
/* The following macros are need for backward compatibility */
#define at91_set_GPIO_periph(x, y) \
at91_set_gpio_periph((x - PIN_BASE) / 32,(x % 32), y)
#define at91_set_A_periph(x, y) \
at91_set_a_periph((x - PIN_BASE) / 32,(x % 32), y)
#define at91_set_B_periph(x, y) \
at91_set_b_periph((x - PIN_BASE) / 32,(x % 32), y)
#define at91_set_gpio_output(x, y) \
at91_set_pio_output((x - PIN_BASE) / 32,(x % 32), y)
#define at91_set_gpio_input(x, y) \
at91_set_pio_input((x - PIN_BASE) / 32,(x % 32), y)
#define at91_set_gpio_value(x, y) \
at91_set_pio_value((x - PIN_BASE) / 32,(x % 32), y)
#define at91_get_gpio_value(x) \
at91_get_pio_value((x - PIN_BASE) / 32,(x % 32))
#else
#define at91_set_gpio_value(x, y) at91_set_pio_value(x, y)
#define at91_get_gpio_value(x) at91_get_pio_value(x)
#endif
#endif

1
include/configs/afeb9260.h
View file

@ -47,6 +47,7 @@
/*
* Hardware drivers
*/
#define CONFIG_AT91_GPIO 1
#define CONFIG_ATMEL_USART 1
#undef CONFIG_USART0
#undef CONFIG_USART1

1
include/configs/at91cap9adk.h
View file

@ -49,6 +49,7 @@
/*
* Hardware drivers
*/
#define CONFIG_AT91_GPIO 1
#define CONFIG_ATMEL_USART 1
#undef CONFIG_USART0
#undef CONFIG_USART1

1
include/configs/at91sam9260ek.h
View file

@ -54,6 +54,7 @@
/*
* Hardware drivers
*/
#define CONFIG_AT91_GPIO 1
#define CONFIG_ATMEL_USART 1
#undef CONFIG_USART0
#undef CONFIG_USART1

1
include/configs/at91sam9261ek.h
View file

@ -52,6 +52,7 @@
/*
* Hardware drivers
*/
#define CONFIG_AT91_GPIO 1
#define CONFIG_ATMEL_USART 1
#undef CONFIG_USART0
#undef CONFIG_USART1

1
include/configs/at91sam9263ek.h
View file

@ -51,6 +51,7 @@
/*
* Hardware drivers
*/
#define CONFIG_AT91_GPIO 1
#define CONFIG_ATMEL_USART 1
#undef CONFIG_USART0
#undef CONFIG_USART1

1
include/configs/at91sam9m10g45ek.h
View file

@ -52,6 +52,7 @@
/*
* Hardware drivers
*/
#define CONFIG_AT91_GPIO 1
#define CONFIG_ATMEL_USART 1
#undef CONFIG_USART0
#undef CONFIG_USART1

1
include/configs/at91sam9rlek.h
View file

@ -49,6 +49,7 @@
/*
* Hardware drivers
*/
#define CONFIG_AT91_GPIO 1
#define CONFIG_ATMEL_USART 1
#undef CONFIG_USART0
#undef CONFIG_USART1

1
include/configs/cpu9260.h
View file

@ -244,6 +244,7 @@
/*
* Hardware drivers
*/
#define CONFIG_AT91_GPIO 1
#define CONFIG_ATMEL_USART 1
#undef CONFIG_USART0
#undef CONFIG_USART1

1
include/configs/meesc.h
View file

@ -59,6 +59,7 @@
*/
/* Console output */
#define CONFIG_AT91_GPIO 1
#define CONFIG_ATMEL_USART 1
#undef CONFIG_USART0
#undef CONFIG_USART1

1
include/configs/pm9261.h
View file

@ -159,6 +159,7 @@
/*
* Hardware drivers
*/
#define CONFIG_AT91_GPIO 1
#define CONFIG_ATMEL_USART 1
#undef CONFIG_USART0
#undef CONFIG_USART1

1
include/configs/pm9263.h
View file

@ -173,6 +173,7 @@
/*
* Hardware drivers
*/
#define CONFIG_AT91_GPIO 1
#define CONFIG_ATMEL_USART 1
#undef CONFIG_USART0
#undef CONFIG_USART1

1
include/configs/sbc35_a9g20.h
View file

@ -59,6 +59,7 @@
/*
* Hardware drivers
*/
#define CONFIG_AT91_GPIO 1
#define CONFIG_ATMEL_USART
#define CONFIG_USART0
#undef CONFIG_USART1

1
include/configs/tny_a9260.h
View file

@ -68,6 +68,7 @@
/*
* Hardware drivers
*/
#define CONFIG_AT91_GPIO 1
#define CONFIG_ATMEL_USART 1
#undef CONFIG_USART0
#undef CONFIG_USART1