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https://github.com/AsahiLinux/u-boot
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tools: zynqmpimage: Add partition read support
The zynqmp image format has support for inline partitions which are used by FSBL to describe payloads that are loaded by FSBL itself. While we can't create images that contain partitions (yet), we should still at least be able to examine them and show the user what's inside when we analyze an image created by bootgen. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This commit is contained in:
Alexander Graf
Michal Simek
parent
ffdf528007
commit
e9dbfb32ed
1 changed files with 173 additions and 2 deletions
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@ -6,6 +6,7 @@
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* The following Boot Header format/structures and values are defined in the
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* following documents:
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* * ug1085 ZynqMP TRM doc v1.4 (Chapter 11, Table 11-4)
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* * ug1137 ZynqMP Software Developer Guide v6.0 (Chapter 16)
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*
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* Expected Header Size = 0x9C0
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* Forced as 'little' endian, 32-bit words
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@ -62,6 +63,7 @@
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#define HEADER_REGINIT_NULL (cpu_to_le32(0xffffffff))
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#define HEADER_WIDTHDETECTION (cpu_to_le32(0xaa995566))
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#define HEADER_IMAGEIDENTIFIER (cpu_to_le32(0x584c4e58))
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#define HEADER_CPU_SELECT_A53_64BIT (0x2 << 10)
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enum {
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ENCRYPTION_EFUSE = 0xa5c3c5a3,
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@ -79,6 +81,78 @@ struct zynqmp_reginit {
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#define HEADER_INTERRUPT_VECTORS 8
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#define HEADER_REGINITS 256
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struct image_header_table {
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uint32_t version; /* 0x00 */
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uint32_t nr_parts; /* 0x04 */
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uint32_t partition_header_offset; /* 0x08, divided by 4 */
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uint32_t image_header_offset; /* 0x0c, divided by 4 */
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uint32_t auth_certificate_offset; /* 0x10 */
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uint32_t boot_device; /* 0x14 */
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uint32_t __reserved1[9]; /* 0x18 - 0x38 */
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uint32_t checksum; /* 0x3c */
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};
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#define PART_ATTR_VEC_LOCATION 0x800000
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#define PART_ATTR_BS_BLOCK_SIZE_MASK 0x700000
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#define PART_ATTR_BS_BLOCK_SIZE_DEFAULT 0x000000
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#define PART_ATTR_BS_BLOCK_SIZE_8MB 0x400000
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#define PART_ATTR_BIG_ENDIAN 0x040000
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#define PART_ATTR_PART_OWNER_MASK 0x030000
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#define PART_ATTR_PART_OWNER_FSBL 0x000000
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#define PART_ATTR_PART_OWNER_UBOOT 0x010000
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#define PART_ATTR_RSA_SIG 0x008000
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#define PART_ATTR_CHECKSUM_MASK 0x007000
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#define PART_ATTR_CHECKSUM_NONE 0x000000
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#define PART_ATTR_CHECKSUM_MD5 0x001000
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#define PART_ATTR_CHECKSUM_SHA2 0x002000
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#define PART_ATTR_CHECKSUM_SHA3 0x003000
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#define PART_ATTR_DEST_CPU_SHIFT 8
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#define PART_ATTR_DEST_CPU_MASK 0x000f00
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#define PART_ATTR_DEST_CPU_NONE 0x000000
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#define PART_ATTR_DEST_CPU_A53_0 0x000100
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#define PART_ATTR_DEST_CPU_A53_1 0x000200
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#define PART_ATTR_DEST_CPU_A53_2 0x000300
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#define PART_ATTR_DEST_CPU_A53_3 0x000400
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#define PART_ATTR_DEST_CPU_R5_0 0x000500
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#define PART_ATTR_DEST_CPU_R5_1 0x000600
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#define PART_ATTR_DEST_CPU_R5_L 0x000700
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#define PART_ATTR_DEST_CPU_PMU 0x000800
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#define PART_ATTR_ENCRYPTED 0x000080
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#define PART_ATTR_DEST_DEVICE_SHIFT 4
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#define PART_ATTR_DEST_DEVICE_MASK 0x000070
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#define PART_ATTR_DEST_DEVICE_NONE 0x000000
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#define PART_ATTR_DEST_DEVICE_PS 0x000010
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#define PART_ATTR_DEST_DEVICE_PL 0x000020
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#define PART_ATTR_DEST_DEVICE_PMU 0x000030
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#define PART_ATTR_DEST_DEVICE_XIP 0x000040
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#define PART_ATTR_A53_EXEC_AARCH32 0x000008
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#define PART_ATTR_TARGET_EL_SHIFT 1
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#define PART_ATTR_TARGET_EL_MASK 0x000006
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#define PART_ATTR_TZ_SECURE 0x000001
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static const char *dest_cpus[0x10] = {
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"none", "a5x-0", "a5x-1", "a5x-2", "a5x-3", "r5-0", "r5-1",
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"r5-lockstep", "pmu", "unknown", "unknown", "unknown", "unknown",
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"unknown", "unknown", "unknown"
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};
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struct partition_header {
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uint32_t len_enc; /* 0x00, divided by 4 */
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uint32_t len_unenc; /* 0x04, divided by 4 */
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uint32_t len; /* 0x08, divided by 4 */
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uint32_t next_partition_offset; /* 0x0c */
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uint64_t entry_point; /* 0x10 */
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uint64_t load_address; /* 0x18 */
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uint32_t offset; /* 0x20, divided by 4 */
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uint32_t attributes; /* 0x24 */
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uint32_t __reserved1; /* 0x28 */
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uint32_t checksum_offset; /* 0x2c, divided by 4 */
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uint32_t __reserved2; /* 0x30 */
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uint32_t auth_certificate_offset; /* 0x34 */
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uint32_t __reserved3; /* 0x38 */
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uint32_t checksum; /* 0x3c */
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};
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struct zynqmp_header {
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uint32_t interrupt_vectors[HEADER_INTERRUPT_VECTORS]; /* 0x0 */
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uint32_t width_detection; /* 0x20 */
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@ -92,7 +166,9 @@ struct zynqmp_header {
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uint32_t image_stored_size; /* 0x40 */
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uint32_t image_attributes; /* 0x44 */
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uint32_t checksum; /* 0x48 */
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uint32_t __reserved1[27]; /* 0x4c */
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uint32_t __reserved1[19]; /* 0x4c */
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uint32_t image_header_table_offset; /* 0x98 */
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uint32_t __reserved2[7]; /* 0x9c */
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struct zynqmp_reginit register_init[HEADER_REGINITS]; /* 0xb8 */
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uint32_t __reserved4[66]; /* 0x9c0 */
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};
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@ -131,7 +207,7 @@ static void zynqmpimage_default_header(struct zynqmp_header *ptr)
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return;
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ptr->width_detection = HEADER_WIDTHDETECTION;
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ptr->image_attributes = 0x800;
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ptr->image_attributes = HEADER_CPU_SELECT_A53_64BIT;
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ptr->image_identifier = HEADER_IMAGEIDENTIFIER;
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ptr->encryption = cpu_to_le32(ENCRYPTION_NONE);
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@ -172,6 +248,80 @@ static int zynqmpimage_verify_header(unsigned char *ptr, int image_size,
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return 0;
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}
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static void print_partition(const void *ptr, const struct partition_header *ph)
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{
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uint32_t attr = le32_to_cpu(ph->attributes);
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unsigned long len = le32_to_cpu(ph->len) * 4;
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const char *part_owner;
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const char *dest_devs[0x8] = {
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"none", "PS", "PL", "PMU", "unknown", "unknown", "unknown",
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"unknown"
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};
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switch (attr & PART_ATTR_PART_OWNER_MASK) {
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case PART_ATTR_PART_OWNER_FSBL:
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part_owner = "FSBL";
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break;
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case PART_ATTR_PART_OWNER_UBOOT:
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part_owner = "U-Boot";
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break;
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default:
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part_owner = "Unknown";
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break;
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}
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printf("%s payload on CPU %s (%s):\n", part_owner,
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dest_cpus[(attr & PART_ATTR_DEST_CPU_MASK) >> 8],
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dest_devs[(attr & PART_ATTR_DEST_DEVICE_MASK) >> 4]);
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printf(" Offset : 0x%08x\n", le32_to_cpu(ph->offset) * 4);
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printf(" Size : %lu (0x%lx) bytes\n", len, len);
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printf(" Load : 0x%08llx",
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(unsigned long long)le64_to_cpu(ph->load_address));
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if (ph->load_address != ph->entry_point)
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printf(" (entry=0x%08llx)\n",
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(unsigned long long)le64_to_cpu(ph->entry_point));
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else
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printf("\n");
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printf(" Attributes : ");
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if (attr & PART_ATTR_VEC_LOCATION)
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printf("vec ");
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if (attr & PART_ATTR_ENCRYPTED)
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printf("encrypted ");
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switch (attr & PART_ATTR_CHECKSUM_MASK) {
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case PART_ATTR_CHECKSUM_MD5:
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printf("md5 ");
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break;
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case PART_ATTR_CHECKSUM_SHA2:
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printf("sha2 ");
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break;
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case PART_ATTR_CHECKSUM_SHA3:
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printf("sha3 ");
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break;
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}
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if (attr & PART_ATTR_BIG_ENDIAN)
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printf("BigEndian ");
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if (attr & PART_ATTR_RSA_SIG)
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printf("RSA ");
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if (attr & PART_ATTR_A53_EXEC_AARCH32)
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printf("AArch32 ");
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if (attr & PART_ATTR_TARGET_EL_MASK)
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printf("EL%d ", (attr & PART_ATTR_TARGET_EL_MASK) >> 1);
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if (attr & PART_ATTR_TZ_SECURE)
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printf("secure ");
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printf("\n");
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printf(" Checksum : 0x%08x\n", le32_to_cpu(ph->checksum));
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}
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static void zynqmpimage_print_header(const void *ptr)
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{
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struct zynqmp_header *zynqhdr = (struct zynqmp_header *)ptr;
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@ -212,6 +362,27 @@ static void zynqmpimage_print_header(const void *ptr)
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le32_to_cpu(zynqhdr->register_init[i].data));
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}
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if (zynqhdr->image_header_table_offset) {
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struct image_header_table *iht = (void *)ptr +
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zynqhdr->image_header_table_offset;
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struct partition_header *ph;
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uint32_t ph_offset;
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uint32_t next;
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int i;
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ph_offset = le32_to_cpu(iht->partition_header_offset) * 4;
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ph = (void *)ptr + ph_offset;
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for (i = 0; i < le32_to_cpu(iht->nr_parts); i++) {
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next = le32_to_cpu(ph->next_partition_offset) * 4;
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/* Partition 0 is the base image itself */
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if (i)
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print_partition(ptr, ph);
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ph = (void *)ptr + next;
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}
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}
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free(dynamic_header);
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}
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