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net: phy/vitesse: Add support for VSC8514 phy module

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This patch adds support for VSC8514 PHY module which can be
found on Freescale's T1040RDB boards.

Signed-off-by: Arpit Goel <B44344@freescale.com>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
This commit is contained in:
Arpit Goel 2013-08-23 20:18:05 +05:30 committed by Joe Hershberger
parent 8707678cc4
commit e97a78cfed
1 changed files with 68 additions and 1 deletions
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69
drivers/net/phy/vitesse.c
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@ -49,6 +49,15 @@
#define MIIM_VSC8574_18G_QSGMII 0x80e0 #define MIIM_VSC8574_18G_QSGMII 0x80e0
#define MIIM_VSC8574_18G_CMDSTAT 0x8000 #define MIIM_VSC8574_18G_CMDSTAT 0x8000
/* Vitesse VSC8514 control register */
#define MIIM_VSC8514_GENERAL18 0x12
#define MIIM_VSC8514_GENERAL19 0x13
#define MIIM_VSC8514_GENERAL23 0x17
/* Vitesse VSC8514 gerenal purpose register 18 */
#define MIIM_VSC8514_18G_QSGMII 0x80e0
#define MIIM_VSC8514_18G_CMDSTAT 0x8000
/* CIS8201 */ /* CIS8201 */
static int vitesse_config(struct phy_device *phydev) static int vitesse_config(struct phy_device *phydev)
{ {
@ -148,7 +157,7 @@ static int vsc8601_config(struct phy_device *phydev)
static int vsc8574_config(struct phy_device *phydev) static int vsc8574_config(struct phy_device *phydev)
{ {
u32 val; u32 val;
/* configure regiser 19G for MAC */ /* configure register 19G for MAC */
phy_write(phydev, MDIO_DEVAD_NONE, PHY_EXT_PAGE_ACCESS, phy_write(phydev, MDIO_DEVAD_NONE, PHY_EXT_PAGE_ACCESS,
PHY_EXT_PAGE_ACCESS_GENERAL); PHY_EXT_PAGE_ACCESS_GENERAL);
@ -188,6 +197,53 @@ static int vsc8574_config(struct phy_device *phydev)
return 0; return 0;
} }
static int vsc8514_config(struct phy_device *phydev)
{
u32 val;
int timeout = 1000000;
/* configure register to access 19G */
phy_write(phydev, MDIO_DEVAD_NONE, PHY_EXT_PAGE_ACCESS,
PHY_EXT_PAGE_ACCESS_GENERAL);
val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_VSC8514_GENERAL19);
if (phydev->interface == PHY_INTERFACE_MODE_QSGMII) {
/* set bit 15:14 to '01' for QSGMII mode */
val = (val & 0x3fff) | (1 << 14);
phy_write(phydev, MDIO_DEVAD_NONE,
MIIM_VSC8514_GENERAL19, val);
/* Enable 4 ports MAC QSGMII */
phy_write(phydev, MDIO_DEVAD_NONE, MIIM_VSC8514_GENERAL18,
MIIM_VSC8514_18G_QSGMII);
} else {
/*TODO Add SGMII functionality once spec sheet
* for VSC8514 defines complete functionality
*/
}
val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_VSC8514_GENERAL18);
/* When bit 15 is cleared the command has completed */
while ((val & MIIM_VSC8514_18G_CMDSTAT) && timeout--)
val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_VSC8514_GENERAL18);
if (0 == timeout) {
printf("PHY 8514 config failed\n");
return -1;
}
phy_write(phydev, MDIO_DEVAD_NONE, PHY_EXT_PAGE_ACCESS, 0);
/* configure register to access 23 */
val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_VSC8514_GENERAL23);
/* set bits 10:8 to '000' */
val = (val & 0xf8ff);
phy_write(phydev, MDIO_DEVAD_NONE, MIIM_VSC8514_GENERAL23, val);
genphy_config_aneg(phydev);
return 0;
}
static struct phy_driver VSC8211_driver = { static struct phy_driver VSC8211_driver = {
.name = "Vitesse VSC8211", .name = "Vitesse VSC8211",
.uid = 0xfc4b0, .uid = 0xfc4b0,
@ -238,6 +294,16 @@ static struct phy_driver VSC8574_driver = {
.shutdown = &genphy_shutdown, .shutdown = &genphy_shutdown,
}; };
static struct phy_driver VSC8514_driver = {
.name = "Vitesse VSC8514",
.uid = 0x70570,
.mask = 0xffff0,
.features = PHY_GBIT_FEATURES,
.config = &vsc8514_config,
.startup = &vitesse_startup,
.shutdown = &genphy_shutdown,
};
static struct phy_driver VSC8601_driver = { static struct phy_driver VSC8601_driver = {
.name = "Vitesse VSC8601", .name = "Vitesse VSC8601",
.uid = 0x70420, .uid = 0x70420,
@ -298,6 +364,7 @@ int phy_vitesse_init(void)
phy_register(&VSC8211_driver); phy_register(&VSC8211_driver);
phy_register(&VSC8221_driver); phy_register(&VSC8221_driver);
phy_register(&VSC8574_driver); phy_register(&VSC8574_driver);
phy_register(&VSC8514_driver);
phy_register(&VSC8662_driver); phy_register(&VSC8662_driver);
phy_register(&cis8201_driver); phy_register(&cis8201_driver);
phy_register(&cis8204_driver); phy_register(&cis8204_driver);