clk: renesas: Make reset controller modemr register offset configurable

The MODEMR register offset changed on R8A779A0, make the MODEMR offset
configurable. Fill the offset in on all clock drivers. No functional
change.

Based off "clk: renesas: Make CPG Reset MODEMR offset accessible from
struct cpg_mssr_info" by Hai Pham <hai.pham.ud@renesas.com>

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>

drivers/clk/renesas/clk-rcar-gen2.c

@@ -23,8 +23,6 @@
 #include "renesas-cpg-mssr.h"
 #include "rcar-gen2-cpg.h"
 
-#define CPG_RST_MODEMR		0x0060
-
 #define CPG_PLL0CR		0x00d8
 #define CPG_SDCKCR		0x0074
 

drivers/clk/renesas/clk-rcar-gen3.c

@@ -25,8 +25,6 @@
 #include "renesas-cpg-mssr.h"
 #include "rcar-gen3-cpg.h"
 
-#define CPG_RST_MODEMR		0x0060
-
 #define CPG_PLL0CR		0x00d8
 #define CPG_PLL2CR		0x002c
 #define CPG_PLL4CR		0x01f4
@@ -382,7 +380,7 @@ int gen3_clk_probe(struct udevice *dev)
 	if (rst_base == FDT_ADDR_T_NONE)
 		return -EINVAL;
 
-	cpg_mode = readl(rst_base + CPG_RST_MODEMR);
+	cpg_mode = readl(rst_base + info->reset_modemr_offset);
 
 	priv->cpg_pll_config =
 		(struct rcar_gen3_cpg_pll_config *)info->get_pll_config(cpg_mode);

drivers/clk/renesas/r8a774a1-cpg-mssr.c

@@ -321,6 +321,7 @@ static const struct cpg_mssr_info r8a774a1_cpg_mssr_info = {
 	.mstp_table		= r8a774a1_mstp_table,
 	.mstp_table_size	= ARRAY_SIZE(r8a774a1_mstp_table),
 	.reset_node		= "renesas,r8a774a1-rst",
+	.reset_modemr_offset	= CPG_RST_MODEMR,
 	.extalr_node		= "extalr",
 	.mod_clk_base		= MOD_CLK_BASE,
 	.clk_extal_id		= CLK_EXTAL,

drivers/clk/renesas/r8a774b1-cpg-mssr.c

@@ -318,6 +318,7 @@ static const struct cpg_mssr_info r8a774b1_cpg_mssr_info = {
 	.mstp_table		= r8a774b1_mstp_table,
 	.mstp_table_size	= ARRAY_SIZE(r8a774b1_mstp_table),
 	.reset_node		= "renesas,r8a774b1-rst",
+	.reset_modemr_offset	= CPG_RST_MODEMR,
 	.extalr_node		= "extalr",
 	.mod_clk_base		= MOD_CLK_BASE,
 	.clk_extal_id		= CLK_EXTAL,

drivers/clk/renesas/r8a774c0-cpg-mssr.c

@@ -292,6 +292,7 @@ const struct cpg_mssr_info r8a774c0_cpg_mssr_info = {
 	.mstp_table		= r8a774c0_mstp_table,
 	.mstp_table_size	= ARRAY_SIZE(r8a774c0_mstp_table),
 	.reset_node		= "renesas,r8a774c0-rst",
+	.reset_modemr_offset	= CPG_RST_MODEMR,
 	.mod_clk_base		= MOD_CLK_BASE,
 	.clk_extal_id		= CLK_EXTAL,
 	.clk_extalr_id		= ~0,

drivers/clk/renesas/r8a774e1-cpg-mssr.c

@@ -332,6 +332,7 @@ static const struct cpg_mssr_info r8a774e1_cpg_mssr_info = {
 	.mstp_table		= r8a774e1_mstp_table,
 	.mstp_table_size	= ARRAY_SIZE(r8a774e1_mstp_table),
 	.reset_node		= "renesas,r8a774e1-rst",
+	.reset_modemr_offset	= CPG_RST_MODEMR,
 	.extalr_node		= "extalr",
 	.mod_clk_base		= MOD_CLK_BASE,
 	.clk_extal_id		= CLK_EXTAL,

drivers/clk/renesas/r8a7790-cpg-mssr.c

@@ -263,6 +263,7 @@ static const struct cpg_mssr_info r8a7790_cpg_mssr_info = {
 	.mstp_table		= r8a7790_mstp_table,
 	.mstp_table_size	= ARRAY_SIZE(r8a7790_mstp_table),
 	.reset_node		= "renesas,r8a7790-rst",
+	.reset_modemr_offset	= CPG_RST_MODEMR,
 	.extal_usb_node		= "usb_extal",
 	.mod_clk_base		= MOD_CLK_BASE,
 	.clk_extal_id		= CLK_EXTAL,

drivers/clk/renesas/r8a7791-cpg-mssr.c

@@ -265,6 +265,7 @@ static const struct cpg_mssr_info r8a7791_cpg_mssr_info = {
 	.mstp_table		= r8a7791_mstp_table,
 	.mstp_table_size	= ARRAY_SIZE(r8a7791_mstp_table),
 	.reset_node		= "renesas,r8a7791-rst",
+	.reset_modemr_offset	= CPG_RST_MODEMR,
 	.extal_usb_node		= "usb_extal",
 	.mod_clk_base		= MOD_CLK_BASE,
 	.clk_extal_id		= CLK_EXTAL,

drivers/clk/renesas/r8a7792-cpg-mssr.c

@@ -213,6 +213,7 @@ static const struct cpg_mssr_info r8a7792_cpg_mssr_info = {
 	.mstp_table		= r8a7792_mstp_table,
 	.mstp_table_size	= ARRAY_SIZE(r8a7792_mstp_table),
 	.reset_node		= "renesas,r8a7792-rst",
+	.reset_modemr_offset	= CPG_RST_MODEMR,
 	.mod_clk_base		= MOD_CLK_BASE,
 	.clk_extal_id		= CLK_EXTAL,
 	.pll0_div		= 2,

drivers/clk/renesas/r8a7794-cpg-mssr.c

@@ -240,6 +240,7 @@ static const struct cpg_mssr_info r8a7794_cpg_mssr_info = {
 	.mstp_table		= r8a7794_mstp_table,
 	.mstp_table_size	= ARRAY_SIZE(r8a7794_mstp_table),
 	.reset_node		= "renesas,r8a7794-rst",
+	.reset_modemr_offset	= CPG_RST_MODEMR,
 	.extal_usb_node		= "usb_extal",
 	.mod_clk_base		= MOD_CLK_BASE,
 	.clk_extal_id		= CLK_EXTAL,

drivers/clk/renesas/r8a7795-cpg-mssr.c

@@ -362,6 +362,7 @@ static const struct cpg_mssr_info r8a7795_cpg_mssr_info = {
 	.mstp_table		= r8a7795_mstp_table,
 	.mstp_table_size	= ARRAY_SIZE(r8a7795_mstp_table),
 	.reset_node		= "renesas,r8a7795-rst",
+	.reset_modemr_offset	= CPG_RST_MODEMR,
 	.extalr_node		= "extalr",
 	.mod_clk_base		= MOD_CLK_BASE,
 	.clk_extal_id		= CLK_EXTAL,

drivers/clk/renesas/r8a7796-cpg-mssr.c

@@ -346,6 +346,7 @@ static const struct cpg_mssr_info r8a7796_cpg_mssr_info = {
 	.mstp_table		= r8a7796_mstp_table,
 	.mstp_table_size	= ARRAY_SIZE(r8a7796_mstp_table),
 	.reset_node		= "renesas,r8a7796-rst",
+	.reset_modemr_offset	= CPG_RST_MODEMR,
 	.extalr_node		= "extalr",
 	.mod_clk_base		= MOD_CLK_BASE,
 	.clk_extal_id		= CLK_EXTAL,

drivers/clk/renesas/r8a77965-cpg-mssr.c

@@ -344,6 +344,7 @@ static const struct cpg_mssr_info r8a77965_cpg_mssr_info = {
 	.mstp_table		= r8a77965_mstp_table,
 	.mstp_table_size	= ARRAY_SIZE(r8a77965_mstp_table),
 	.reset_node		= "renesas,r8a77965-rst",
+	.reset_modemr_offset	= CPG_RST_MODEMR,
 	.extalr_node		= "extalr",
 	.mod_clk_base		= MOD_CLK_BASE,
 	.clk_extal_id		= CLK_EXTAL,

drivers/clk/renesas/r8a77970-cpg-mssr.c

@@ -211,6 +211,7 @@ static const struct cpg_mssr_info r8a77970_cpg_mssr_info = {
 	.mstp_table		= r8a77970_mstp_table,
 	.mstp_table_size	= ARRAY_SIZE(r8a77970_mstp_table),
 	.reset_node		= "renesas,r8a77970-rst",
+	.reset_modemr_offset	= CPG_RST_MODEMR,
 	.extalr_node		= "extalr",
 	.mod_clk_base		= MOD_CLK_BASE,
 	.clk_extal_id		= CLK_EXTAL,

drivers/clk/renesas/r8a77980-cpg-mssr.c

@@ -230,6 +230,7 @@ static const struct cpg_mssr_info r8a77980_cpg_mssr_info = {
 	.mstp_table		= r8a77980_mstp_table,
 	.mstp_table_size	= ARRAY_SIZE(r8a77980_mstp_table),
 	.reset_node		= "renesas,r8a77980-rst",
+	.reset_modemr_offset	= CPG_RST_MODEMR,
 	.extalr_node		= "extalr",
 	.mod_clk_base		= MOD_CLK_BASE,
 	.clk_extal_id		= CLK_EXTAL,

drivers/clk/renesas/r8a77990-cpg-mssr.c

@@ -304,6 +304,7 @@ static const struct cpg_mssr_info r8a77990_cpg_mssr_info = {
 	.mstp_table		= r8a77990_mstp_table,
 	.mstp_table_size	= ARRAY_SIZE(r8a77990_mstp_table),
 	.reset_node		= "renesas,r8a77990-rst",
+	.reset_modemr_offset	= CPG_RST_MODEMR,
 	.mod_clk_base		= MOD_CLK_BASE,
 	.clk_extal_id		= CLK_EXTAL,
 	.clk_extalr_id		= ~0,

drivers/clk/renesas/r8a77995-cpg-mssr.c

@@ -242,6 +242,7 @@ static const struct cpg_mssr_info r8a77995_cpg_mssr_info = {
 	.mstp_table		= r8a77995_mstp_table,
 	.mstp_table_size	= ARRAY_SIZE(r8a77995_mstp_table),
 	.reset_node		= "renesas,r8a77995-rst",
+	.reset_modemr_offset	= CPG_RST_MODEMR,
 	.mod_clk_base		= MOD_CLK_BASE,
 	.clk_extal_id		= CLK_EXTAL,
 	.clk_extalr_id		= ~0,

drivers/clk/renesas/rcar-gen2-cpg.h

@@ -30,6 +30,8 @@ struct rcar_gen2_cpg_pll_config {
 	unsigned int pll0_mult;		/* leave as zero if PLL0CR exists */
 };
 
+#define CPG_RST_MODEMR		0x060
+
 struct gen2_clk_priv {
 	void __iomem		*base;
 	struct cpg_mssr_info	*info;

drivers/clk/renesas/rcar-gen3-cpg.h

@@ -71,6 +71,8 @@ struct rcar_gen3_cpg_pll_config {
 	u8 osc_prediv;
 };
 
+#define CPG_RST_MODEMR	0x060
+
 #define CPG_RPCCKCR	0x238
 #define CPG_RCKCR	0x240
 

drivers/clk/renesas/renesas-cpg-mssr.h

@@ -22,6 +22,7 @@ struct cpg_mssr_info {
 	const struct mstp_stop_table	*mstp_table;
 	unsigned int			mstp_table_size;
 	const char			*reset_node;
+	unsigned int			reset_modemr_offset;
 	const char			*extalr_node;
 	const char			*extal_usb_node;
 	unsigned int			mod_clk_base;