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ARM: mx6: Add PCIe on SabreSDP

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Add support for PCIe on MX6 SabreSDP board and enable the support
in the config file.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Liu Ying <Ying.Liu@freescale.com>
This commit is contained in:
Marek Vasut 2014-03-23 22:45:41 +01:00 committed by Stefano Babic
parent a778aeae05
commit e919aa23ef
2 changed files with 21 additions and 0 deletions
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11
board/freescale/mx6sabresd/mx6sabresd.c
View file

@ -135,6 +135,16 @@ static void setup_spi(void)
imx_iomux_v3_setup_multiple_pads(ecspi1_pads, ARRAY_SIZE(ecspi1_pads)); imx_iomux_v3_setup_multiple_pads(ecspi1_pads, ARRAY_SIZE(ecspi1_pads));
} }
iomux_v3_cfg_t const pcie_pads[] = {
MX6_PAD_EIM_D19__GPIO3_IO19 | MUX_PAD_CTRL(NO_PAD_CTRL), /* POWER */
MX6_PAD_GPIO_17__GPIO7_IO12 | MUX_PAD_CTRL(NO_PAD_CTRL), /* RESET */
};
static void setup_pcie(void)
{
imx_iomux_v3_setup_multiple_pads(pcie_pads, ARRAY_SIZE(pcie_pads));
}
iomux_v3_cfg_t const di0_pads[] = { iomux_v3_cfg_t const di0_pads[] = {
MX6_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK, /* DISP0_CLK */ MX6_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK, /* DISP0_CLK */
MX6_PAD_DI0_PIN2__IPU1_DI0_PIN02, /* DISP0_HSYNC */ MX6_PAD_DI0_PIN2__IPU1_DI0_PIN02, /* DISP0_HSYNC */
@ -454,6 +464,7 @@ int overwrite_console(void)
int board_eth_init(bd_t *bis) int board_eth_init(bd_t *bis)
{ {
setup_iomux_enet(); setup_iomux_enet();
setup_pcie();
return cpu_eth_init(bis); return cpu_eth_init(bis);
} }

10
include/configs/mx6sabresd.h
View file

@ -48,4 +48,14 @@
#define CONFIG_IPUV3_CLK 260000000 #define CONFIG_IPUV3_CLK 260000000
#define CONFIG_IMX_HDMI #define CONFIG_IMX_HDMI
#define CONFIG_CMD_PCI
#ifdef CONFIG_CMD_PCI
#define CONFIG_PCI
#define CONFIG_PCI_PNP
#define CONFIG_PCI_SCAN_SHOW
#define CONFIG_PCIE_IMX
#define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12)
#define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(3, 19)
#endif
#endif /* __MX6QSABRESD_CONFIG_H */ #endif /* __MX6QSABRESD_CONFIG_H */