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clk: renesas: Synchronize RZ R8A774A1 RZ/G2M clock tables with Linux 6.6.3
Synchronize RZ R8A774A1 RZ/G2M clock tables with Linux 6.6.3, commit bd3a9e5771a8b332f466d06f7c130a69cab0d526 . Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
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1 changed files with 3 additions and 0 deletions
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@ -75,6 +75,7 @@ static const struct cpg_core_clk r8a774a1_core_clks[] __initconst = {
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/* Core Clock Outputs */
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DEF_GEN3_Z("z", R8A774A1_CLK_Z, CLK_TYPE_GEN3_Z, CLK_PLL0, 2, 8),
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DEF_GEN3_Z("z2", R8A774A1_CLK_Z2, CLK_TYPE_GEN3_Z, CLK_PLL2, 2, 0),
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DEF_GEN3_Z("zg", R8A774A1_CLK_ZG, CLK_TYPE_GEN3_ZG, CLK_PLL4, 4, 24),
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DEF_FIXED("ztr", R8A774A1_CLK_ZTR, CLK_PLL1_DIV2, 6, 1),
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DEF_FIXED("ztrd2", R8A774A1_CLK_ZTRD2, CLK_PLL1_DIV2, 12, 1),
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DEF_FIXED("zt", R8A774A1_CLK_ZT, CLK_PLL1_DIV2, 4, 1),
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@ -122,6 +123,7 @@ static const struct cpg_core_clk r8a774a1_core_clks[] __initconst = {
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};
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static const struct mssr_mod_clk r8a774a1_mod_clks[] __initconst = {
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DEF_MOD("3dge", 112, R8A774A1_CLK_ZG),
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DEF_MOD("tmu4", 121, R8A774A1_CLK_S0D6),
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DEF_MOD("tmu3", 122, R8A774A1_CLK_S3D2),
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DEF_MOD("tmu2", 123, R8A774A1_CLK_S3D2),
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@ -212,6 +214,7 @@ static const struct mssr_mod_clk r8a774a1_mod_clks[] __initconst = {
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DEF_MOD("rpc-if", 917, R8A774A1_CLK_RPCD2),
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DEF_MOD("i2c6", 918, R8A774A1_CLK_S0D6),
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DEF_MOD("i2c5", 919, R8A774A1_CLK_S0D6),
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DEF_MOD("adg", 922, R8A774A1_CLK_S0D4),
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DEF_MOD("iic-pmic", 926, R8A774A1_CLK_CP),
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DEF_MOD("i2c4", 927, R8A774A1_CLK_S0D6),
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DEF_MOD("i2c3", 928, R8A774A1_CLK_S0D6),
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