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https://github.com/AsahiLinux/u-boot
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Add CompactFlash support for NSCU
This commit is contained in:
dzu
parent
3d1e8a9d4e
commit
e7df029f1a
3 changed files with 58 additions and 14 deletions
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@ -2,6 +2,8 @@
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Changes for U-Boot 1.0.0:
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======================================================================
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* Add CompactFlash support for NSCU
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* TRAB auto-update: Base decision if we have to strip the image
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header on image type as encoded in the header
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@ -160,7 +160,7 @@ int pcmcia_on (void)
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}
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#else
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#if defined(CONFIG_LWMON)
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#if defined(CONFIG_LWMON) || defined(CONFIG_NSCU)
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# define CFG_PCMCIA_TIMING (PCMCIA_SHT(9) | PCMCIA_SST(3) | PCMCIA_SL(12))
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#else
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# define CFG_PCMCIA_TIMING (PCMCIA_SHT(2) | PCMCIA_SST(4) | PCMCIA_SL(9))
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@ -594,8 +594,8 @@ static int hardware_enable(int slot)
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sysp->sc_siumcr &= ~SIUMCR_DBGC11; /* set DBGC to 00 */
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/* clear interrupt state, and disable interrupts */
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pcmp->pcmc_pscr = PCMCIA_MASK(_slot_);
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pcmp->pcmc_per &= ~PCMCIA_MASK(_slot_);
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pcmp->pcmc_pscr = PCMCIA_MASK(slot);
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pcmp->pcmc_per &= ~PCMCIA_MASK(slot);
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/*
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* Disable interrupts, DMA, and PCMCIA buffers
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@ -604,10 +604,13 @@ static int hardware_enable(int slot)
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debug ("Disable PCMCIA buffers and assert RESET\n");
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reg = 0;
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reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
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#ifndef NSCU_OE_INV
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reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
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PCMCIA_PGCRX(_slot_) = reg;
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#endif
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PCMCIA_PGCRX(slot) = reg;
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udelay(500);
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#ifndef CONFIG_NSCU
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/*
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* Configure Port C pins for
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* 5 Volts Enable and 3 Volts enable
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@ -617,6 +620,7 @@ static int hardware_enable(int slot)
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/* remove all power */
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immap->im_ioport.iop_pcdat &= ~(0x0002 | 0x0004);
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#endif
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/*
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* Make sure there is a card in the slot, then configure the interface.
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@ -639,6 +643,7 @@ static int hardware_enable(int slot)
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reg,
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(reg&PCMCIA_VS1(slot))?"n":"ff",
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(reg&PCMCIA_VS2(slot))?"n":"ff");
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#ifndef CONFIG_NSCU
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if ((reg & mask) == mask) {
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immap->im_ioport.iop_pcdat |= 0x0004;
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puts (" 5.0V card found: ");
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@ -647,6 +652,13 @@ static int hardware_enable(int slot)
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puts (" 3.3V card found: ");
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}
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immap->im_ioport.iop_pcdir |= (0x0002 | 0x0004);
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#else
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if ((reg & mask) == mask) {
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puts (" 5.0V card found: ");
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} else {
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puts (" 3.3V card found: ");
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}
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#endif
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#if 0
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/* VCC switch error flag, PCMCIA slot INPACK_ pin */
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cp->cp_pbdir &= ~(0x0020 | 0x0010);
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@ -655,10 +667,14 @@ static int hardware_enable(int slot)
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#endif
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udelay(1000);
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debug ("Enable PCMCIA buffers and stop RESET\n");
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reg = PCMCIA_PGCRX(_slot_);
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reg = PCMCIA_PGCRX(slot);
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reg &= ~__MY_PCMCIA_GCRX_CXRESET; /* active high */
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#ifndef NSCU_OE_INV
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reg &= ~__MY_PCMCIA_GCRX_CXOE; /* active low */
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PCMCIA_PGCRX(_slot_) = reg;
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#else
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reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
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#endif
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PCMCIA_PGCRX(slot) = reg;
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udelay(250000); /* some cards need >150 ms to come up :-( */
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@ -680,14 +696,18 @@ static int hardware_disable(int slot)
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immap = (immap_t *)CFG_IMMR;
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pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
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#ifndef CONFIG_NSCU
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/* remove all power */
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immap->im_ioport.iop_pcdat &= ~(0x0002 | 0x0004);
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#endif
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debug ("Disable PCMCIA buffers and assert RESET\n");
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reg = 0;
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reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
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#ifndef NSCU_OE_INV
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reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
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PCMCIA_PGCRX(_slot_) = reg;
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#endif
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PCMCIA_PGCRX(slot) = reg;
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udelay(10000);
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@ -695,7 +715,12 @@ static int hardware_disable(int slot)
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}
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#endif /* CFG_CMD_PCMCIA */
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#ifdef CONFIG_NSCU
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static int voltage_set(int slot, int vcc, int vpp)
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{
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return 0;
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}
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#else
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static int voltage_set(int slot, int vcc, int vpp)
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{
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volatile immap_t *immap;
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@ -714,10 +739,14 @@ static int voltage_set(int slot, int vcc, int vpp)
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* and assert RESET signal
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*/
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debug ("Disable PCMCIA buffers and assert RESET\n");
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reg = PCMCIA_PGCRX(_slot_);
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reg = PCMCIA_PGCRX(slot);
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reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
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#ifndef NSCU_OE_INV
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reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
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PCMCIA_PGCRX(_slot_) = reg;
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#else
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reg &= ~__MY_PCMCIA_GCRX_CXOE; /* active low */
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#endif
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PCMCIA_PGCRX(slot) = reg;
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udelay(500);
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/*
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@ -755,16 +784,21 @@ static int voltage_set(int slot, int vcc, int vpp)
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done:
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debug ("Enable PCMCIA buffers and stop RESET\n");
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reg = PCMCIA_PGCRX(_slot_);
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reg = PCMCIA_PGCRX(slot);
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reg &= ~__MY_PCMCIA_GCRX_CXRESET; /* active high */
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#ifndef NSCU_OE_INV
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reg &= ~__MY_PCMCIA_GCRX_CXOE; /* active low */
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PCMCIA_PGCRX(_slot_) = reg;
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#else
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reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
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#endif
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PCMCIA_PGCRX(slot) = reg;
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udelay(500);
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debug ("voltage_set: " PCMCIA_BOARD_MSG " Slot %c, DONE\n",
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slot+'A');
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return (0);
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}
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#endif
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#endif /* TQM8xxL */
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@ -35,6 +35,7 @@
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#define CONFIG_MPC855 1 /* This is a MPC855 CPU */
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#define CONFIG_TQM855M 1 /* ...on a TQM8xxM module */
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#define CONFIG_NSCU 1
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#define CONFIG_8xx_CONS_SCC1 1 /* Console is on SMC1 */
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@ -285,6 +286,9 @@
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*-----------------------------------------------------------------------
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*
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*/
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/* NSCU use both slots, SLOT_A as "primary". */
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#define CONFIG_PCMCIA_SLOT_A 1
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#define CFG_PCMCIA_MEM_ADDR (0xE0000000)
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#define CFG_PCMCIA_MEM_SIZE ( 64 << 20 )
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#define CFG_PCMCIA_DMA_ADDR (0xE4000000)
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@ -293,6 +297,9 @@
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#define CFG_PCMCIA_ATTRB_SIZE ( 64 << 20 )
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#define CFG_PCMCIA_IO_ADDR (0xEC000000)
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#define CFG_PCMCIA_IO_SIZE ( 64 << 20 )
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#define PCMCIA_MEM_WIN_NO 8 /* override default 4 in pcmcia.h */
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#define PCMCIA_SOCKETS_NO 2 /* we have two sockets */
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#define NSCU_OE_INV 1 /* PCMCIA_GCRX_CXOE is inverted on early boards */
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/*-----------------------------------------------------------------------
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* IDE/ATA stuff (Supports IDE harddisk on PCMCIA Adapter)
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@ -305,10 +312,11 @@
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#undef CONFIG_IDE_LED /* LED for ide not supported */
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#undef CONFIG_IDE_RESET /* reset for ide not supported */
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#define CFG_IDE_MAXBUS 1 /* max. 1 IDE bus */
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#define CFG_IDE_MAXDEVICE 1 /* max. 1 drive per IDE bus */
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#define CFG_IDE_MAXBUS 2 /* max. 2 IDE buses */
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#define CFG_IDE_MAXDEVICE 4 /* max. 2 drives per IDE bus */
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#define CFG_ATA_IDE0_OFFSET 0x0000
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#define CFG_ATA_IDE1_OFFSET (4 * CFG_PCMCIA_MEM_SIZE) /* starts @ 4th window */
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#define CFG_ATA_BASE_ADDR CFG_PCMCIA_MEM_ADDR
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