sh: Drop unreferenced CONFIG_* defines

The following config symbols are only defined once and never referenced
anywhere else:

CONFIG_AP325RXA
CONFIG_AP_SH4A_4A
CONFIG_CPU_SH_TYPE_R
CONFIG_ECOVEC
CONFIG_ESPT
CONFIG_MIGO_R
CONFIG_MPR2
CONFIG_MS7720SE
CONFIG_MS7722SE
CONFIG_MS7750SE
CONFIG_R0P7734
CONFIG_R2DPLUS
CONFIG_RSK7203
CONFIG_RSK7264
CONFIG_RSK7269
CONFIG_SH7752EVB
CONFIG_SH7753EVB
CONFIG_SH7757LCR
CONFIG_SH7763RDP
CONFIG_SH7785LCR

Most of them are config symbols named after the respective boards which
seems to have been a standard practice at some point.

Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
This commit is contained in:
Tuomas Tynkkynen 2017-12-21 03:58:54 +02:00 committed by Tom Rini
parent cfb8462aae
commit e7dd4f9b0c
20 changed files with 0 additions and 40 deletions

View file

@ -10,7 +10,6 @@
#define __MIGO_R_H #define __MIGO_R_H
#define CONFIG_CPU_SH7722 1 #define CONFIG_CPU_SH7722 1
#define CONFIG_MIGO_R 1
#define CONFIG_DISPLAY_BOARDINFO #define CONFIG_DISPLAY_BOARDINFO
#undef CONFIG_SHOW_BOOT_PROGRESS #undef CONFIG_SHOW_BOOT_PROGRESS

View file

@ -11,7 +11,6 @@
#define __AP325RXA_H #define __AP325RXA_H
#define CONFIG_CPU_SH7723 1 #define CONFIG_CPU_SH7723 1
#define CONFIG_AP325RXA 1
#define CONFIG_DISPLAY_BOARDINFO #define CONFIG_DISPLAY_BOARDINFO
#undef CONFIG_SHOW_BOOT_PROGRESS #undef CONFIG_SHOW_BOOT_PROGRESS

View file

@ -10,7 +10,6 @@
#define __AP_SH4A_4A_H #define __AP_SH4A_4A_H
#define CONFIG_CPU_SH7734 1 #define CONFIG_CPU_SH7734 1
#define CONFIG_AP_SH4A_4A 1
#define CONFIG_400MHZ_MODE 1 #define CONFIG_400MHZ_MODE 1
#define CONFIG_SYS_TEXT_BASE 0x8BFC0000 #define CONFIG_SYS_TEXT_BASE 0x8BFC0000

View file

@ -23,7 +23,6 @@
*/ */
#define CONFIG_CPU_SH7724 1 #define CONFIG_CPU_SH7724 1
#define CONFIG_ECOVEC 1
#define CONFIG_ECOVEC_ROMIMAGE_ADDR 0xA0040000 #define CONFIG_ECOVEC_ROMIMAGE_ADDR 0xA0040000
#define CONFIG_SYS_TEXT_BASE 0x8FFC0000 #define CONFIG_SYS_TEXT_BASE 0x8FFC0000

View file

@ -11,7 +11,6 @@
#define __ESPT_H #define __ESPT_H
#define CONFIG_CPU_SH7763 1 #define CONFIG_CPU_SH7763 1
#define CONFIG_ESPT 1
#define __LITTLE_ENDIAN 1 #define __LITTLE_ENDIAN 1
#define CONFIG_ENV_OVERWRITE 1 #define CONFIG_ENV_OVERWRITE 1

View file

@ -18,7 +18,6 @@
/* CPU and platform */ /* CPU and platform */
#define CONFIG_CPU_SH7720 1 #define CONFIG_CPU_SH7720 1
#define CONFIG_MPR2 1
#define CONFIG_DISPLAY_BOARDINFO #define CONFIG_DISPLAY_BOARDINFO

View file

@ -10,7 +10,6 @@
#define __MS7720SE_H #define __MS7720SE_H
#define CONFIG_CPU_SH7720 1 #define CONFIG_CPU_SH7720 1
#define CONFIG_MS7720SE 1
#define CONFIG_BOOTFILE "/boot/zImage" #define CONFIG_BOOTFILE "/boot/zImage"
#define CONFIG_LOADADDR 0x8E000000 #define CONFIG_LOADADDR 0x8E000000

View file

@ -10,7 +10,6 @@
#define __MS7722SE_H #define __MS7722SE_H
#define CONFIG_CPU_SH7722 1 #define CONFIG_CPU_SH7722 1
#define CONFIG_MS7722SE 1
#define CONFIG_DISPLAY_BOARDINFO #define CONFIG_DISPLAY_BOARDINFO
#undef CONFIG_SHOW_BOOT_PROGRESS #undef CONFIG_SHOW_BOOT_PROGRESS

View file

@ -12,7 +12,6 @@
#define CONFIG_CPU_SH7750 1 #define CONFIG_CPU_SH7750 1
/* #define CONFIG_CPU_SH7751 1 */ /* #define CONFIG_CPU_SH7751 1 */
/* #define CONFIG_CPU_TYPE_R 1 */ /* #define CONFIG_CPU_TYPE_R 1 */
#define CONFIG_MS7750SE 1
#define __LITTLE_ENDIAN__ 1 #define __LITTLE_ENDIAN__ 1
#define CONFIG_DISPLAY_BOARDINFO #define CONFIG_DISPLAY_BOARDINFO

View file

@ -10,7 +10,6 @@
#define __R0P7734_H #define __R0P7734_H
#define CONFIG_CPU_SH7734 1 #define CONFIG_CPU_SH7734 1
#define CONFIG_R0P7734 1
#define CONFIG_400MHZ_MODE 1 #define CONFIG_400MHZ_MODE 1
#define CONFIG_SYS_TEXT_BASE 0x8FFC0000 #define CONFIG_SYS_TEXT_BASE 0x8FFC0000

View file

@ -2,8 +2,6 @@
#define __CONFIG_H #define __CONFIG_H
#define CONFIG_CPU_SH7751 1 #define CONFIG_CPU_SH7751 1
#define CONFIG_CPU_SH_TYPE_R 1
#define CONFIG_R2DPLUS 1
#define __LITTLE_ENDIAN__ 1 #define __LITTLE_ENDIAN__ 1
#define CONFIG_DISPLAY_BOARDINFO #define CONFIG_DISPLAY_BOARDINFO

View file

@ -11,7 +11,6 @@
#define __RSK7203_H #define __RSK7203_H
#define CONFIG_CPU_SH7203 1 #define CONFIG_CPU_SH7203 1
#define CONFIG_RSK7203 1
#define CONFIG_LOADADDR 0x0C100000 /* RSK7203_SDRAM_BASE + 1MB */ #define CONFIG_LOADADDR 0x0C100000 /* RSK7203_SDRAM_BASE + 1MB */

View file

@ -12,7 +12,6 @@
#define __RSK7264_H #define __RSK7264_H
#define CONFIG_CPU_SH7264 1 #define CONFIG_CPU_SH7264 1
#define CONFIG_RSK7264 1
#define CONFIG_DISPLAY_BOARDINFO #define CONFIG_DISPLAY_BOARDINFO

View file

@ -11,7 +11,6 @@
#define __RSK7269_H #define __RSK7269_H
#define CONFIG_CPU_SH7269 1 #define CONFIG_CPU_SH7269 1
#define CONFIG_RSK7269 1
#define CONFIG_DISPLAY_BOARDINFO #define CONFIG_DISPLAY_BOARDINFO

View file

@ -10,7 +10,6 @@
#define __SH7752EVB_H #define __SH7752EVB_H
#define CONFIG_CPU_SH7752 1 #define CONFIG_CPU_SH7752 1
#define CONFIG_SH7752EVB 1
#define CONFIG_SYS_TEXT_BASE 0x5ff80000 #define CONFIG_SYS_TEXT_BASE 0x5ff80000

View file

@ -10,7 +10,6 @@
#define __SH7753EVB_H #define __SH7753EVB_H
#define CONFIG_CPU_SH7753 1 #define CONFIG_CPU_SH7753 1
#define CONFIG_SH7753EVB 1
#define CONFIG_SYS_TEXT_BASE 0x5ff80000 #define CONFIG_SYS_TEXT_BASE 0x5ff80000

View file

@ -10,7 +10,6 @@
#define __SH7757LCR_H #define __SH7757LCR_H
#define CONFIG_CPU_SH7757 1 #define CONFIG_CPU_SH7757 1
#define CONFIG_SH7757LCR 1
#define CONFIG_SH7757LCR_DDR_ECC 1 #define CONFIG_SH7757LCR_DDR_ECC 1
#define CONFIG_SYS_TEXT_BASE 0x8ef80000 #define CONFIG_SYS_TEXT_BASE 0x8ef80000

View file

@ -11,7 +11,6 @@
#define __SH7763RDP_H #define __SH7763RDP_H
#define CONFIG_CPU_SH7763 1 #define CONFIG_CPU_SH7763 1
#define CONFIG_SH7763RDP 1
#define __LITTLE_ENDIAN 1 #define __LITTLE_ENDIAN 1
#define CONFIG_ENV_OVERWRITE 1 #define CONFIG_ENV_OVERWRITE 1

View file

@ -10,7 +10,6 @@
#define __SH7785LCR_H #define __SH7785LCR_H
#define CONFIG_CPU_SH7785 1 #define CONFIG_CPU_SH7785 1
#define CONFIG_SH7785LCR 1
#define CONFIG_EXTRA_ENV_SETTINGS \ #define CONFIG_EXTRA_ENV_SETTINGS \
"bootdevice=0:1\0" \ "bootdevice=0:1\0" \

View file

@ -33,7 +33,6 @@ CONFIG_AM437X_USB2PHY2_HOST
CONFIG_AMCORE CONFIG_AMCORE
CONFIG_ANDES_PCU CONFIG_ANDES_PCU
CONFIG_ANDES_PCU_BASE CONFIG_ANDES_PCU_BASE
CONFIG_AP325RXA
CONFIG_APBH_DMA CONFIG_APBH_DMA
CONFIG_APBH_DMA_BURST CONFIG_APBH_DMA_BURST
CONFIG_APBH_DMA_BURST8 CONFIG_APBH_DMA_BURST8
@ -41,7 +40,6 @@ CONFIG_APER_0_BASE
CONFIG_APER_1_BASE CONFIG_APER_1_BASE
CONFIG_APER_SIZE CONFIG_APER_SIZE
CONFIG_APUS_FAST_EXCEPT CONFIG_APUS_FAST_EXCEPT
CONFIG_AP_SH4A_4A
CONFIG_ARCH_ADPAG101P CONFIG_ARCH_ADPAG101P
CONFIG_ARCH_CPU_INIT CONFIG_ARCH_CPU_INIT
CONFIG_ARCH_HAS_ILOG2_U32 CONFIG_ARCH_HAS_ILOG2_U32
@ -333,7 +331,6 @@ CONFIG_CPU_SH7757
CONFIG_CPU_SH7763 CONFIG_CPU_SH7763
CONFIG_CPU_SH7780 CONFIG_CPU_SH7780
CONFIG_CPU_SH7785 CONFIG_CPU_SH7785
CONFIG_CPU_SH_TYPE_R
CONFIG_CPU_TYPE_R CONFIG_CPU_TYPE_R
CONFIG_CPU_VR41XX CONFIG_CPU_VR41XX
CONFIG_CQSPI_DECODER CONFIG_CQSPI_DECODER
@ -504,7 +501,6 @@ CONFIG_ECC_MODE_SHIFT
CONFIG_ECC_SRAM_ADDR_MASK CONFIG_ECC_SRAM_ADDR_MASK
CONFIG_ECC_SRAM_ADDR_SHIFT CONFIG_ECC_SRAM_ADDR_SHIFT
CONFIG_ECC_SRAM_REQ_BIT CONFIG_ECC_SRAM_REQ_BIT
CONFIG_ECOVEC
CONFIG_ECOVEC_ROMIMAGE_ADDR CONFIG_ECOVEC_ROMIMAGE_ADDR
CONFIG_EDB9301 CONFIG_EDB9301
CONFIG_EDB9302 CONFIG_EDB9302
@ -596,7 +592,6 @@ CONFIG_ESDHC_DETECT_QUIRK
CONFIG_ESDHC_DETECT_USE_EXTERN_IRQ1 CONFIG_ESDHC_DETECT_USE_EXTERN_IRQ1
CONFIG_ESDHC_HC_BLK_ADDR CONFIG_ESDHC_HC_BLK_ADDR
CONFIG_ESPRESSO7420 CONFIG_ESPRESSO7420
CONFIG_ESPT
CONFIG_ET1100_BASE CONFIG_ET1100_BASE
CONFIG_ETH1ADDR CONFIG_ETH1ADDR
CONFIG_ETH2ADDR CONFIG_ETH2ADDR
@ -1333,7 +1328,6 @@ CONFIG_MENUKEY
CONFIG_MENUPROMPT CONFIG_MENUPROMPT
CONFIG_MENU_SHOW CONFIG_MENU_SHOW
CONFIG_MFG_ENV_SETTINGS CONFIG_MFG_ENV_SETTINGS
CONFIG_MIGO_R
CONFIG_MII CONFIG_MII
CONFIG_MIIM_ADDRESS CONFIG_MIIM_ADDRESS
CONFIG_MII_DEFAULT_TSEC CONFIG_MII_DEFAULT_TSEC
@ -1402,11 +1396,7 @@ CONFIG_MPC85XX_PCI2
CONFIG_MPC8XXX_SPI CONFIG_MPC8XXX_SPI
CONFIG_MPC8xxx_DISABLE_BPTR CONFIG_MPC8xxx_DISABLE_BPTR
CONFIG_MPLL_FREQ CONFIG_MPLL_FREQ
CONFIG_MPR2
CONFIG_MP_CLK_FREQ CONFIG_MP_CLK_FREQ
CONFIG_MS7720SE
CONFIG_MS7722SE
CONFIG_MS7750SE
CONFIG_MSHC_FREQ CONFIG_MSHC_FREQ
CONFIG_MTD_CONCAT CONFIG_MTD_CONCAT
CONFIG_MTD_DEVICE CONFIG_MTD_DEVICE
@ -1750,8 +1740,6 @@ CONFIG_QSPI
CONFIG_QSPI_QUAD_SUPPORT CONFIG_QSPI_QUAD_SUPPORT
CONFIG_QSPI_SEL_GPIO CONFIG_QSPI_SEL_GPIO
CONFIG_QUOTA CONFIG_QUOTA
CONFIG_R0P7734
CONFIG_R2DPLUS
CONFIG_R7780MP CONFIG_R7780MP
CONFIG_R8A66597_BASE_ADDR CONFIG_R8A66597_BASE_ADDR
CONFIG_R8A66597_ENDIAN CONFIG_R8A66597_ENDIAN
@ -1825,9 +1813,6 @@ CONFIG_ROCKCHIP_USB2_PHY
CONFIG_ROM_STUBS CONFIG_ROM_STUBS
CONFIG_ROOTFS_OFFSET CONFIG_ROOTFS_OFFSET
CONFIG_ROOTPATH CONFIG_ROOTPATH
CONFIG_RSK7203
CONFIG_RSK7264
CONFIG_RSK7269
CONFIG_RTC_DS1337 CONFIG_RTC_DS1337
CONFIG_RTC_DS1337_NOOSC CONFIG_RTC_DS1337_NOOSC
CONFIG_RTC_DS1338 CONFIG_RTC_DS1338
@ -1924,16 +1909,11 @@ CONFIG_SGI_IP28
CONFIG_SH4_PCI CONFIG_SH4_PCI
CONFIG_SH73A0 CONFIG_SH73A0
CONFIG_SH7751_PCI CONFIG_SH7751_PCI
CONFIG_SH7752EVB
CONFIG_SH7753EVB
CONFIG_SH7757LCR
CONFIG_SH7757LCR_DDR_ECC CONFIG_SH7757LCR_DDR_ECC
CONFIG_SH7763RDP
CONFIG_SH7780_PCI CONFIG_SH7780_PCI
CONFIG_SH7780_PCI_BAR CONFIG_SH7780_PCI_BAR
CONFIG_SH7780_PCI_LAR CONFIG_SH7780_PCI_LAR
CONFIG_SH7780_PCI_LSR CONFIG_SH7780_PCI_LSR
CONFIG_SH7785LCR
CONFIG_SHARP_LM8V31 CONFIG_SHARP_LM8V31
CONFIG_SHARP_LQ035Q7DH06 CONFIG_SHARP_LQ035Q7DH06
CONFIG_SHEEVA_88SV131 CONFIG_SHEEVA_88SV131