mirror of
https://github.com/AsahiLinux/u-boot
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colibri_imx6: clean-up and migrate gpios to using driver model
Migrate GPIOs to using driver model, properly request backlight, MMC/SD card detect and USB power enable GPIOs and also enable SION bit in pin muxing for auxiliary, backlight and USB power enable GPIOs. While at it also update copyright year, clean-up/re-order includes, add some comments clarifying ifdef scope and do some white-space clean-up. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
This commit is contained in:
parent
50f39bb6f2
commit
e7cf53497a
2 changed files with 135 additions and 75 deletions
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@ -2,39 +2,34 @@
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/*
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* Copyright (C) 2010-2013 Freescale Semiconductor, Inc.
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* Copyright (C) 2013, Boundary Devices <info@boundarydevices.com>
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* Copyright (C) 2014-2016, Toradex AG
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* Copyright (C) 2014-2019, Toradex AG
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* copied from nitrogen6x
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*/
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#include <common.h>
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#include <dm.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/crm_regs.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/iomux.h>
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#include <asm/arch/mx6-pins.h>
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#include <asm/arch/mx6-ddr.h>
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#include <asm/arch/mx6-pins.h>
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#include <asm/arch/mxc_hdmi.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/bootm.h>
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#include <asm/gpio.h>
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#include <asm/mach-imx/boot_mode.h>
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#include <asm/mach-imx/iomux-v3.h>
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#include <asm/mach-imx/mxc_i2c.h>
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#include <asm/mach-imx/sata.h>
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#include <asm/mach-imx/boot_mode.h>
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#include <asm/mach-imx/video.h>
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#include <asm/io.h>
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#include <dm/platform_data/serial_mxc.h>
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#include <dm/platdata.h>
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#include <environment.h>
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#include <fsl_esdhc.h>
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#include <i2c.h>
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#include <input.h>
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#include <imx_thermal.h>
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#include <linux/errno.h>
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#include <malloc.h>
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#include <micrel.h>
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#include <miiphy.h>
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#include <mmc.h>
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#include <netdev.h>
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#include "../common/tdx-cfg-block.h"
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@ -173,68 +168,123 @@ static void setup_iomux_enet(void)
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/* mux auxiliary pins to GPIO, so they can be used from the U-Boot cmdline */
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iomux_v3_cfg_t const gpio_pads[] = {
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/* ADDRESS[17:18] [25] used as GPIO */
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MX6_PAD_KEY_ROW2__GPIO4_IO11 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_KEY_COL2__GPIO4_IO10 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_NANDF_D1__GPIO2_IO01 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_KEY_ROW2__GPIO4_IO11 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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MX6_PAD_KEY_COL2__GPIO4_IO10 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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MX6_PAD_NANDF_D1__GPIO2_IO01 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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/* ADDRESS[19:24] used as GPIO */
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MX6_PAD_DISP0_DAT23__GPIO5_IO17 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_DISP0_DAT22__GPIO5_IO16 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_DISP0_DAT21__GPIO5_IO15 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_DISP0_DAT20__GPIO5_IO14 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_DISP0_DAT19__GPIO5_IO13 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_DISP0_DAT18__GPIO5_IO12 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_DISP0_DAT23__GPIO5_IO17 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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MX6_PAD_DISP0_DAT22__GPIO5_IO16 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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MX6_PAD_DISP0_DAT21__GPIO5_IO15 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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MX6_PAD_DISP0_DAT20__GPIO5_IO14 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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MX6_PAD_DISP0_DAT19__GPIO5_IO13 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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MX6_PAD_DISP0_DAT18__GPIO5_IO12 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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/* DATA[16:29] [31] used as GPIO */
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MX6_PAD_EIM_LBA__GPIO2_IO27 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_EIM_BCLK__GPIO6_IO31 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_NANDF_CS3__GPIO6_IO16 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_NANDF_CS1__GPIO6_IO14 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_NANDF_RB0__GPIO6_IO10 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_NANDF_ALE__GPIO6_IO08 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_NANDF_WP_B__GPIO6_IO09 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_NANDF_CS0__GPIO6_IO11 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_NANDF_CLE__GPIO6_IO07 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_GPIO_19__GPIO4_IO05 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_CSI0_MCLK__GPIO5_IO19 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_CSI0_PIXCLK__GPIO5_IO18 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_GPIO_4__GPIO1_IO04 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_GPIO_5__GPIO1_IO05 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_GPIO_2__GPIO1_IO02 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_EIM_LBA__GPIO2_IO27 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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MX6_PAD_EIM_BCLK__GPIO6_IO31 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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MX6_PAD_NANDF_CS3__GPIO6_IO16 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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MX6_PAD_NANDF_CS1__GPIO6_IO14 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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MX6_PAD_NANDF_RB0__GPIO6_IO10 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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MX6_PAD_NANDF_ALE__GPIO6_IO08 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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MX6_PAD_NANDF_WP_B__GPIO6_IO09 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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MX6_PAD_NANDF_CS0__GPIO6_IO11 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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MX6_PAD_NANDF_CLE__GPIO6_IO07 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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MX6_PAD_GPIO_19__GPIO4_IO05 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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MX6_PAD_CSI0_MCLK__GPIO5_IO19 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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MX6_PAD_CSI0_PIXCLK__GPIO5_IO18 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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MX6_PAD_GPIO_4__GPIO1_IO04 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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MX6_PAD_GPIO_5__GPIO1_IO05 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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MX6_PAD_GPIO_2__GPIO1_IO02 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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/* DQM[0:3] used as GPIO */
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MX6_PAD_EIM_EB0__GPIO2_IO28 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_EIM_EB1__GPIO2_IO29 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_SD2_DAT2__GPIO1_IO13 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_NANDF_D0__GPIO2_IO00 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_EIM_EB0__GPIO2_IO28 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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MX6_PAD_EIM_EB1__GPIO2_IO29 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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MX6_PAD_SD2_DAT2__GPIO1_IO13 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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MX6_PAD_NANDF_D0__GPIO2_IO00 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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/* RDY used as GPIO */
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MX6_PAD_EIM_WAIT__GPIO5_IO00 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_EIM_WAIT__GPIO5_IO00 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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/* ADDRESS[16] DATA[30] used as GPIO */
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MX6_PAD_KEY_ROW4__GPIO4_IO15 | MUX_PAD_CTRL(WEAK_PULLDOWN),
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MX6_PAD_KEY_COL4__GPIO4_IO14 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_KEY_ROW4__GPIO4_IO15 | MUX_PAD_CTRL(WEAK_PULLDOWN) |
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MUX_MODE_SION,
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MX6_PAD_KEY_COL4__GPIO4_IO14 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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/* CSI pins used as GPIO */
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MX6_PAD_EIM_A24__GPIO5_IO04 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_SD2_CMD__GPIO1_IO11 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_NANDF_CS2__GPIO6_IO15 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_EIM_D18__GPIO3_IO18 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_EIM_A19__GPIO2_IO19 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_EIM_D29__GPIO3_IO29 | MUX_PAD_CTRL(WEAK_PULLDOWN),
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MX6_PAD_EIM_A23__GPIO6_IO06 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_EIM_A20__GPIO2_IO18 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_EIM_A17__GPIO2_IO21 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_EIM_A18__GPIO2_IO20 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_EIM_EB3__GPIO2_IO31 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_EIM_D17__GPIO3_IO17 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_SD2_DAT0__GPIO1_IO15 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_EIM_A24__GPIO5_IO04 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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MX6_PAD_SD2_CMD__GPIO1_IO11 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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MX6_PAD_NANDF_CS2__GPIO6_IO15 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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MX6_PAD_EIM_D18__GPIO3_IO18 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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MX6_PAD_EIM_A19__GPIO2_IO19 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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MX6_PAD_EIM_D29__GPIO3_IO29 | MUX_PAD_CTRL(WEAK_PULLDOWN) |
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MUX_MODE_SION,
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MX6_PAD_EIM_A23__GPIO6_IO06 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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MX6_PAD_EIM_A20__GPIO2_IO18 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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MX6_PAD_EIM_A17__GPIO2_IO21 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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MX6_PAD_EIM_A18__GPIO2_IO20 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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MX6_PAD_EIM_EB3__GPIO2_IO31 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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MX6_PAD_EIM_D17__GPIO3_IO17 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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MX6_PAD_SD2_DAT0__GPIO1_IO15 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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/* GPIO */
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MX6_PAD_EIM_D26__GPIO3_IO26 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_EIM_D27__GPIO3_IO27 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_NANDF_D6__GPIO2_IO06 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_NANDF_D3__GPIO2_IO03 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_ENET_REF_CLK__GPIO1_IO23 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_DI0_PIN4__GPIO4_IO20 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_SD4_DAT3__GPIO2_IO11 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_NANDF_D4__GPIO2_IO04 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_SD4_DAT0__GPIO2_IO08 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_GPIO_7__GPIO1_IO07 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_GPIO_8__GPIO1_IO08 | MUX_PAD_CTRL(WEAK_PULLUP),
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MX6_PAD_EIM_D26__GPIO3_IO26 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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MX6_PAD_EIM_D27__GPIO3_IO27 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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MX6_PAD_NANDF_D6__GPIO2_IO06 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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MX6_PAD_NANDF_D3__GPIO2_IO03 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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MX6_PAD_ENET_REF_CLK__GPIO1_IO23 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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MX6_PAD_DI0_PIN4__GPIO4_IO20 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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MX6_PAD_SD4_DAT3__GPIO2_IO11 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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MX6_PAD_NANDF_D4__GPIO2_IO04 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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MX6_PAD_SD4_DAT0__GPIO2_IO08 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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MX6_PAD_GPIO_7__GPIO1_IO07 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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MX6_PAD_GPIO_8__GPIO1_IO08 | MUX_PAD_CTRL(WEAK_PULLUP) |
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MUX_MODE_SION,
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/* USBH_OC */
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MX6_PAD_EIM_D30__GPIO3_IO30 | MUX_PAD_CTRL(WEAK_PULLUP),
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/* USBC_ID */
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}
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iomux_v3_cfg_t const usb_pads[] = {
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/* USB_PE */
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MX6_PAD_EIM_D31__GPIO3_IO31 | MUX_PAD_CTRL(NO_PAD_CTRL),
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/* USBH_PEN */
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MX6_PAD_EIM_D31__GPIO3_IO31 | MUX_PAD_CTRL(NO_PAD_CTRL) | MUX_MODE_SION,
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# define GPIO_USBH_EN IMX_GPIO_NR(3, 31)
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};
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@ -292,6 +342,7 @@ int board_ehci_power(int port, int on)
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case 1:
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/* Control MXM USBH */
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/* Set MXM USBH power enable, '0' means on */
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gpio_request(GPIO_USBH_EN, "USBH_EN");
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gpio_direction_output(GPIO_USBH_EN, !on);
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mdelay(100);
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break;
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@ -300,7 +351,7 @@ int board_ehci_power(int port, int on)
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}
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return 0;
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}
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#endif
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#endif /* CONFIG_USB_EHCI_MX6 */
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#ifdef CONFIG_FSL_ESDHC
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/* use the following sequence: eMMC, MMC */
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@ -316,6 +367,7 @@ int board_mmc_getcd(struct mmc *mmc)
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switch (cfg->esdhc_base) {
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case USDHC1_BASE_ADDR:
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gpio_request(GPIO_MMC_CD, "MMC_CD");
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gpio_direction_input(GPIO_MMC_CD);
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ret = !gpio_get_value(GPIO_MMC_CD);
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break;
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@ -356,7 +408,7 @@ int board_mmc_init(bd_t *bis)
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}
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return status;
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#else
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#else /* !CONFIG_SPL_BUILD */
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struct src *psrc = (struct src *)SRC_BASE_ADDR;
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unsigned reg = readl(&psrc->sbmr1) >> 11;
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/*
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@ -388,9 +440,9 @@ int board_mmc_init(bd_t *bis)
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}
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return fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
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#endif
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#endif /* !CONFIG_SPL_BUILD */
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}
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#endif
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#endif /* CONFIG_FSL_ESDHC */
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int board_phy_config(struct phy_device *phydev)
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{
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@ -412,6 +464,7 @@ int board_eth_init(bd_t *bis)
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ret = enable_fec_anatop_clock(0, ENET_50MHZ);
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if (ret)
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return ret;
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/* set gpr1[ENET_CLK_SEL] */
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setbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_ENET_CLK_SEL_MASK);
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@ -421,6 +474,7 @@ int board_eth_init(bd_t *bis)
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bus = fec_get_miibus(base, -1);
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if (!bus)
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return 0;
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/* scan PHY 1..7 */
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||||
phydev = phy_find_by_mask(bus, 0xff, PHY_INTERFACE_MODE_RMII);
|
||||
if (!phydev) {
|
||||
|
@ -428,6 +482,7 @@ int board_eth_init(bd_t *bis)
|
|||
puts("no PHY found\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
phy_reset(phydev);
|
||||
printf("using PHY at %d\n", phydev->addr);
|
||||
ret = fec_probe(bis, -1, base, bus, phydev);
|
||||
|
@ -436,7 +491,8 @@ int board_eth_init(bd_t *bis)
|
|||
free(phydev);
|
||||
free(bus);
|
||||
}
|
||||
#endif
|
||||
#endif /* CONFIG_FEC_MXC */
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -452,11 +508,12 @@ static iomux_v3_cfg_t const pwr_intb_pads[] = {
|
|||
|
||||
static iomux_v3_cfg_t const backlight_pads[] = {
|
||||
/* Backlight On */
|
||||
MX6_PAD_EIM_D26__GPIO3_IO26 | MUX_PAD_CTRL(NO_PAD_CTRL),
|
||||
MX6_PAD_EIM_D26__GPIO3_IO26 | MUX_PAD_CTRL(NO_PAD_CTRL) | MUX_MODE_SION,
|
||||
#define RGB_BACKLIGHT_GP IMX_GPIO_NR(3, 26)
|
||||
/* Backlight PWM, used as GPIO in U-Boot */
|
||||
MX6_PAD_EIM_A22__GPIO2_IO16 | MUX_PAD_CTRL(NO_PULLUP),
|
||||
MX6_PAD_SD4_DAT1__GPIO2_IO09 | MUX_PAD_CTRL(NO_PAD_CTRL),
|
||||
MX6_PAD_SD4_DAT1__GPIO2_IO09 | MUX_PAD_CTRL(NO_PAD_CTRL) |
|
||||
MUX_MODE_SION,
|
||||
#define RGB_BACKLIGHTPWM_GP IMX_GPIO_NR(2, 9)
|
||||
};
|
||||
|
||||
|
@ -619,6 +676,8 @@ static void setup_display(void)
|
|||
imx_iomux_v3_setup_multiple_pads(backlight_pads,
|
||||
ARRAY_SIZE(backlight_pads));
|
||||
/* use 0 for EDT 7", use 1 for LG fullHD panel */
|
||||
gpio_request(RGB_BACKLIGHTPWM_GP, "PWM<A>");
|
||||
gpio_request(RGB_BACKLIGHT_GP, "BL_ON");
|
||||
gpio_direction_output(RGB_BACKLIGHTPWM_GP, 0);
|
||||
gpio_direction_output(RGB_BACKLIGHT_GP, 1);
|
||||
}
|
||||
|
@ -1117,7 +1176,7 @@ void reset_cpu(ulong addr)
|
|||
{
|
||||
}
|
||||
|
||||
#endif
|
||||
#endif /* CONFIG_SPL_BUILD */
|
||||
|
||||
static struct mxc_serial_platdata mxc_serial_plat = {
|
||||
.reg = (struct mxc_uart *)UART1_BASE,
|
||||
|
|
|
@ -50,6 +50,7 @@ CONFIG_DEFAULT_DEVICE_TREE="imx6-colibri"
|
|||
CONFIG_ENV_IS_IN_MMC=y
|
||||
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
|
||||
CONFIG_DFU_MMC=y
|
||||
CONFIG_DM_GPIO=y
|
||||
CONFIG_FSL_ESDHC=y
|
||||
CONFIG_PHYLIB=y
|
||||
CONFIG_PHY_MICREL=y
|
||||
|
|
Loading…
Reference in a new issue