- rzg2_beacon updates
This commit is contained in:
Tom Rini 2021-10-31 12:47:35 -04:00
commit e63a3130e9
7 changed files with 33 additions and 177 deletions

View file

@ -83,23 +83,19 @@ choice
prompt "Renesas ARM64 SoCs board select" prompt "Renesas ARM64 SoCs board select"
optional optional
config TARGET_BEACON_RZG2H config TARGET_BEACON_RZG2M
bool "Beacon EmbeddedWorks RZ/G2H Dev Kit" bool "Beacon EmbeddedWorks RZ/G2 Dev Kit"
select R8A774A1
select R8A774B1
select R8A774E1 select R8A774E1
select RZ_G2 select RZ_G2
select PINCTRL_PFC_R8A774E1
config TARGET_BEACON_RZG2M
bool "Beacon EmbeddedWorks RZ/G2M Dev Kit"
select R8A774A1
select RZ_G2
select PINCTRL_PFC_R8A774A1 select PINCTRL_PFC_R8A774A1
config TARGET_BEACON_RZG2N
bool "Beacon EmbeddedWorks RZ/G2N Dev Kit"
select R8A774B1
select RZ_G2
select PINCTRL_PFC_R8A774B1 select PINCTRL_PFC_R8A774B1
select PINCTRL_PFC_R8A774E1
imply MULTI_DTB_FIT
imply MULTI_DTB_FIT_USER_DEFINED_AREA
imply CLK_VERSACLOCK
imply CLK_CCF
config TARGET_CONDOR config TARGET_CONDOR
bool "Condor board" bool "Condor board"
@ -189,11 +185,13 @@ source "board/hoperun/hihope-rzg2/Kconfig"
source "board/silinux/ek874/Kconfig" source "board/silinux/ek874/Kconfig"
config MULTI_DTB_FIT_UNCOMPRESS_SZ config MULTI_DTB_FIT_UNCOMPRESS_SZ
default 0x80000 if TARGET_BEACON_RZG2M
default 0x80000 if TARGET_HIHOPE_RZG2 default 0x80000 if TARGET_HIHOPE_RZG2
default 0x80000 if TARGET_SALVATOR_X default 0x80000 if TARGET_SALVATOR_X
default 0x80000 if TARGET_ULCB default 0x80000 if TARGET_ULCB
config MULTI_DTB_FIT_USER_DEF_ADDR config MULTI_DTB_FIT_USER_DEF_ADDR
default 0x49000000 if TARGET_BEACON_RZG2M
default 0x49000000 if TARGET_HIHOPE_RZG2 default 0x49000000 if TARGET_HIHOPE_RZG2
default 0x49000000 if TARGET_SALVATOR_X default 0x49000000 if TARGET_SALVATOR_X
default 0x49000000 if TARGET_ULCB default 0x49000000 if TARGET_ULCB

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@ -1,4 +1,4 @@
if TARGET_BEACON_RZG2H || TARGET_BEACON_RZG2M || TARGET_BEACON_RZG2N if TARGET_BEACON_RZG2M
config SYS_SOC config SYS_SOC
default "rmobile" default "rmobile"

View file

@ -3,6 +3,4 @@ M: Adam Ford <aford173@gmail.com>
S: Maintained S: Maintained
F: board/beacon/beacon-rzg2m/ F: board/beacon/beacon-rzg2m/
F: include/configs/beacon-rzg2m.h F: include/configs/beacon-rzg2m.h
F: configs/r8a774a1_beacon_defconfig F: configs/rzg2_beacon_defconfig
F: configs/r8a774b1_beacon_defconfig
F: configs/r8a774e1_beacon_defconfig

View file

@ -10,16 +10,6 @@
DECLARE_GLOBAL_DATA_PTR; DECLARE_GLOBAL_DATA_PTR;
void s_init(void)
{
}
/* Kconfig forces this on, so just return 0 */
int board_early_init_f(void)
{
return 0;
}
int board_init(void) int board_init(void)
{ {
/* address of boot parameters */ /* address of boot parameters */
@ -36,3 +26,19 @@ void reset_cpu(void)
{ {
writel(RST_CODE, RST_CA57RESCNT); writel(RST_CODE, RST_CA57RESCNT);
} }
#if IS_ENABLED(CONFIG_MULTI_DTB_FIT)
int board_fit_config_name_match(const char *name)
{
if (!strcmp(rzg_get_cpu_name(), "R8A774A1") && !strcmp(name, "r8a774a1-beacon-rzg2m-kit"))
return 0;
if (!strcmp(rzg_get_cpu_name(), "R8A774B1") && !strcmp(name, "r8a774b1-beacon-rzg2n-kit"))
return 0;
if (!strcmp(rzg_get_cpu_name(), "R8A774E1") && !strcmp(name, "r8a774e1-beacon-rzg2h-kit"))
return 0;
return -1;
}
#endif

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@ -1,75 +0,0 @@
CONFIG_ARM=y
CONFIG_ARCH_RMOBILE=y
CONFIG_SYS_TEXT_BASE=0x50000000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ENV_OFFSET=0x0
CONFIG_SYS_MALLOC_LEN=0x4000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="r8a774b1-beacon-rzg2n-kit"
CONFIG_RCAR_GEN3=y
CONFIG_TARGET_BEACON_RZG2N=y
# CONFIG_SPL is not set
CONFIG_LTO=y
CONFIG_SYS_LOAD_ADDR=0x58000000
CONFIG_FIT=y
CONFIG_SUPPORT_RAW_INITRD=y
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_DEFAULT_FDT_FILE="r8a774b1-beacon-rzg2n-kit.dtb"
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_MTD=y
CONFIG_CMD_PART=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_MMC_ENV_DEV=1
CONFIG_SYS_MMC_ENV_PART=2
CONFIG_VERSION_VARIABLE=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CLK=y
CONFIG_CLK_RENESAS=y
CONFIG_RCAR_GPIO=y
CONFIG_DM_PCA953X=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_RCAR_I2C=y
CONFIG_SYS_I2C_RCAR_IIC=y
CONFIG_MMC_IO_VOLTAGE=y
CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS200_SUPPORT=y
CONFIG_RENESAS_SDHI=y
CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_BITBANGMII=y
CONFIG_PHY_REALTEK=y
CONFIG_DM_ETH=y
CONFIG_RENESAS_RAVB=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_SPECIFY_CONSOLE_INDEX=y
CONFIG_SCIF_CONSOLE=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_RENESAS_RPC_SPI=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT_OVERLAY=y

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@ -1,75 +0,0 @@
CONFIG_ARM=y
CONFIG_ARCH_RMOBILE=y
CONFIG_SYS_TEXT_BASE=0x50000000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ENV_OFFSET=0x0
CONFIG_SYS_MALLOC_LEN=0x4000000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="r8a774e1-beacon-rzg2h-kit"
CONFIG_RCAR_GEN3=y
CONFIG_TARGET_BEACON_RZG2H=y
# CONFIG_SPL is not set
CONFIG_LTO=y
CONFIG_SYS_LOAD_ADDR=0x58000000
CONFIG_FIT=y
CONFIG_SUPPORT_RAW_INITRD=y
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_DEFAULT_FDT_FILE="r8a774e1-beacon-rzg2h-kit.dtb"
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_MTD=y
CONFIG_CMD_PART=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_MMC_ENV_DEV=1
CONFIG_SYS_MMC_ENV_PART=2
CONFIG_VERSION_VARIABLE=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CLK=y
CONFIG_CLK_RENESAS=y
CONFIG_RCAR_GPIO=y
CONFIG_DM_PCA953X=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_RCAR_I2C=y
CONFIG_SYS_I2C_RCAR_IIC=y
CONFIG_MMC_IO_VOLTAGE=y
CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS200_SUPPORT=y
CONFIG_RENESAS_SDHI=y
CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_BITBANGMII=y
CONFIG_PHY_REALTEK=y
CONFIG_DM_ETH=y
CONFIG_RENESAS_RAVB=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_SPECIFY_CONSOLE_INDEX=y
CONFIG_SCIF_CONSOLE=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_RENESAS_RPC_SPI=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT_OVERLAY=y

View file

@ -15,6 +15,7 @@ CONFIG_FIT=y
CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SUPPORT_RAW_INITRD=y
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_DEFAULT_FDT_FILE="r8a774a1-beacon-rzg2m-kit.dtb" CONFIG_DEFAULT_FDT_FILE="r8a774a1-beacon-rzg2m-kit.dtb"
# CONFIG_BOARD_EARLY_INIT_F is not set
CONFIG_HUSH_PARSER=y CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPIO=y CONFIG_CMD_GPIO=y
@ -33,6 +34,9 @@ CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y CONFIG_CMD_FS_GENERIC=y
CONFIG_OF_CONTROL=y CONFIG_OF_CONTROL=y
CONFIG_OF_LIST="r8a774a1-beacon-rzg2m-kit r8a774b1-beacon-rzg2n-kit r8a774e1-beacon-rzg2h-kit"
CONFIG_MULTI_DTB_FIT_LZO=y
CONFIG_MULTI_DTB_FIT_USER_DEFINED_AREA=y
CONFIG_ENV_OVERWRITE=y CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_MMC_ENV_DEV=1 CONFIG_SYS_MMC_ENV_DEV=1