Merge branch 'master' of git://git.denx.de/u-boot-arm

Conflicts:

	cpu/arm_cortexa8/s5pc1xx/cache.c
	include/asm-arm/arch-s5pc1xx/sys_proto.h
	include/sja1000.h

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This commit is contained in:
Minkyu Kang 2010-01-15 22:41:58 +09:00
commit e598dfc22c
639 changed files with 17956 additions and 17488 deletions

1336
CHANGELOG

File diff suppressed because it is too large Load diff

View file

@ -36,6 +36,7 @@ Reinhard Arlt <reinhard.arlt@esd-electronics.com>
mecp5200 MPC5200
pf5200 MPC5200
caddy2 MPC8349
vme8349 MPC8349
CPCI750 PPC750FX/GX
@ -201,6 +202,8 @@ Frank Gottschling <fgottschling@eltec.de>
Wolfgang Grandegger <wg@denx.de>
ipek01 MPC5200
CCM MPC855
PN62 MPC8240
@ -277,7 +280,7 @@ Nye Liu <nyet@zumanetworks.com>
ZUMA MPC7xx_74xx
Jon Loeliger <jdl@freescale.com>
Kumar Gala <kumar.gala@freescale.com>
MPC8540ADS MPC8540
MPC8560ADS MPC8560
@ -543,6 +546,10 @@ Rick Bronson <rick@efn.org>
AT91RM9200DK at91rm9200
Po-Yu Chuang <ratbert@faraday-tech.com>
a320evb FA526 (ARM920T-like) (a320 SoC)
George G. Davis <gdavis@mvista.com>
assabet SA1100
@ -712,6 +719,10 @@ Andrea Scian <andrea.scian@dave-tech.it>
B2 ARM7TDMI (S3C44B0X)
Nick Thompson <nick.thompson@gefanuc.com>
da830evm ARM926EJS (DA830/OMAP-L137)
Albin Tonnerre <albin.tonnerre@free-electrons.com>
sbc35_a9g20 ARM926EJS (AT91SAM9G20 SoC)

16
MAKEALL
View file

@ -1,4 +1,4 @@
#!/bin/sh
#!/bin/bash
# Print statistics when we exit
trap exit 1 2 3 15
@ -39,6 +39,7 @@ LIST=""
ERR_CNT=0
ERR_LIST=""
TOTAL_CNT=0
RC=0
#########################################################################
## MPC5xx Systems
@ -63,6 +64,7 @@ LIST_5xxx=" \
icecube_5100 \
icecube_5200 \
inka4x0 \
ipek01 \
lite5200b \
mcc200 \
mecp5200 \
@ -356,10 +358,12 @@ LIST_8260=" \
#########################################################################
LIST_83xx=" \
caddy2 \
kmeter1 \
MPC8313ERDB_33 \
MPC8313ERDB_NAND_66 \
MPC8315ERDB \
MPC8315ERDB_NAND \
MPC8323ERDB \
MPC832XEMDS \
MPC832XEMDS_ATM \
@ -538,6 +542,7 @@ LIST_ARM7=" \
#########################################################################
LIST_ARM9=" \
a320evb \
ap920t \
ap922_XA10 \
ap926ejs \
@ -548,6 +553,7 @@ LIST_ARM9=" \
cp926ejs \
cp946es \
cp966 \
da830evm \
imx27lite \
lpd7a400 \
mv88f6281gtw_ge \
@ -936,6 +942,12 @@ build_target() {
${MAKE} ${JOBS} all 2>&1 >${LOG_DIR}/$target.MAKELOG \
| tee ${LOG_DIR}/$target.ERR
# Check for 'make' errors
if [ ${PIPESTATUS[0]} -ne 0 ] ; then
RC=1
fi
if [ -s ${LOG_DIR}/$target.ERR ] ; then
ERR_CNT=$((ERR_CNT + 1))
ERR_LIST="${ERR_LIST} $target"
@ -959,6 +971,8 @@ print_stats() {
echo "Boards with warnings or errors: ${ERR_CNT} (${ERR_LIST} )"
fi
echo "----------------------------------------------------------"
exit $RC
}
#-----------------------------------------------------------------------

View file

@ -24,7 +24,7 @@
VERSION = 2009
PATCHLEVEL = 11
SUBLEVEL =
EXTRAVERSION = -rc1
EXTRAVERSION =
ifneq "$(SUBLEVEL)" ""
U_BOOT_VERSION = $(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)
else
@ -230,12 +230,10 @@ ifeq ($(CPU),mpc85xx)
LIBS += drivers/qe/qe.a
LIBS += cpu/mpc8xxx/ddr/libddr.a
LIBS += cpu/mpc8xxx/lib8xxx.a
TAG_SUBDIRS += cpu/mpc8xxx
endif
ifeq ($(CPU),mpc86xx)
LIBS += cpu/mpc8xxx/ddr/libddr.a
LIBS += cpu/mpc8xxx/lib8xxx.a
TAG_SUBDIRS += cpu/mpc8xxx
endif
LIBS += drivers/rtc/librtc.a
LIBS += drivers/serial/libserial.a
@ -243,6 +241,7 @@ LIBS += drivers/twserial/libtws.a
LIBS += drivers/usb/gadget/libusb_gadget.a
LIBS += drivers/usb/host/libusb_host.a
LIBS += drivers/usb/musb/libusb_musb.a
LIBS += drivers/usb/phy/libusb_phy.a
LIBS += drivers/video/libvideo.a
LIBS += drivers/watchdog/libwatchdog.a
LIBS += common/libcommon.a
@ -402,51 +401,19 @@ env:
depend dep: $(TIMESTAMP_FILE) $(VERSION_FILE) $(obj)include/autoconf.mk
for dir in $(SUBDIRS) ; do $(MAKE) -C $$dir _depend ; done
TAG_SUBDIRS = $(SUBDIRS)
TAG_SUBDIRS += $(dir $(__LIBS))
TAG_SUBDIRS += include
TAG_SUBDIRS += lib_generic board/$(BOARDDIR)
TAG_SUBDIRS += cpu/$(CPU)
TAG_SUBDIRS += lib_$(ARCH)
TAG_SUBDIRS += fs/cramfs
TAG_SUBDIRS += fs/fat
TAG_SUBDIRS += fs/fdos
TAG_SUBDIRS += fs/jffs2
TAG_SUBDIRS += fs/yaffs2
TAG_SUBDIRS += net
TAG_SUBDIRS += disk
TAG_SUBDIRS += common
TAG_SUBDIRS += drivers/bios_emulator
TAG_SUBDIRS += drivers/block
TAG_SUBDIRS += drivers/gpio
TAG_SUBDIRS += drivers/hwmon
TAG_SUBDIRS += drivers/i2c
TAG_SUBDIRS += drivers/input
TAG_SUBDIRS += drivers/misc
TAG_SUBDIRS += drivers/mmc
TAG_SUBDIRS += drivers/mtd
TAG_SUBDIRS += drivers/mtd/nand
TAG_SUBDIRS += drivers/mtd/onenand
TAG_SUBDIRS += drivers/mtd/spi
TAG_SUBDIRS += drivers/net
TAG_SUBDIRS += drivers/net/sk98lin
TAG_SUBDIRS += drivers/pci
TAG_SUBDIRS += drivers/pcmcia
TAG_SUBDIRS += drivers/qe
TAG_SUBDIRS += drivers/rtc
TAG_SUBDIRS += drivers/serial
TAG_SUBDIRS += drivers/spi
TAG_SUBDIRS += drivers/usb
TAG_SUBDIRS += drivers/video
tags ctags:
ctags -w -o $(obj)ctags `find $(SUBDIRS) $(TAG_SUBDIRS) \
-name '*.[ch]' -print`
ctags -w -o $(obj)ctags `find $(TAG_SUBDIRS) \
-name '*.[chS]' -print`
etags:
etags -a -o $(obj)etags `find $(SUBDIRS) $(TAG_SUBDIRS) \
-name '*.[ch]' -print`
etags -a -o $(obj)etags `find $(TAG_SUBDIRS) \
-name '*.[chS]' -print`
cscope:
find $(SUBDIRS) $(TAG_SUBDIRS) -name '*.[ch]' -print \
> cscope.files
find $(TAG_SUBDIRS) -name '*.[chS]' -print > cscope.files
cscope -b -q -k
SYSTEM_MAP = \
@ -606,6 +573,9 @@ jupiter_config: unconfig
inka4x0_config: unconfig
@$(MKCONFIG) inka4x0 ppc mpc5xxx inka4x0
ipek01_config: unconfig
@$(MKCONFIG) -a ipek01 ppc mpc5xxx ipek01
lite5200b_config \
lite5200b_PM_config \
lite5200b_LOWBOOT_config: unconfig
@ -2291,8 +2261,12 @@ MPC8313ERDB_NAND_66_config: unconfig
echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk ; \
fi ;
MPC8315ERDB_NAND_config \
MPC8315ERDB_config: unconfig
@$(MKCONFIG) -a MPC8315ERDB ppc mpc83xx mpc8315erdb freescale
@if [ "$(findstring _NAND_,$@)" ] ; then \
ln -sf mpc8313erdb nand_spl/board/freescale/mpc8315erdb ; \
fi ;
@$(MKCONFIG) -t $(@:_config=) MPC8315ERDB ppc mpc83xx mpc8315erdb freescale
MPC8323ERDB_config: unconfig
@$(MKCONFIG) -a MPC8323ERDB ppc mpc83xx mpc8323erdb freescale
@ -2426,8 +2400,9 @@ SIMPC8313_SP_config: unconfig
TQM834x_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc mpc83xx tqm834x tqc
caddy2_config \
vme8349_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc mpc83xx vme8349 esd
@$(MKCONFIG) -t $(@:_config=) vme8349 ppc mpc83xx vme8349 esd
#########################################################################
## MPC85xx Systems
@ -2693,6 +2668,9 @@ shannon_config : unconfig
## ARM92xT Systems
#########################################################################
a320evb_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm920t a320evb faraday a320
#########################################################################
## Atmel AT91RM9200 Systems
#########################################################################
@ -2927,6 +2905,9 @@ cp922_XA10_config \
cp1026_config: unconfig
@board/armltd/integrator/split_by_variant.sh cp $@
da830evm_config: unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs da830evm davinci davinci
davinci_dvevm_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs dvevm davinci davinci
@ -3257,6 +3238,7 @@ zylonite_config :
#########################################################################
apollon_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_ONENAND_U_BOOT" > $(obj)include/config.h
@$(MKCONFIG) $(@:_config=) arm arm1136 apollon NULL omap24xx
@echo "CONFIG_ONENAND_U_BOOT = y" >> $(obj)include/config.mk

65
README
View file

@ -1,5 +1,5 @@
#
# (C) Copyright 2000 - 2008
# (C) Copyright 2000 - 2009
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
@ -138,6 +138,7 @@ U-Boot will always have a patchlevel of "0".
Directory Hierarchy:
====================
- api Machine/arch independent API for external apps
- board Board dependent files
- common Misc architecture independent functions
- cpu CPU specific files
@ -178,8 +179,8 @@ Directory Hierarchy:
- disk Code for disk drive partition handling
- doc Documentation (don't expect too much)
- drivers Commonly used device drivers
- dtt Digital Thermometer and Thermostat drivers
- examples Example code for standalone applications, etc.
- fs Filesystem code (cramfs, ext2, jffs2, etc.)
- include Header Files
- lib_arm Files generic to ARM architecture
- lib_avr32 Files generic to AVR32 architecture
@ -187,9 +188,12 @@ Directory Hierarchy:
- lib_generic Files generic to all architectures
- lib_i386 Files generic to i386 architecture
- lib_m68k Files generic to m68k architecture
- lib_microblaze Files generic to microblaze architecture
- lib_mips Files generic to MIPS architecture
- lib_nios Files generic to NIOS architecture
- lib_nios2 Files generic to NIOS2 architecture
- lib_ppc Files generic to PowerPC architecture
- lib_sh Files generic to SH architecture
- lib_sparc Files generic to SPARC architecture
- libfdt Library files to support flattened device trees
- net Networking code
@ -773,7 +777,7 @@ The following options need to be configured:
CONFIG_LBA48
Set this to enable support for disks larger than 137GB
Also look at CONFIG_SYS_64BIT_LBA ,CONFIG_SYS_64BIT_VSPRINTF and CONFIG_SYS_64BIT_STRTOUL
Also look at CONFIG_SYS_64BIT_LBA.
Whithout these , LBA48 support uses 32bit variables and will 'only'
support disks up to 2.1TB.
@ -842,20 +846,20 @@ The following options need to be configured:
Define this to use i/o functions instead of macros
(some hardware wont work with macros)
CONFIG_DRIVER_SMC911X
CONFIG_SMC911X
Support for SMSC's LAN911x and LAN921x chips
CONFIG_DRIVER_SMC911X_BASE
CONFIG_SMC911X_BASE
Define this to hold the physical address
of the device (I/O space)
CONFIG_DRIVER_SMC911X_32_BIT
CONFIG_SMC911X_32_BIT
Define this if data bus is 32 bits
CONFIG_DRIVER_SMC911X_16_BIT
CONFIG_SMC911X_16_BIT
Define this if data bus is 16 bits. If your processor
automatically converts one 32 bit word to two 16 bit
words you may also try CONFIG_DRIVER_SMC911X_32_BIT.
words you may also try CONFIG_SMC911X_32_BIT.
- USB Support:
At the moment only the UHCI host controller is
@ -1889,25 +1893,6 @@ The following options need to be configured:
example, some LED's) on your board. At the moment,
the following checkpoints are implemented:
- Automatic software updates via TFTP server
CONFIG_UPDATE_TFTP
CONFIG_UPDATE_TFTP_CNT_MAX
CONFIG_UPDATE_TFTP_MSEC_MAX
These options enable and control the auto-update feature;
for a more detailed description refer to doc/README.update.
- MTD Support (mtdparts command, UBI support)
CONFIG_MTD_DEVICE
Adds the MTD device infrastructure from the Linux kernel.
Needed for mtdparts command support.
CONFIG_MTD_PARTITIONS
Adds the MTD partitioning infrastructure from the Linux
kernel. Needed for UBI support.
Legacy uImage format:
Arg Where When
@ -2061,6 +2046,25 @@ FIT uImage format:
-150 common/cmd_nand.c Incorrect FIT image format
151 common/cmd_nand.c FIT image format OK
- Automatic software updates via TFTP server
CONFIG_UPDATE_TFTP
CONFIG_UPDATE_TFTP_CNT_MAX
CONFIG_UPDATE_TFTP_MSEC_MAX
These options enable and control the auto-update feature;
for a more detailed description refer to doc/README.update.
- MTD Support (mtdparts command, UBI support)
CONFIG_MTD_DEVICE
Adds the MTD device infrastructure from the Linux kernel.
Needed for mtdparts command support.
CONFIG_MTD_PARTITIONS
Adds the MTD partitioning infrastructure from the Linux
kernel. Needed for UBI support.
Modem Support:
--------------
@ -2520,13 +2524,6 @@ use the "saveenv" command to store a valid environment.
- CONFIG_SYS_FAULT_MII_ADDR:
MII address of the PHY to check for the Ethernet link state.
- CONFIG_SYS_64BIT_VSPRINTF:
Makes vsprintf (and all *printf functions) support printing
of 64bit values by using the L quantifier
- CONFIG_SYS_64BIT_STRTOUL:
Adds simple_strtoull that returns a 64bit value
- CONFIG_NS16550_MIN_FUNCTIONS:
Define this if you desire to only have use of the NS16550_init
and NS16550_putc functions for the serial driver located at

View file

@ -74,11 +74,11 @@ DATA 0xFFD0140C 0x00000a33 # DDR Timing (High)
# bit12-11: TW2W
# bit31-13: zero required
DATA 0xFFD01410 0x00000099 # DDR Address Control
# bit1-0: 01, Cs0width=x16
# bit3-2: 10, Cs0size=512Mb
# bit5-4: 01, Cs1width=x16
# bit7-6: 10, Cs1size=512Mb
DATA 0xFFD01410 0x000000cc # DDR Address Control
# bit1-0: 00, Cs0width=x8
# bit3-2: 11, Cs0size=1Gb
# bit5-4: 00, Cs1width=x8
# bit7-6: 11, Cs1size=1Gb
# bit9-8: 00, Cs2width=nonexistent
# bit11-10: 00, Cs2size =nonexistent
# bit13-12: 00, Cs3width=nonexistent

View file

@ -34,3 +34,7 @@ endif
ifeq ($(debug),1)
PLATFORM_CPPFLAGS += -DDEBUG
endif
ifdef CONFIG_NAND_U_BOOT
LDSCRIPT := $(TOPDIR)/board/$(BOARDDIR)/u-boot-nand.lds
endif

View file

@ -1,134 +0,0 @@
/*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
cpu/ppc4xx/start.o (.text)
*(.text)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss (NOLOAD) :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
}
_end = . ;
PROVIDE (end = .);
}

View file

@ -466,166 +466,6 @@ phys_size_t initdram (int board_type)
#endif
}
/*************************************************************************
* pci_pre_init
*
* This routine is called just prior to registering the hose and gives
* the board the opportunity to check things. Returning a value of zero
* indicates that things are bad & PCI initialization should be aborted.
*
* Different boards may wish to customize the pci controller structure
* (add regions, override default access routines, etc) or perform
* certain pre-initialization actions.
*
************************************************************************/
#if defined(CONFIG_PCI)
int pci_pre_init(struct pci_controller *hose)
{
unsigned long addr;
/*-------------------------------------------------------------------------+
| Set priority for all PLB3 devices to 0.
| Set PLB3 arbiter to fair mode.
+-------------------------------------------------------------------------*/
mfsdr(SD0_AMP1, addr);
mtsdr(SD0_AMP1, (addr & 0x000000FF) | 0x0000FF00);
addr = mfdcr(PLB3_ACR);
mtdcr(PLB3_ACR, addr | 0x80000000);
/*-------------------------------------------------------------------------+
| Set priority for all PLB4 devices to 0.
+-------------------------------------------------------------------------*/
mfsdr(SD0_AMP0, addr);
mtsdr(SD0_AMP0, (addr & 0x000000FF) | 0x0000FF00);
addr = mfdcr(PLB4_ACR) | 0xa0000000; /* Was 0x8---- */
mtdcr(PLB4_ACR, addr);
/*-------------------------------------------------------------------------+
| Set Nebula PLB4 arbiter to fair mode.
+-------------------------------------------------------------------------*/
/* Segment0 */
addr = (mfdcr(PLB0_ACR) & ~PLB0_ACR_PPM_MASK) | PLB0_ACR_PPM_FAIR;
addr = (addr & ~PLB0_ACR_HBU_MASK) | PLB0_ACR_HBU_ENABLED;
addr = (addr & ~PLB0_ACR_RDP_MASK) | PLB0_ACR_RDP_4DEEP;
addr = (addr & ~PLB0_ACR_WRP_MASK) | PLB0_ACR_WRP_2DEEP;
mtdcr(PLB0_ACR, addr);
/* Segment1 */
addr = (mfdcr(PLB1_ACR) & ~PLB1_ACR_PPM_MASK) | PLB1_ACR_PPM_FAIR;
addr = (addr & ~PLB1_ACR_HBU_MASK) | PLB1_ACR_HBU_ENABLED;
addr = (addr & ~PLB1_ACR_RDP_MASK) | PLB1_ACR_RDP_4DEEP;
addr = (addr & ~PLB1_ACR_WRP_MASK) | PLB1_ACR_WRP_2DEEP;
mtdcr(PLB1_ACR, addr);
return 1;
}
#endif /* defined(CONFIG_PCI) */
/*************************************************************************
* pci_target_init
*
* The bootstrap configuration provides default settings for the pci
* inbound map (PIM). But the bootstrap config choices are limited and
* may not be sufficient for a given board.
*
************************************************************************/
#if defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT)
void pci_target_init(struct pci_controller *hose)
{
/*--------------------------------------------------------------------------+
* Set up Direct MMIO registers
*--------------------------------------------------------------------------*/
/*--------------------------------------------------------------------------+
| PowerPC440 EP PCI Master configuration.
| Map one 1Gig range of PLB/processor addresses to PCI memory space.
| PLB address 0xA0000000-0xDFFFFFFF ==> PCI address 0xA0000000-0xDFFFFFFF
| Use byte reversed out routines to handle endianess.
| Make this region non-prefetchable.
+--------------------------------------------------------------------------*/
out32r(PCIL0_PMM0MA, 0x00000000); /* PMM0 Mask/Attribute - disabled b4 setting */
out32r(PCIL0_PMM0LA, CONFIG_SYS_PCI_MEMBASE); /* PMM0 Local Address */
out32r(PCIL0_PMM0PCILA, CONFIG_SYS_PCI_MEMBASE); /* PMM0 PCI Low Address */
out32r(PCIL0_PMM0PCIHA, 0x00000000); /* PMM0 PCI High Address */
out32r(PCIL0_PMM0MA, 0xE0000001); /* 512M + No prefetching, and enable region */
out32r(PCIL0_PMM1MA, 0x00000000); /* PMM0 Mask/Attribute - disabled b4 setting */
out32r(PCIL0_PMM1LA, CONFIG_SYS_PCI_MEMBASE2); /* PMM0 Local Address */
out32r(PCIL0_PMM1PCILA, CONFIG_SYS_PCI_MEMBASE2); /* PMM0 PCI Low Address */
out32r(PCIL0_PMM1PCIHA, 0x00000000); /* PMM0 PCI High Address */
out32r(PCIL0_PMM1MA, 0xE0000001); /* 512M + No prefetching, and enable region */
out32r(PCIL0_PTM1MS, 0x00000001); /* Memory Size/Attribute */
out32r(PCIL0_PTM1LA, 0); /* Local Addr. Reg */
out32r(PCIL0_PTM2MS, 0); /* Memory Size/Attribute */
out32r(PCIL0_PTM2LA, 0); /* Local Addr. Reg */
/*--------------------------------------------------------------------------+
* Set up Configuration registers
*--------------------------------------------------------------------------*/
/* Program the board's subsystem id/vendor id */
pci_write_config_word(0, PCI_SUBSYSTEM_VENDOR_ID,
CONFIG_SYS_PCI_SUBSYS_VENDORID);
pci_write_config_word(0, PCI_SUBSYSTEM_ID, CONFIG_SYS_PCI_SUBSYS_ID);
/* Configure command register as bus master */
pci_write_config_word(0, PCI_COMMAND, PCI_COMMAND_MASTER);
/* 240nS PCI clock */
pci_write_config_word(0, PCI_LATENCY_TIMER, 1);
/* No error reporting */
pci_write_config_word(0, PCI_ERREN, 0);
pci_write_config_dword(0, PCI_BRDGOPT2, 0x00000101);
}
#endif /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT) */
/*************************************************************************
* pci_master_init
*
************************************************************************/
#if defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_MASTER_INIT)
void pci_master_init(struct pci_controller *hose)
{
unsigned short temp_short;
/*--------------------------------------------------------------------------+
| Write the PowerPC440 EP PCI Configuration regs.
| Enable PowerPC440 EP to be a master on the PCI bus (PMM).
| Enable PowerPC440 EP to act as a PCI memory target (PTM).
+--------------------------------------------------------------------------*/
pci_read_config_word(0, PCI_COMMAND, &temp_short);
pci_write_config_word(0, PCI_COMMAND,
temp_short | PCI_COMMAND_MASTER |
PCI_COMMAND_MEMORY);
}
#endif /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_MASTER_INIT) */
/*************************************************************************
* is_pci_host
*
* This routine is called to determine if a pci scan should be
* performed. With various hardware environments (especially cPCI and
* PPMC) it's insufficient to depend on the state of the arbiter enable
* bit in the strap register, or generic host/adapter assumptions.
*
* Rather than hard-code a bad assumption in the general 440 code, the
* 440 pci code requires the board to decide at runtime.
*
* Return 0 for adapter mode, non-zero for host (monarch) mode.
*
*
************************************************************************/
#if defined(CONFIG_PCI)
int is_pci_host(struct pci_controller *hose)
{
/* Bamboo is always configured as host. */
return (1);
}
#endif /* defined(CONFIG_PCI) */
/*----------------------------------------------------------------------------+
| is_powerpc440ep_pass1.
+----------------------------------------------------------------------------*/

View file

@ -36,3 +36,7 @@ endif
ifeq ($(dbcr),1)
PLATFORM_CPPFLAGS += -DCONFIG_SYS_INIT_DBCR=0x8cff0000
endif
ifdef CONFIG_NAND_U_BOOT
LDSCRIPT := $(TOPDIR)/board/$(BOARDDIR)/u-boot-nand.lds
endif

View file

@ -1,143 +0,0 @@
/*
* (C) Copyright 2002
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
.bootpg 0xFFFFF000 :
{
cpu/ppc4xx/start.o (.bootpg)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
cpu/ppc4xx/start.o (.text)
board/amcc/bamboo/init.o (.text)
board/amcc/bamboo/bamboo.o (.text)
*(.text)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss (NOLOAD) :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
}
_end = . ;
PROVIDE (end = .);
}

View file

@ -1,134 +0,0 @@
/*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
cpu/ppc4xx/start.o (.text)
*(.text)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss (NOLOAD) :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
}
_end = . ;
PROVIDE (end = .);
}

View file

@ -326,141 +326,17 @@ phys_size_t initdram(int board_type)
}
#endif
/*
* pci_target_init
*
* The bootstrap configuration provides default settings for the pci
* inbound map (PIM). But the bootstrap config choices are limited and
* may not be sufficient for a given board.
*/
#if defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT)
void pci_target_init(struct pci_controller * hose )
{
/*
* Disable everything
*/
out_le32((void *)PCIL0_PIM0SA, 0); /* disable */
out_le32((void *)PCIL0_PIM1SA, 0); /* disable */
out_le32((void *)PCIL0_PIM2SA, 0); /* disable */
out_le32((void *)PCIL0_EROMBA, 0); /* disable expansion rom */
/*
* Map all of SDRAM to PCI address 0x0000_0000. Note that the 440
* strapping options to not support sizes such as 128/256 MB.
*/
out_le32((void *)PCIL0_PIM0LAL, CONFIG_SYS_SDRAM_BASE);
out_le32((void *)PCIL0_PIM0LAH, 0);
out_le32((void *)PCIL0_PIM0SA, ~(gd->ram_size - 1) | 1);
out_le32((void *)PCIL0_BAR0, 0);
/*
* Program the board's subsystem id/vendor id
*/
out_le16((void *)PCIL0_SBSYSVID, CONFIG_SYS_PCI_SUBSYS_VENDORID);
out_le16((void *)PCIL0_SBSYSID, CONFIG_SYS_PCI_SUBSYS_DEVICEID);
out_le16((void *)PCIL0_CMD, in16r(PCIL0_CMD) | PCI_COMMAND_MEMORY);
}
#endif /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT) */
#if defined(CONFIG_PCI)
/*
* is_pci_host
*
* This routine is called to determine if a pci scan should be
* performed. With various hardware environments (especially cPCI and
* PPMC) it's insufficient to depend on the state of the arbiter enable
* bit in the strap register, or generic host/adapter assumptions.
*
* Rather than hard-code a bad assumption in the general 440 code, the
* 440 pci code requires the board to decide at runtime.
*
* Return 0 for adapter mode, non-zero for host (monarch) mode.
*/
int is_pci_host(struct pci_controller *hose)
int board_pcie_first(void)
{
/* Board is always configured as host. */
return (1);
}
static struct pci_controller pcie_hose[2] = {{0},{0}};
void pcie_setup_hoses(int busno)
{
struct pci_controller *hose;
int i, bus;
int ret = 0;
char *env;
unsigned int delay;
int start;
/*
* assume we're called after the PCIX hose is initialized, which takes
* bus ID 0 and therefore start numbering PCIe's from 1.
*/
bus = busno;
/*
* Canyonlands with SATA enabled has only one PCIe slot
* (2nd one).
*/
if (gd->board_type == BOARD_CANYONLANDS_SATA)
start = 1;
else
start = 0;
return 1;
for (i = start; i <= 1; i++) {
if (is_end_point(i))
ret = ppc4xx_init_pcie_endport(i);
else
ret = ppc4xx_init_pcie_rootport(i);
if (ret == -ENODEV)
continue;
if (ret) {
printf("PCIE%d: initialization as %s failed\n", i,
is_end_point(i) ? "endpoint" : "root-complex");
continue;
}
hose = &pcie_hose[i];
hose->first_busno = bus;
hose->last_busno = bus;
hose->current_busno = bus;
/* setup mem resource */
pci_set_region(hose->regions + 0,
CONFIG_SYS_PCIE_MEMBASE + i * CONFIG_SYS_PCIE_MEMSIZE,
CONFIG_SYS_PCIE_MEMBASE + i * CONFIG_SYS_PCIE_MEMSIZE,
CONFIG_SYS_PCIE_MEMSIZE,
PCI_REGION_MEM);
hose->region_count = 1;
pci_register_hose(hose);
if (is_end_point(i)) {
ppc4xx_setup_pcie_endpoint(hose, i);
/*
* Reson for no scanning is endpoint can not generate
* upstream configuration accesses.
*/
} else {
ppc4xx_setup_pcie_rootpoint(hose, i);
env = getenv ("pciscandelay");
if (env != NULL) {
delay = simple_strtoul(env, NULL, 10);
if (delay > 5)
printf("Warning, expect noticable delay before "
"PCIe scan due to 'pciscandelay' value!\n");
mdelay(delay * 1000);
}
/*
* Config access can only go down stream
*/
hose->last_busno = pci_hose_scan(hose);
bus = hose->last_busno + 1;
}
}
return 0;
}
#endif /* CONFIG_PCI */

View file

@ -39,3 +39,7 @@ endif
ifeq ($(dbcr),1)
PLATFORM_CPPFLAGS += -DCONFIG_SYS_INIT_DBCR=0x8cff0000
endif
ifdef CONFIG_NAND_U_BOOT
LDSCRIPT := $(TOPDIR)/board/$(BOARDDIR)/u-boot-nand.lds
endif

View file

@ -1,141 +0,0 @@
/*
* (C) Copyright 2008
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
.bootpg 0xFFFFF000 :
{
cpu/ppc4xx/start.o (.bootpg)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
cpu/ppc4xx/start.o (.text)
board/amcc/canyonlands/init.o (.text)
*(.text)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
}
_end = . ;
PROVIDE (end = .);
}

View file

@ -164,96 +164,3 @@ long int fixed_sdram(void)
return (128 * 1024 * 1024); /* 128 MB */
}
#endif /* !defined(CONFIG_SPD_EEPROM) */
/*************************************************************************
* pci_pre_init
*
* This routine is called just prior to registering the hose and gives
* the board the opportunity to check things. Returning a value of zero
* indicates that things are bad & PCI initialization should be aborted.
*
* Different boards may wish to customize the pci controller structure
* (add regions, override default access routines, etc) or perform
* certain pre-initialization actions.
*
************************************************************************/
#if defined(CONFIG_PCI)
int pci_pre_init(struct pci_controller *hose)
{
unsigned long strap;
/*--------------------------------------------------------------------------+
* The ebony board is always configured as the host & requires the
* PCI arbiter to be enabled.
*--------------------------------------------------------------------------*/
strap = mfdcr(CPC0_STRP1);
if ((strap & 0x00100000) == 0) {
printf("PCI: CPC0_STRP1[PAE] not set.\n");
return 0;
}
return 1;
}
#endif /* defined(CONFIG_PCI) */
/*************************************************************************
* pci_target_init
*
* The bootstrap configuration provides default settings for the pci
* inbound map (PIM). But the bootstrap config choices are limited and
* may not be sufficient for a given board.
*
************************************************************************/
#if defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT)
void pci_target_init(struct pci_controller *hose)
{
/*--------------------------------------------------------------------------+
* Disable everything
*--------------------------------------------------------------------------*/
out32r(PCIL0_PIM0SA, 0); /* disable */
out32r(PCIL0_PIM1SA, 0); /* disable */
out32r(PCIL0_PIM2SA, 0); /* disable */
out32r(PCIL0_EROMBA, 0); /* disable expansion rom */
/*--------------------------------------------------------------------------+
* Map all of SDRAM to PCI address 0x0000_0000. Note that the 440 strapping
* options to not support sizes such as 128/256 MB.
*--------------------------------------------------------------------------*/
out32r(PCIL0_PIM0LAL, CONFIG_SYS_SDRAM_BASE);
out32r(PCIL0_PIM0LAH, 0);
out32r(PCIL0_PIM0SA, ~(gd->ram_size - 1) | 1);
out32r(PCIL0_BAR0, 0);
/*--------------------------------------------------------------------------+
* Program the board's subsystem id/vendor id
*--------------------------------------------------------------------------*/
out16r(PCIL0_SBSYSVID, CONFIG_SYS_PCI_SUBSYS_VENDORID);
out16r(PCIL0_SBSYSID, CONFIG_SYS_PCI_SUBSYS_DEVICEID);
out16r(PCIL0_CMD, in16r(PCIL0_CMD) | PCI_COMMAND_MEMORY);
}
#endif /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT) */
/*************************************************************************
* is_pci_host
*
* This routine is called to determine if a pci scan should be
* performed. With various hardware environments (especially cPCI and
* PPMC) it's insufficient to depend on the state of the arbiter enable
* bit in the strap register, or generic host/adapter assumptions.
*
* Rather than hard-code a bad assumption in the general 440 code, the
* 440 pci code requires the board to decide at runtime.
*
* Return 0 for adapter mode, non-zero for host (monarch) mode.
*
*
************************************************************************/
#if defined(CONFIG_PCI)
int is_pci_host(struct pci_controller *hose)
{
/* The ebony board is always configured as host. */
return (1);
}
#endif /* defined(CONFIG_PCI) */

View file

@ -1,141 +0,0 @@
/*
* (C) Copyright 2002
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
.bootpg 0xFFFFF000 :
{
cpu/ppc4xx/start.o (.bootpg)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
cpu/ppc4xx/start.o (.text)
board/amcc/ebony/init.o (.text)
*(.text)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss (NOLOAD) :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
}
_end = . ;
PROVIDE (end = .);
}

View file

@ -25,9 +25,11 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).a
COBJS = $(BOARD).o cmd_katmai.o
COBJS-y := $(BOARD).o
COBJS-$(CONFIG_CMD_CHIP_CONFIG) += chip_config.o
SOBJS = init.o
COBJS := $(COBJS-y)
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
SOBJS := $(addprefix $(obj),$(SOBJS))

View file

@ -0,0 +1,55 @@
/*
* (C) Copyright 2009
* Stefan Roese, DENX Software Engineering, sr@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
*/
#include <common.h>
#include <asm/ppc4xx_config.h>
struct ppc4xx_config ppc4xx_config_val[] = {
{
"400-133","CPU: 400 PLB: 133 OPB: 66 EBC: 66",
{ 0x86, 0x78, 0xc2, 0xc6, 0x05, 0xa5, 0x04, 0xe1 }
},
{
"500-166","CPU: 500 PLB: 166 OPB: 83 EBC: 83",
{ 0x87, 0x78, 0xf2, 0xc6, 0x05, 0xa5, 0x04, 0xe1 }
},
{
"533-133","CPU: 533 PLB: 133 OPB: 66 EBC: 66",
{ 0x87, 0x79, 0x02, 0x52, 0x05, 0xa5, 0x04, 0xe1 }
},
{
"667-133","CPU: 667 PLB: 133 OPB: 66 EBC: 66",
{ 0x87, 0x79, 0x42, 0x56, 0x05, 0xa5, 0x04, 0xe1 }
},
{
"667-166","CPU: 667 PLB: 166 OPB: 83 EBC: 83",
{ 0x87, 0x79, 0x42, 0x06, 0x05, 0xa5, 0x04, 0xe1 }
},
{
"800-160","CPU: 800 PLB: 160 OPB: 53 EBC: 17",
{ 0x86, 0x79, 0x81, 0xa7, 0x07, 0xa5, 0x04, 0xe1 }
},
};
int ppc4xx_config_count = ARRAY_SIZE(ppc4xx_config_val);

View file

@ -1,218 +0,0 @@
/*
* (C) Copyright 2007
* Stefan Roese, DENX Software Engineering, sr@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
*/
#include <common.h>
#include <command.h>
#include <i2c.h>
#include <asm/byteorder.h>
#define CONFIG_STRESS /* enable 667 MHz CPU freq selection */
#define DEBUG
static int do_bootstrap(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
uchar chip;
ulong data;
int nbytes;
extern char console_buffer[];
char sysClock[4];
char cpuClock[4];
char plbClock[4];
char pcixClock[4];
if (argc < 3) {
cmd_usage(cmdtp);
return 1;
}
if (strcmp(argv[2], "prom0") == 0)
chip = IIC0_BOOTPROM_ADDR;
else
chip = IIC0_ALT_BOOTPROM_ADDR;
/* on Katmai SysClk is always 33MHz */
strcpy(sysClock, "33");
do {
#ifdef CONFIG_STRESS
printf("enter cpu clock frequency 400, 500, 533, 667 MHz or quit to abort\n");
#else
printf("enter cpu clock frequency 400, 500, 533 MHz or quit to abort\n");
#endif
nbytes = readline (" ? ");
if (strcmp(console_buffer, "quit") == 0)
return 0;
if ((strcmp(console_buffer, "400") != 0) &&
(strcmp(console_buffer, "500") != 0) &&
(strcmp(console_buffer, "533") != 0)
#ifdef CONFIG_STRESS
&& (strcmp(console_buffer, "667") != 0)
#endif
) {
nbytes = 0;
}
strcpy(cpuClock, console_buffer);
} while (nbytes == 0);
if (strcmp(cpuClock, "500") == 0)
strcpy(plbClock, "166");
else if (strcmp(cpuClock, "533") == 0)
strcpy(plbClock, "133");
else {
do {
if (strcmp(cpuClock, "400") == 0)
printf("enter plb clock frequency 100, 133 MHz or quit to abort\n");
#ifdef CONFIG_STRESS
if (strcmp(cpuClock, "667") == 0)
printf("enter plb clock frequency 133, 166 MHz or quit to abort\n");
#endif
nbytes = readline (" ? ");
if (strcmp(console_buffer, "quit") == 0)
return 0;
if (strcmp(cpuClock, "400") == 0) {
if ((strcmp(console_buffer, "100") != 0) &&
(strcmp(console_buffer, "133") != 0))
nbytes = 0;
}
#ifdef CONFIG_STRESS
if (strcmp(cpuClock, "667") == 0) {
if ((strcmp(console_buffer, "133") != 0) &&
(strcmp(console_buffer, "166") != 0))
nbytes = 0;
}
#endif
strcpy(plbClock, console_buffer);
} while (nbytes == 0);
}
do {
printf("enter Pci-X clock frequency 33, 66, 100 or 133 MHz or quit to abort\n");
nbytes = readline (" ? ");
if (strcmp(console_buffer, "quit") == 0)
return 0;
if ((strcmp(console_buffer, "33") != 0) &&
(strcmp(console_buffer, "66") != 0) &&
(strcmp(console_buffer, "100") != 0) &&
(strcmp(console_buffer, "133") != 0)) {
nbytes = 0;
}
strcpy(pcixClock, console_buffer);
} while (nbytes == 0);
printf("\nsys clk = %s MHz\n", sysClock);
printf("cpu clk = %s MHz\n", cpuClock);
printf("plb clk = %s MHz\n", plbClock);
printf("Pci-X clk = %s MHz\n", pcixClock);
do {
printf("\npress [y] to write I2C bootstrap \n");
printf("or [n] to abort. \n");
printf("Don't forget to set board switches \n");
printf("according to your choice before re-starting \n");
printf("(refer to 440spe_uboot_kit_um_1_01.pdf) \n");
nbytes = readline (" ? ");
if (strcmp(console_buffer, "n") == 0)
return 0;
} while (nbytes == 0);
if (strcmp(sysClock, "33") == 0) {
if ((strcmp(cpuClock, "400") == 0) &&
(strcmp(plbClock, "100") == 0))
data = 0x8678c206;
if ((strcmp(cpuClock, "400") == 0) &&
(strcmp(plbClock, "133") == 0))
data = 0x8678c2c6;
if ((strcmp(cpuClock, "500") == 0))
data = 0x8778f2c6;
if ((strcmp(cpuClock, "533") == 0))
data = 0x87790252;
#ifdef CONFIG_STRESS
if ((strcmp(cpuClock, "667") == 0) &&
(strcmp(plbClock, "133") == 0))
data = 0x87794256;
if ((strcmp(cpuClock, "667") == 0) &&
(strcmp(plbClock, "166") == 0))
data = 0x87794206;
#endif
}
#ifdef DEBUG
printf(" pin strap0 to write in i2c = %lx\n", data);
#endif /* DEBUG */
if (i2c_write(chip, 0, 1, (uchar *)&data, 4) != 0)
printf("Error writing strap0 in %s\n", argv[2]);
if (strcmp(pcixClock, "33") == 0)
data = 0x000007E1;
if (strcmp(pcixClock, "66") == 0)
data = 0x000006E1;
if (strcmp(pcixClock, "100") == 0)
data = 0x000005E1;
if (strcmp(pcixClock, "133") == 0)
data = 0x000004E1;
if (strcmp(plbClock, "166") == 0)
/* data |= 0x05950000; */ /* this set's DDR2 clock == PLB clock */
data |= 0x05A50000; /* this set's DDR2 clock == 2 * PLB clock */
else
data |= 0x05A50000;
#ifdef DEBUG
printf(" pin strap1 to write in i2c = %lx\n", data);
#endif /* DEBUG */
udelay(1000);
if (i2c_write(chip, 4, 1, (uchar *)&data, 4) != 0)
printf("Error writing strap1 in %s\n", argv[2]);
return 0;
}
U_BOOT_CMD(
bootstrap, 3, 1, do_bootstrap,
"program the serial device strap",
"wrclk [prom0|prom1] - program the serial device strap"
);

View file

@ -1,5 +1,5 @@
/*
* (C) Copyright 2007-2008
* (C) Copyright 2007-2009
* Stefan Roese, DENX Software Engineering, sr@denx.de.
*
* See file CREDITS for list of people who contributed to this
@ -260,98 +260,8 @@ u32 ddr_clktr(u32 default_val) {
return (SDRAM_CLKTR_CLKP_90_DEG_ADV);
}
/*************************************************************************
* pci_pre_init
*
* This routine is called just prior to registering the hose and gives
* the board the opportunity to check things. Returning a value of zero
* indicates that things are bad & PCI initialization should be aborted.
*
* Different boards may wish to customize the pci controller structure
* (add regions, override default access routines, etc) or perform
* certain pre-initialization actions.
*
************************************************************************/
#if defined(CONFIG_PCI)
int pci_pre_init(struct pci_controller * hose )
{
unsigned long strap;
/*-------------------------------------------------------------------+
* The katmai board is always configured as the host & requires the
* PCI arbiter to be enabled.
*-------------------------------------------------------------------*/
mfsdr(SDR0_SDSTP1, strap);
if( (strap & SDR0_SDSTP1_PAE_MASK) == 0 ) {
printf("PCI: SDR0_STRP1[%08lX] - PCI Arbiter disabled.\n",strap);
return 0;
}
return 1;
}
#endif /* defined(CONFIG_PCI) */
/*************************************************************************
* pci_target_init
*
* The bootstrap configuration provides default settings for the pci
* inbound map (PIM). But the bootstrap config choices are limited and
* may not be sufficient for a given board.
*
************************************************************************/
#if defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT)
void pci_target_init(struct pci_controller * hose )
{
/*-------------------------------------------------------------------+
* Disable everything
*-------------------------------------------------------------------*/
out32r( PCIL0_PIM0SA, 0 ); /* disable */
out32r( PCIL0_PIM1SA, 0 ); /* disable */
out32r( PCIL0_PIM2SA, 0 ); /* disable */
out32r( PCIL0_EROMBA, 0 ); /* disable expansion rom */
/*-------------------------------------------------------------------+
* Map all of SDRAM to PCI address 0x0000_0000. Note that the 440
* strapping options to not support sizes such as 128/256 MB.
*-------------------------------------------------------------------*/
out32r( PCIL0_PIM0LAL, CONFIG_SYS_SDRAM_BASE );
out32r( PCIL0_PIM0LAH, 0 );
out32r( PCIL0_PIM0SA, ~(gd->ram_size - 1) | 1 );
out32r( PCIL0_BAR0, 0 );
/*-------------------------------------------------------------------+
* Program the board's subsystem id/vendor id
*-------------------------------------------------------------------*/
out16r( PCIL0_SBSYSVID, CONFIG_SYS_PCI_SUBSYS_VENDORID );
out16r( PCIL0_SBSYSID, CONFIG_SYS_PCI_SUBSYS_DEVICEID );
out16r( PCIL0_CMD, in16r(PCIL0_CMD) | PCI_COMMAND_MEMORY );
}
#endif /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT) */
#if defined(CONFIG_PCI)
/*************************************************************************
* is_pci_host
*
* This routine is called to determine if a pci scan should be
* performed. With various hardware environments (especially cPCI and
* PPMC) it's insufficient to depend on the state of the arbiter enable
* bit in the strap register, or generic host/adapter assumptions.
*
* Rather than hard-code a bad assumption in the general 440 code, the
* 440 pci code requires the board to decide at runtime.
*
* Return 0 for adapter mode, non-zero for host (monarch) mode.
*
*
************************************************************************/
int is_pci_host(struct pci_controller *hose)
{
/* The katmai board is always configured as host. */
return 1;
}
static int katmai_pcie_card_present(int port)
int board_pcie_card_present(int port)
{
u32 val;
@ -367,91 +277,8 @@ static int katmai_pcie_card_present(int port)
return 0;
}
}
static struct pci_controller pcie_hose[3] = {{0},{0},{0}};
void pcie_setup_hoses(int busno)
{
struct pci_controller *hose;
int i, bus;
int ret = 0;
char *env;
unsigned int delay;
/*
* assume we're called after the PCIX hose is initialized, which takes
* bus ID 0 and therefore start numbering PCIe's from 1.
*/
bus = busno;
for (i = 0; i <= 2; i++) {
/* Check for katmai card presence */
if (!katmai_pcie_card_present(i))
continue;
if (is_end_point(i))
ret = ppc4xx_init_pcie_endport(i);
else
ret = ppc4xx_init_pcie_rootport(i);
if (ret == -ENODEV)
continue;
if (ret) {
printf("PCIE%d: initialization as %s failed\n", i,
is_end_point(i) ? "endpoint" : "root-complex");
continue;
}
hose = &pcie_hose[i];
hose->first_busno = bus;
hose->last_busno = bus;
hose->current_busno = bus;
/* setup mem resource */
pci_set_region(hose->regions + 0,
CONFIG_SYS_PCIE_MEMBASE + i * CONFIG_SYS_PCIE_MEMSIZE,
CONFIG_SYS_PCIE_MEMBASE + i * CONFIG_SYS_PCIE_MEMSIZE,
CONFIG_SYS_PCIE_MEMSIZE,
PCI_REGION_MEM);
hose->region_count = 1;
pci_register_hose(hose);
if (is_end_point(i)) {
ppc4xx_setup_pcie_endpoint(hose, i);
/*
* Reson for no scanning is endpoint can not generate
* upstream configuration accesses.
*/
} else {
ppc4xx_setup_pcie_rootpoint(hose, i);
env = getenv ("pciscandelay");
if (env != NULL) {
delay = simple_strtoul(env, NULL, 10);
if (delay > 5)
printf("Warning, expect noticable delay before "
"PCIe scan due to 'pciscandelay' value!\n");
mdelay(delay * 1000);
}
/*
* Config access can only go down stream
*/
hose->last_busno = pci_hose_scan(hose);
bus = hose->last_busno + 1;
}
}
}
#endif /* defined(CONFIG_PCI) */
#ifdef CONFIG_POST
/*
* Returns 1 if keys pressed to start the power-on long-running tests
* Called from board_init_f().
*/
int post_hotkeys_pressed(void)
{
return (ctrlc());
}
#endif
int board_eth_init(bd_t *bis)
{
cpu_eth_init(bis);

View file

@ -1,138 +0,0 @@
/*
* (C) Copyright 2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
.bootpg 0xFFFFF000 :
{
cpu/ppc4xx/start.o (.bootpg)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
cpu/ppc4xx/start.o (.text)
board/amcc/katmai/init.o (.text)
*(.text)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss (NOLOAD) :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
}
_end = . ;
PROVIDE (end = .);
}

View file

@ -30,3 +30,7 @@ endif
ifeq ($(debug),1)
PLATFORM_CPPFLAGS += -DDEBUG
endif
ifdef CONFIG_NAND_U_BOOT
LDSCRIPT := $(TOPDIR)/board/$(BOARDDIR)/u-boot-nand.lds
endif

View file

@ -252,15 +252,19 @@ int board_emac_count(void)
return 2;
}
static int board_pcie_count(void)
/*
* Override the weak default implementation and return the
* last PCIe slot number (max number - 1).
*/
int board_pcie_last(void)
{
/*
* 405EXr only has one EMAC interface, 405EX has two
*/
if (is_405exr())
return 1;
return 1 - 1;
else
return 2;
return 2 - 1;
}
int checkboard (void)
@ -280,100 +284,3 @@ int checkboard (void)
return (0);
}
/*************************************************************************
* pci_pre_init
*
* This routine is called just prior to registering the hose and gives
* the board the opportunity to check things. Returning a value of zero
* indicates that things are bad & PCI initialization should be aborted.
*
* Different boards may wish to customize the pci controller structure
* (add regions, override default access routines, etc) or perform
* certain pre-initialization actions.
*
************************************************************************/
#if defined(CONFIG_PCI)
int pci_pre_init(struct pci_controller * hose )
{
return 0;
}
#endif /* defined(CONFIG_PCI) */
#ifdef CONFIG_PCI
static struct pci_controller pcie_hose[2] = {{0},{0}};
void pcie_setup_hoses(int busno)
{
struct pci_controller *hose;
int i, bus;
int ret = 0;
bus = busno;
char *env;
unsigned int delay;
for (i = 0; i < board_pcie_count(); i++) {
if (is_end_point(i))
ret = ppc4xx_init_pcie_endport(i);
else
ret = ppc4xx_init_pcie_rootport(i);
if (ret == -ENODEV)
continue;
if (ret) {
printf("PCIE%d: initialization as %s failed\n", i,
is_end_point(i) ? "endpoint" : "root-complex");
continue;
}
hose = &pcie_hose[i];
hose->first_busno = bus;
hose->last_busno = bus;
hose->current_busno = bus;
/* setup mem resource */
pci_set_region(hose->regions + 0,
CONFIG_SYS_PCIE_MEMBASE + i * CONFIG_SYS_PCIE_MEMSIZE,
CONFIG_SYS_PCIE_MEMBASE + i * CONFIG_SYS_PCIE_MEMSIZE,
CONFIG_SYS_PCIE_MEMSIZE,
PCI_REGION_MEM);
hose->region_count = 1;
pci_register_hose(hose);
if (is_end_point(i)) {
ppc4xx_setup_pcie_endpoint(hose, i);
/*
* Reson for no scanning is endpoint can not generate
* upstream configuration accesses.
*/
} else {
ppc4xx_setup_pcie_rootpoint(hose, i);
env = getenv ("pciscandelay");
if (env != NULL) {
delay = simple_strtoul(env, NULL, 10);
if (delay > 5)
printf("Warning, expect noticable delay before "
"PCIe scan due to 'pciscandelay' value!\n");
mdelay(delay * 1000);
}
/*
* Config access can only go down stream
*/
hose->last_busno = pci_hose_scan(hose);
bus = hose->last_busno + 1;
}
}
}
#endif
#if defined(CONFIG_POST)
/*
* Returns 1 if keys pressed to start the power-on long-running tests
* Called from board_init_f().
*/
int post_hotkeys_pressed(void)
{
return 0; /* No hotkeys supported */
}
#endif /* CONFIG_POST */

View file

@ -1,134 +0,0 @@
/*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
/* To compile successfully, uncomment the following section.
* To go in ram, remove the section.
* Added by SunHe.
*/
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
cpu/ppc4xx/start.o (.text)
*(.text)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss (NOLOAD) :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
}
_end = . ;
PROVIDE (end = .);
}

View file

@ -126,102 +126,6 @@ u32 ddr_clktr(u32 default_val) {
return (SDRAM_CLKTR_CLKP_180_DEG_ADV);
}
/*************************************************************************
* pci_pre_init
*
* This routine is called just prior to registering the hose and gives
* the board the opportunity to check things. Returning a value of zero
* indicates that things are bad & PCI initialization should be aborted.
*
* Different boards may wish to customize the pci controller structure
* (add regions, override default access routines, etc) or perform
* certain pre-initialization actions.
*
************************************************************************/
#if defined(CONFIG_PCI)
int pci_pre_init( struct pci_controller *hose )
{
unsigned long strap;
/*--------------------------------------------------------------------------+
* The luan board is always configured as the host & requires the
* PCI arbiter to be enabled.
*--------------------------------------------------------------------------*/
mfsdr(SDR0_SDSTP1, strap);
if( (strap & SDR0_SDSTP1_PAE_MASK) == 0 ) {
printf("PCI: SDR0_STRP1[%08lX] - PCI Arbiter disabled.\n",strap);
return 0;
}
return 1;
}
#endif /* defined(CONFIG_PCI) */
/*************************************************************************
* pci_target_init
*
* The bootstrap configuration provides default settings for the pci
* inbound map (PIM). But the bootstrap config choices are limited and
* may not be sufficient for a given board.
*
************************************************************************/
#if defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT)
void pci_target_init(struct pci_controller *hose)
{
/*--------------------------------------------------------------------------+
* Disable everything
*--------------------------------------------------------------------------*/
out32r( PCIL0_PIM0SA, 0 ); /* disable */
out32r( PCIL0_PIM1SA, 0 ); /* disable */
out32r( PCIL0_PIM2SA, 0 ); /* disable */
out32r( PCIL0_EROMBA, 0 ); /* disable expansion rom */
/*--------------------------------------------------------------------------+
* Map all of SDRAM to PCI address 0x0000_0000. Note that the 440 strapping
* options to not support sizes such as 128/256 MB.
*--------------------------------------------------------------------------*/
out32r( PCIL0_PIM0LAL, CONFIG_SYS_SDRAM_BASE );
out32r( PCIL0_PIM0LAH, 0 );
out32r( PCIL0_PIM0SA, ~(gd->ram_size - 1) | 1 );
out32r( PCIL0_BAR0, 0 );
/*--------------------------------------------------------------------------+
* Program the board's subsystem id/vendor id
*--------------------------------------------------------------------------*/
out16r( PCIL0_SBSYSVID, CONFIG_SYS_PCI_SUBSYS_VENDORID );
out16r( PCIL0_SBSYSID, CONFIG_SYS_PCI_SUBSYS_DEVICEID );
out16r( PCIL0_CMD, in16r(PCIL0_CMD) | PCI_COMMAND_MEMORY );
}
#endif /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT) */
/*************************************************************************
* is_pci_host
*
* This routine is called to determine if a pci scan should be
* performed. With various hardware environments (especially cPCI and
* PPMC) it's insufficient to depend on the state of the arbiter enable
* bit in the strap register, or generic host/adapter assumptions.
*
* Rather than hard-code a bad assumption in the general 440 code, the
* 440 pci code requires the board to decide at runtime.
*
* Return 0 for adapter mode, non-zero for host (monarch) mode.
*
*
************************************************************************/
#if defined(CONFIG_PCI)
int is_pci_host(struct pci_controller *hose)
{
return 1;
}
#endif /* defined(CONFIG_PCI) */
/*************************************************************************
* hw_watchdog_reset
*

View file

@ -1,141 +0,0 @@
/*
* (C) Copyright 2002
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
.bootpg 0xFFFFF000 :
{
cpu/ppc4xx/start.o (.bootpg)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
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.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
cpu/ppc4xx/start.o (.text)
board/amcc/luan/init.o (.text)
*(.text)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss (NOLOAD) :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
}
_end = . ;
PROVIDE (end = .);
}

View file

@ -236,100 +236,3 @@ int checkboard (void)
return (0);
}
/*************************************************************************
* pci_pre_init
*
* This routine is called just prior to registering the hose and gives
* the board the opportunity to check things. Returning a value of zero
* indicates that things are bad & PCI initialization should be aborted.
*
* Different boards may wish to customize the pci controller structure
* (add regions, override default access routines, etc) or perform
* certain pre-initialization actions.
*
************************************************************************/
#if defined(CONFIG_PCI)
int pci_pre_init(struct pci_controller * hose )
{
return 0;
}
#endif /* defined(CONFIG_PCI) */
#ifdef CONFIG_PCI
static struct pci_controller pcie_hose[2] = {{0},{0}};
void pcie_setup_hoses(int busno)
{
struct pci_controller *hose;
int i, bus;
int ret = 0;
bus = busno;
char *env;
unsigned int delay;
for (i = 0; i < 2; i++) {
if (is_end_point(i))
ret = ppc4xx_init_pcie_endport(i);
else
ret = ppc4xx_init_pcie_rootport(i);
if (ret == -ENODEV)
continue;
if (ret) {
printf("PCIE%d: initialization as %s failed\n", i,
is_end_point(i) ? "endpoint" : "root-complex");
continue;
}
hose = &pcie_hose[i];
hose->first_busno = bus;
hose->last_busno = bus;
hose->current_busno = bus;
/* setup mem resource */
pci_set_region(hose->regions + 0,
CONFIG_SYS_PCIE_MEMBASE + i * CONFIG_SYS_PCIE_MEMSIZE,
CONFIG_SYS_PCIE_MEMBASE + i * CONFIG_SYS_PCIE_MEMSIZE,
CONFIG_SYS_PCIE_MEMSIZE,
PCI_REGION_MEM);
hose->region_count = 1;
pci_register_hose(hose);
if (is_end_point(i)) {
ppc4xx_setup_pcie_endpoint(hose, i);
/*
* Reson for no scanning is endpoint can not generate
* upstream configuration accesses.
*/
} else {
ppc4xx_setup_pcie_rootpoint(hose, i);
env = getenv ("pciscandelay");
if (env != NULL) {
delay = simple_strtoul(env, NULL, 10);
if (delay > 5)
printf("Warning, expect noticable delay before "
"PCIe scan due to 'pciscandelay' value!\n");
mdelay(delay * 1000);
}
/*
* Config access can only go down stream
*/
hose->last_busno = pci_hose_scan(hose);
bus = hose->last_busno + 1;
}
}
}
#endif
#if defined(CONFIG_POST)
/*
* Returns 1 if keys pressed to start the power-on long-running tests
* Called from board_init_f().
*/
int post_hotkeys_pressed(void)
{
return 0; /* No hotkeys supported */
}
#endif /* CONFIG_POST */

View file

@ -1,134 +0,0 @@
/*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
/* To compile successfully, uncomment the following section.
* To go in ram, remove the section.
* Added by SunHe.
*/
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
cpu/ppc4xx/start.o (.text)
*(.text)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss (NOLOAD) :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
}
_end = . ;
PROVIDE (end = .);
}

View file

@ -275,102 +275,6 @@ long int fixed_sdram (void)
}
#endif /* !defined(CONFIG_SPD_EEPROM) */
/*************************************************************************
* pci_pre_init
*
* This routine is called just prior to registering the hose and gives
* the board the opportunity to check things. Returning a value of zero
* indicates that things are bad & PCI initialization should be aborted.
*
* Different boards may wish to customize the pci controller structure
* (add regions, override default access routines, etc) or perform
* certain pre-initialization actions.
*
************************************************************************/
#if defined(CONFIG_PCI)
int pci_pre_init(struct pci_controller * hose )
{
unsigned long strap;
/*--------------------------------------------------------------------------+
* The ocotea board is always configured as the host & requires the
* PCI arbiter to be enabled.
*--------------------------------------------------------------------------*/
mfsdr(SDR0_SDSTP1, strap);
if( (strap & SDR0_SDSTP1_PAE_MASK) == 0 ){
printf("PCI: SDR0_STRP1[%08lX] - PCI Arbiter disabled.\n",strap);
return 0;
}
return 1;
}
#endif /* defined(CONFIG_PCI) */
/*************************************************************************
* pci_target_init
*
* The bootstrap configuration provides default settings for the pci
* inbound map (PIM). But the bootstrap config choices are limited and
* may not be sufficient for a given board.
*
************************************************************************/
#if defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT)
void pci_target_init(struct pci_controller * hose )
{
/*--------------------------------------------------------------------------+
* Disable everything
*--------------------------------------------------------------------------*/
out32r( PCIL0_PIM0SA, 0 ); /* disable */
out32r( PCIL0_PIM1SA, 0 ); /* disable */
out32r( PCIL0_PIM2SA, 0 ); /* disable */
out32r( PCIL0_EROMBA, 0 ); /* disable expansion rom */
/*--------------------------------------------------------------------------+
* Map all of SDRAM to PCI address 0x0000_0000. Note that the 440 strapping
* options to not support sizes such as 128/256 MB.
*--------------------------------------------------------------------------*/
out32r( PCIL0_PIM0LAL, CONFIG_SYS_SDRAM_BASE );
out32r( PCIL0_PIM0LAH, 0 );
out32r( PCIL0_PIM0SA, ~(gd->ram_size - 1) | 1 );
out32r( PCIL0_BAR0, 0 );
/*--------------------------------------------------------------------------+
* Program the board's subsystem id/vendor id
*--------------------------------------------------------------------------*/
out16r( PCIL0_SBSYSVID, CONFIG_SYS_PCI_SUBSYS_VENDORID );
out16r( PCIL0_SBSYSID, CONFIG_SYS_PCI_SUBSYS_DEVICEID );
out16r( PCIL0_CMD, in16r(PCIL0_CMD) | PCI_COMMAND_MEMORY );
}
#endif /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT) */
/*************************************************************************
* is_pci_host
*
* This routine is called to determine if a pci scan should be
* performed. With various hardware environments (especially cPCI and
* PPMC) it's insufficient to depend on the state of the arbiter enable
* bit in the strap register, or generic host/adapter assumptions.
*
* Rather than hard-code a bad assumption in the general 440 code, the
* 440 pci code requires the board to decide at runtime.
*
* Return 0 for adapter mode, non-zero for host (monarch) mode.
*
*
************************************************************************/
#if defined(CONFIG_PCI)
int is_pci_host(struct pci_controller *hose)
{
/* The ocotea board is always configured as host. */
return(1);
}
#endif /* defined(CONFIG_PCI) */
void fpga_init(void)
{
unsigned long group;
@ -496,15 +400,3 @@ void fpga_init(void)
return;
}
#ifdef CONFIG_POST
/*
* Returns 1 if keys pressed to start the power-on long-running tests
* Called from board_init_f().
*/
int post_hotkeys_pressed(void)
{
return (ctrlc());
}
#endif

View file

@ -1,141 +0,0 @@
/*
* (C) Copyright 2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
.bootpg 0xFFFFF000 :
{
cpu/ppc4xx/start.o (.bootpg)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
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.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
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.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
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.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
cpu/ppc4xx/start.o (.text)
board/amcc/ocotea/init.o (.text)
*(.text)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss (NOLOAD) :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
}
_end = . ;
PROVIDE (end = .);
}

View file

@ -1,145 +0,0 @@
/*
* (C) Copyright 2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
.bootpg 0xFFFFF000 :
{
cpu/ppc4xx/start.o (.bootpg)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
cpu/ppc4xx/start.o (.text)
board/amcc/redwood/init.o (.text)
/* . = env_offset;*/
/* common/env_embedded.o(.text)*/
*(.text)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
}
_end = . ;
PROVIDE (end = .);
}

View file

@ -43,3 +43,7 @@ endif
ifeq ($(dbcr),1)
PLATFORM_CPPFLAGS += -DCONFIG_SYS_INIT_DBCR=0x8cff0000
endif
ifdef CONFIG_NAND_U_BOOT
LDSCRIPT := $(TOPDIR)/board/$(BOARDDIR)/u-boot-nand.lds
endif

View file

@ -364,183 +364,12 @@ int checkboard(void)
/*
* Assign interrupts to PCI devices.
*/
void sequoia_pci_fixup_irq(struct pci_controller *hose, pci_dev_t dev)
void board_pci_fixup_irq(struct pci_controller *hose, pci_dev_t dev)
{
pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, VECNUM_EIRQ2);
}
#endif
/*
* pci_pre_init
*
* This routine is called just prior to registering the hose and gives
* the board the opportunity to check things. Returning a value of zero
* indicates that things are bad & PCI initialization should be aborted.
*
* Different boards may wish to customize the pci controller structure
* (add regions, override default access routines, etc) or perform
* certain pre-initialization actions.
*/
#if defined(CONFIG_PCI)
int pci_pre_init(struct pci_controller *hose)
{
unsigned long addr;
/*
* Set priority for all PLB3 devices to 0.
* Set PLB3 arbiter to fair mode.
*/
mfsdr(SD0_AMP1, addr);
mtsdr(SD0_AMP1, (addr & 0x000000FF) | 0x0000FF00);
addr = mfdcr(PLB3_ACR);
mtdcr(PLB3_ACR, addr | 0x80000000);
/*
* Set priority for all PLB4 devices to 0.
*/
mfsdr(SD0_AMP0, addr);
mtsdr(SD0_AMP0, (addr & 0x000000FF) | 0x0000FF00);
addr = mfdcr(PLB4_ACR) | 0xa0000000; /* Was 0x8---- */
mtdcr(PLB4_ACR, addr);
/*
* Set Nebula PLB4 arbiter to fair mode.
*/
/* Segment0 */
addr = (mfdcr(PLB0_ACR) & ~PLB0_ACR_PPM_MASK) | PLB0_ACR_PPM_FAIR;
addr = (addr & ~PLB0_ACR_HBU_MASK) | PLB0_ACR_HBU_ENABLED;
addr = (addr & ~PLB0_ACR_RDP_MASK) | PLB0_ACR_RDP_4DEEP;
addr = (addr & ~PLB0_ACR_WRP_MASK) | PLB0_ACR_WRP_2DEEP;
mtdcr(PLB0_ACR, addr);
/* Segment1 */
addr = (mfdcr(PLB1_ACR) & ~PLB1_ACR_PPM_MASK) | PLB1_ACR_PPM_FAIR;
addr = (addr & ~PLB1_ACR_HBU_MASK) | PLB1_ACR_HBU_ENABLED;
addr = (addr & ~PLB1_ACR_RDP_MASK) | PLB1_ACR_RDP_4DEEP;
addr = (addr & ~PLB1_ACR_WRP_MASK) | PLB1_ACR_WRP_2DEEP;
mtdcr(PLB1_ACR, addr);
#ifdef CONFIG_PCI_PNP
hose->fixup_irq = sequoia_pci_fixup_irq;
#endif
return 1;
}
#endif /* defined(CONFIG_PCI) */
/*
* pci_target_init
*
* The bootstrap configuration provides default settings for the pci
* inbound map (PIM). But the bootstrap config choices are limited and
* may not be sufficient for a given board.
*/
#if defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT)
void pci_target_init(struct pci_controller *hose)
{
/*
* Set up Direct MMIO registers
*/
/*
* PowerPC440EPX PCI Master configuration.
* Map one 1Gig range of PLB/processor addresses to PCI memory space.
* PLB address 0xA0000000-0xDFFFFFFF
* ==> PCI address 0xA0000000-0xDFFFFFFF
* Use byte reversed out routines to handle endianess.
* Make this region non-prefetchable.
*/
out32r(PCIL0_PMM0MA, 0x00000000); /* PMM0 Mask/Attribute */
/* - disabled b4 setting */
out32r(PCIL0_PMM0LA, CONFIG_SYS_PCI_MEMBASE); /* PMM0 Local Address */
out32r(PCIL0_PMM0PCILA, CONFIG_SYS_PCI_MEMBASE); /* PMM0 PCI Low Address */
out32r(PCIL0_PMM0PCIHA, 0x00000000); /* PMM0 PCI High Address */
out32r(PCIL0_PMM0MA, 0xE0000001); /* 512M + No prefetching, */
/* and enable region */
out32r(PCIL0_PMM1MA, 0x00000000); /* PMM0 Mask/Attribute */
/* - disabled b4 setting */
out32r(PCIL0_PMM1LA, CONFIG_SYS_PCI_MEMBASE2); /* PMM0 Local Address */
out32r(PCIL0_PMM1PCILA, CONFIG_SYS_PCI_MEMBASE2); /* PMM0 PCI Low Address */
out32r(PCIL0_PMM1PCIHA, 0x00000000); /* PMM0 PCI High Address */
out32r(PCIL0_PMM1MA, 0xE0000001); /* 512M + No prefetching, */
/* and enable region */
out32r(PCIL0_PTM1MS, 0x00000001); /* Memory Size/Attribute */
out32r(PCIL0_PTM1LA, 0); /* Local Addr. Reg */
out32r(PCIL0_PTM2MS, 0); /* Memory Size/Attribute */
out32r(PCIL0_PTM2LA, 0); /* Local Addr. Reg */
/*
* Set up Configuration registers
*/
/* Program the board's subsystem id/vendor id */
pci_write_config_word(0, PCI_SUBSYSTEM_VENDOR_ID,
CONFIG_SYS_PCI_SUBSYS_VENDORID);
pci_write_config_word(0, PCI_SUBSYSTEM_ID, CONFIG_SYS_PCI_SUBSYS_ID);
/* Configure command register as bus master */
pci_write_config_word(0, PCI_COMMAND, PCI_COMMAND_MASTER);
/* 240nS PCI clock */
pci_write_config_word(0, PCI_LATENCY_TIMER, 1);
/* No error reporting */
pci_write_config_word(0, PCI_ERREN, 0);
pci_write_config_dword(0, PCI_BRDGOPT2, 0x00000101);
}
#endif /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT) */
#if defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_MASTER_INIT)
void pci_master_init(struct pci_controller *hose)
{
unsigned short temp_short;
/*
* Write the PowerPC440 EP PCI Configuration regs.
* Enable PowerPC440 EP to be a master on the PCI bus (PMM).
* Enable PowerPC440 EP to act as a PCI memory target (PTM).
*/
pci_read_config_word(0, PCI_COMMAND, &temp_short);
pci_write_config_word(0, PCI_COMMAND,
temp_short | PCI_COMMAND_MASTER |
PCI_COMMAND_MEMORY);
}
#endif /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_MASTER_INIT) */
/*
* is_pci_host
*
* This routine is called to determine if a pci scan should be
* performed. With various hardware environments (especially cPCI and
* PPMC) it's insufficient to depend on the state of the arbiter enable
* bit in the strap register, or generic host/adapter assumptions.
*
* Rather than hard-code a bad assumption in the general 440 code, the
* 440 pci code requires the board to decide at runtime.
*
* Return 0 for adapter mode, non-zero for host (monarch) mode.
*/
#if defined(CONFIG_PCI)
int is_pci_host(struct pci_controller *hose)
{
/* Cactus is always configured as host. */
return (1);
}
#endif /* defined(CONFIG_PCI) */
#if defined(CONFIG_POST)
/*
* Returns 1 if keys pressed to start the power-on long-running tests
* Called from board_init_f().
*/
int post_hotkeys_pressed(void)
{
return 0; /* No hotkeys supported */
}
#endif /* CONFIG_POST */
#if defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_SYS_RAMBOOT)
/*
* On NAND-booting sequoia, we need to patch the chips select numbers

View file

@ -1,142 +0,0 @@
/*
* (C) Copyright 2002
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
.bootpg 0xFFFFF000 :
{
cpu/ppc4xx/start.o (.bootpg)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
cpu/ppc4xx/start.o (.text)
*(.text)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss (NOLOAD) :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
}
ppcenv_assert = ASSERT(. < 0xFFFF8000, ".bss section too big, overlaps .ppcenv section. Please update your confguration: CONFIG_SYS_MONITOR_BASE, CONFIG_SYS_MONITOR_LEN and TEXT_BASE may need to be modified.");
_end = . ;
PROVIDE (end = .);
}

View file

@ -1,134 +0,0 @@
/*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
cpu/ppc4xx/start.o (.text)
*(.text)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss (NOLOAD) :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
}
_end = . ;
PROVIDE (end = .);
}

View file

@ -209,110 +209,6 @@ int checkboard (void)
return (0);
}
/*************************************************************************
* pci_pre_init
*
* This routine is called just prior to registering the hose and gives
* the board the opportunity to check things. Returning a value of zero
* indicates that things are bad & PCI initialization should be aborted.
*
* Different boards may wish to customize the pci controller structure
* (add regions, override default access routines, etc) or perform
* certain pre-initialization actions.
*
************************************************************************/
#if defined(CONFIG_PCI)
int pci_pre_init(struct pci_controller * hose )
{
unsigned long strap;
/*--------------------------------------------------------------------------+
* The ocotea board is always configured as the host & requires the
* PCI arbiter to be enabled.
*--------------------------------------------------------------------------*/
mfsdr(SDR0_SDSTP1, strap);
if( (strap & SDR0_SDSTP1_PAE_MASK) == 0 ){
printf("PCI: SDR0_STRP1[%08lX] - PCI Arbiter disabled.\n",strap);
return 0;
}
return 1;
}
#endif /* defined(CONFIG_PCI) */
/*************************************************************************
* pci_target_init
*
* The bootstrap configuration provides default settings for the pci
* inbound map (PIM). But the bootstrap config choices are limited and
* may not be sufficient for a given board.
*
************************************************************************/
#if defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT)
void pci_target_init(struct pci_controller * hose )
{
/*--------------------------------------------------------------------------+
* Disable everything
*--------------------------------------------------------------------------*/
out32r( PCIL0_PIM0SA, 0 ); /* disable */
out32r( PCIL0_PIM1SA, 0 ); /* disable */
out32r( PCIL0_PIM2SA, 0 ); /* disable */
out32r( PCIL0_EROMBA, 0 ); /* disable expansion rom */
/*--------------------------------------------------------------------------+
* Map all of SDRAM to PCI address 0x0000_0000. Note that the 440 strapping
* options to not support sizes such as 128/256 MB.
*--------------------------------------------------------------------------*/
out32r( PCIL0_PIM0LAL, CONFIG_SYS_SDRAM_BASE );
out32r( PCIL0_PIM0LAH, 0 );
out32r( PCIL0_PIM0SA, ~(gd->ram_size - 1) | 1 );
out32r( PCIL0_BAR0, 0 );
/*--------------------------------------------------------------------------+
* Program the board's subsystem id/vendor id
*--------------------------------------------------------------------------*/
out16r( PCIL0_SBSYSVID, CONFIG_SYS_PCI_SUBSYS_VENDORID );
out16r( PCIL0_SBSYSID, CONFIG_SYS_PCI_SUBSYS_DEVICEID );
out16r( PCIL0_CMD, in16r(PCIL0_CMD) | PCI_COMMAND_MEMORY );
}
#endif /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT) */
/*************************************************************************
* is_pci_host
*
* This routine is called to determine if a pci scan should be
* performed. With various hardware environments (especially cPCI and
* PPMC) it's insufficient to depend on the state of the arbiter enable
* bit in the strap register, or generic host/adapter assumptions.
*
* Rather than hard-code a bad assumption in the general 440 code, the
* 440 pci code requires the board to decide at runtime.
*
* Return 0 for adapter mode, non-zero for host (monarch) mode.
*
*
************************************************************************/
#if defined(CONFIG_PCI)
int is_pci_host(struct pci_controller *hose)
{
/* The ocotea board is always configured as host. */
return(1);
}
#endif /* defined(CONFIG_PCI) */
#ifdef CONFIG_POST
/*
* Returns 1 if keys pressed to start the power-on long-running tests
* Called from board_init_f().
*/
int post_hotkeys_pressed(void)
{
return (ctrlc());
}
#endif
int board_eth_init(bd_t *bis)
{
cpu_eth_init(bis);

View file

@ -1,141 +0,0 @@
/*
* (C) Copyright 2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
.bootpg 0xFFFFF000 :
{
cpu/ppc4xx/start.o (.bootpg)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
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.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
cpu/ppc4xx/start.o (.text)
board/amcc/taishan/init.o (.text)
*(.text)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss (NOLOAD) :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
}
_end = . ;
PROVIDE (end = .);
}

View file

@ -1,135 +0,0 @@
/*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
cpu/ppc4xx/start.o (.text)
*(.text)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss (NOLOAD) :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
}
_end = . ;
PROVIDE (end = .);
}

View file

@ -1,141 +0,0 @@
/*
* (C) Copyright 2002
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
.bootpg 0xFFFFF000 :
{
cpu/ppc4xx/start.o (.bootpg)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
cpu/ppc4xx/start.o (.text)
board/amcc/yosemite/init.o (.text)
*(.text)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss (NOLOAD) :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
}
_end = . ;
PROVIDE (end = .);
}

View file

@ -352,166 +352,6 @@ phys_size_t initdram(int board)
return CONFIG_SYS_SDRAM_BANKS * (CONFIG_SYS_KBYTES_SDRAM * 1024); /* return bytes */
}
/*************************************************************************
* pci_pre_init
*
* This routine is called just prior to registering the hose and gives
* the board the opportunity to check things. Returning a value of zero
* indicates that things are bad & PCI initialization should be aborted.
*
* Different boards may wish to customize the pci controller structure
* (add regions, override default access routines, etc) or perform
* certain pre-initialization actions.
*
************************************************************************/
#if defined(CONFIG_PCI)
int pci_pre_init(struct pci_controller *hose)
{
unsigned long addr;
/*-------------------------------------------------------------------------+
| Set priority for all PLB3 devices to 0.
| Set PLB3 arbiter to fair mode.
+-------------------------------------------------------------------------*/
mfsdr(SD0_AMP1, addr);
mtsdr(SD0_AMP1, (addr & 0x000000FF) | 0x0000FF00);
addr = mfdcr(PLB3_ACR);
mtdcr(PLB3_ACR, addr | 0x80000000);
/*-------------------------------------------------------------------------+
| Set priority for all PLB4 devices to 0.
+-------------------------------------------------------------------------*/
mfsdr(SD0_AMP0, addr);
mtsdr(SD0_AMP0, (addr & 0x000000FF) | 0x0000FF00);
addr = mfdcr(PLB4_ACR) | 0xa0000000; /* Was 0x8---- */
mtdcr(PLB4_ACR, addr);
/*-------------------------------------------------------------------------+
| Set Nebula PLB4 arbiter to fair mode.
+-------------------------------------------------------------------------*/
/* Segment0 */
addr = (mfdcr(PLB0_ACR) & ~PLB0_ACR_PPM_MASK) | PLB0_ACR_PPM_FAIR;
addr = (addr & ~PLB0_ACR_HBU_MASK) | PLB0_ACR_HBU_ENABLED;
addr = (addr & ~PLB0_ACR_RDP_MASK) | PLB0_ACR_RDP_4DEEP;
addr = (addr & ~PLB0_ACR_WRP_MASK) | PLB0_ACR_WRP_2DEEP;
mtdcr(PLB0_ACR, addr);
/* Segment1 */
addr = (mfdcr(PLB1_ACR) & ~PLB1_ACR_PPM_MASK) | PLB1_ACR_PPM_FAIR;
addr = (addr & ~PLB1_ACR_HBU_MASK) | PLB1_ACR_HBU_ENABLED;
addr = (addr & ~PLB1_ACR_RDP_MASK) | PLB1_ACR_RDP_4DEEP;
addr = (addr & ~PLB1_ACR_WRP_MASK) | PLB1_ACR_WRP_2DEEP;
mtdcr(PLB1_ACR, addr);
return 1;
}
#endif /* defined(CONFIG_PCI) */
/*************************************************************************
* pci_target_init
*
* The bootstrap configuration provides default settings for the pci
* inbound map (PIM). But the bootstrap config choices are limited and
* may not be sufficient for a given board.
*
************************************************************************/
#if defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT)
void pci_target_init(struct pci_controller *hose)
{
/*--------------------------------------------------------------------------+
* Set up Direct MMIO registers
*--------------------------------------------------------------------------*/
/*--------------------------------------------------------------------------+
| PowerPC440 EP PCI Master configuration.
| Map one 1Gig range of PLB/processor addresses to PCI memory space.
| PLB address 0xA0000000-0xDFFFFFFF ==> PCI address 0xA0000000-0xDFFFFFFF
| Use byte reversed out routines to handle endianess.
| Make this region non-prefetchable.
+--------------------------------------------------------------------------*/
out32r(PCIL0_PMM0MA, 0x00000000); /* PMM0 Mask/Attribute - disabled b4 setting */
out32r(PCIL0_PMM0LA, CONFIG_SYS_PCI_MEMBASE); /* PMM0 Local Address */
out32r(PCIL0_PMM0PCILA, CONFIG_SYS_PCI_MEMBASE); /* PMM0 PCI Low Address */
out32r(PCIL0_PMM0PCIHA, 0x00000000); /* PMM0 PCI High Address */
out32r(PCIL0_PMM0MA, 0xE0000001); /* 512M + No prefetching, and enable region */
out32r(PCIL0_PMM1MA, 0x00000000); /* PMM0 Mask/Attribute - disabled b4 setting */
out32r(PCIL0_PMM1LA, CONFIG_SYS_PCI_MEMBASE2); /* PMM0 Local Address */
out32r(PCIL0_PMM1PCILA, CONFIG_SYS_PCI_MEMBASE2); /* PMM0 PCI Low Address */
out32r(PCIL0_PMM1PCIHA, 0x00000000); /* PMM0 PCI High Address */
out32r(PCIL0_PMM1MA, 0xE0000001); /* 512M + No prefetching, and enable region */
out32r(PCIL0_PTM1MS, 0x00000001); /* Memory Size/Attribute */
out32r(PCIL0_PTM1LA, 0); /* Local Addr. Reg */
out32r(PCIL0_PTM2MS, 0); /* Memory Size/Attribute */
out32r(PCIL0_PTM2LA, 0); /* Local Addr. Reg */
/*--------------------------------------------------------------------------+
* Set up Configuration registers
*--------------------------------------------------------------------------*/
/* Program the board's subsystem id/vendor id */
pci_write_config_word(0, PCI_SUBSYSTEM_VENDOR_ID,
CONFIG_SYS_PCI_SUBSYS_VENDORID);
pci_write_config_word(0, PCI_SUBSYSTEM_ID, CONFIG_SYS_PCI_SUBSYS_ID);
/* Configure command register as bus master */
pci_write_config_word(0, PCI_COMMAND, PCI_COMMAND_MASTER);
/* 240nS PCI clock */
pci_write_config_word(0, PCI_LATENCY_TIMER, 1);
/* No error reporting */
pci_write_config_word(0, PCI_ERREN, 0);
pci_write_config_dword(0, PCI_BRDGOPT2, 0x00000101);
}
#endif /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT) */
/*************************************************************************
* pci_master_init
*
************************************************************************/
#if defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_MASTER_INIT)
void pci_master_init(struct pci_controller *hose)
{
unsigned short temp_short;
/*--------------------------------------------------------------------------+
| Write the PowerPC440 EP PCI Configuration regs.
| Enable PowerPC440 EP to be a master on the PCI bus (PMM).
| Enable PowerPC440 EP to act as a PCI memory target (PTM).
+--------------------------------------------------------------------------*/
pci_read_config_word(0, PCI_COMMAND, &temp_short);
pci_write_config_word(0, PCI_COMMAND,
temp_short | PCI_COMMAND_MASTER |
PCI_COMMAND_MEMORY);
}
#endif /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_MASTER_INIT) */
/*************************************************************************
* is_pci_host
*
* This routine is called to determine if a pci scan should be
* performed. With various hardware environments (especially cPCI and
* PPMC) it's insufficient to depend on the state of the arbiter enable
* bit in the strap register, or generic host/adapter assumptions.
*
* Rather than hard-code a bad assumption in the general 440 code, the
* 440 pci code requires the board to decide at runtime.
*
* Return 0 for adapter mode, non-zero for host (monarch) mode.
*
*
************************************************************************/
#if defined(CONFIG_PCI)
int is_pci_host(struct pci_controller *hose)
{
/* Bamboo is always configured as host. */
return (1);
}
#endif /* defined(CONFIG_PCI) */
/*************************************************************************
* hw_watchdog_reset
*

View file

@ -1,141 +0,0 @@
/*
* (C) Copyright 2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
.bootpg 0xFFFFF000 :
{
cpu/ppc4xx/start.o (.bootpg)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
cpu/ppc4xx/start.o (.text)
board/amcc/yucca/init.o (.text)
*(.text)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss (NOLOAD) :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
}
_end = . ;
PROVIDE (end = .);
}

View file

@ -588,98 +588,8 @@ u32 ddr_clktr(u32 default_val) {
return default_val;
}
/*************************************************************************
* pci_pre_init
*
* This routine is called just prior to registering the hose and gives
* the board the opportunity to check things. Returning a value of zero
* indicates that things are bad & PCI initialization should be aborted.
*
* Different boards may wish to customize the pci controller structure
* (add regions, override default access routines, etc) or perform
* certain pre-initialization actions.
*
************************************************************************/
#if defined(CONFIG_PCI)
int pci_pre_init(struct pci_controller * hose )
{
unsigned long strap;
/*-------------------------------------------------------------------+
* The yucca board is always configured as the host & requires the
* PCI arbiter to be enabled.
*-------------------------------------------------------------------*/
mfsdr(SDR0_SDSTP1, strap);
if( (strap & SDR0_SDSTP1_PAE_MASK) == 0 ) {
printf("PCI: SDR0_STRP1[%08lX] - PCI Arbiter disabled.\n",strap);
return 0;
}
return 1;
}
#endif /* defined(CONFIG_PCI) */
/*************************************************************************
* pci_target_init
*
* The bootstrap configuration provides default settings for the pci
* inbound map (PIM). But the bootstrap config choices are limited and
* may not be sufficient for a given board.
*
************************************************************************/
#if defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT)
void pci_target_init(struct pci_controller * hose )
{
/*-------------------------------------------------------------------+
* Disable everything
*-------------------------------------------------------------------*/
out32r( PCIL0_PIM0SA, 0 ); /* disable */
out32r( PCIL0_PIM1SA, 0 ); /* disable */
out32r( PCIL0_PIM2SA, 0 ); /* disable */
out32r( PCIL0_EROMBA, 0 ); /* disable expansion rom */
/*-------------------------------------------------------------------+
* Map all of SDRAM to PCI address 0x0000_0000. Note that the 440
* strapping options to not support sizes such as 128/256 MB.
*-------------------------------------------------------------------*/
out32r( PCIL0_PIM0LAL, CONFIG_SYS_SDRAM_BASE );
out32r( PCIL0_PIM0LAH, 0 );
out32r( PCIL0_PIM0SA, ~(gd->ram_size - 1) | 1 );
out32r( PCIL0_BAR0, 0 );
/*-------------------------------------------------------------------+
* Program the board's subsystem id/vendor id
*-------------------------------------------------------------------*/
out16r( PCIL0_SBSYSVID, CONFIG_SYS_PCI_SUBSYS_VENDORID );
out16r( PCIL0_SBSYSID, CONFIG_SYS_PCI_SUBSYS_DEVICEID );
out16r( PCIL0_CMD, in16r(PCIL0_CMD) | PCI_COMMAND_MEMORY );
}
#endif /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT) */
#if defined(CONFIG_PCI)
/*************************************************************************
* is_pci_host
*
* This routine is called to determine if a pci scan should be
* performed. With various hardware environments (especially cPCI and
* PPMC) it's insufficient to depend on the state of the arbiter enable
* bit in the strap register, or generic host/adapter assumptions.
*
* Rather than hard-code a bad assumption in the general 440 code, the
* 440 pci code requires the board to decide at runtime.
*
* Return 0 for adapter mode, non-zero for host (monarch) mode.
*
*
************************************************************************/
int is_pci_host(struct pci_controller *hose)
{
/* The yucca board is always configured as host. */
return 1;
}
static int yucca_pcie_card_present(int port)
int board_pcie_card_present(int port)
{
u16 reg;
@ -697,185 +607,54 @@ static int yucca_pcie_card_present(int port)
}
/*
* For the given slot, set rootpoint mode, send power to the slot,
* turn on the green LED and turn off the yellow LED, enable the clock
* and turn off reset.
* For the given slot, set endpoint mode, send power to the slot,
* turn on the green LED and turn off the yellow LED, enable the
* clock. In end point mode reset bit is read only.
*/
void yucca_setup_pcie_fpga_rootpoint(int port)
void board_pcie_setup_port(int port, int rootpoint)
{
u16 power, clock, green_led, yellow_led, reset_off, rootpoint, endpoint;
u16 power, clock, green_led, yellow_led,
reset_off, rp, ep;
switch(port) {
switch (port) {
case 0:
rootpoint = FPGA_REG1C_PE0_ROOTPOINT;
endpoint = 0;
power = FPGA_REG1A_PE0_PWRON;
green_led = FPGA_REG1A_PE0_GLED;
clock = FPGA_REG1A_PE0_REFCLK_ENABLE;
yellow_led = FPGA_REG1A_PE0_YLED;
reset_off = FPGA_REG1C_PE0_PERST;
rp = FPGA_REG1C_PE0_ROOTPOINT;
ep = 0;
break;
case 1:
rootpoint = 0;
endpoint = FPGA_REG1C_PE1_ENDPOINT;
power = FPGA_REG1A_PE1_PWRON;
green_led = FPGA_REG1A_PE1_GLED;
clock = FPGA_REG1A_PE1_REFCLK_ENABLE;
yellow_led = FPGA_REG1A_PE1_YLED;
reset_off = FPGA_REG1C_PE1_PERST;
rp = 0;
ep = FPGA_REG1C_PE1_ENDPOINT;
break;
case 2:
rootpoint = 0;
endpoint = FPGA_REG1C_PE2_ENDPOINT;
power = FPGA_REG1A_PE2_PWRON;
green_led = FPGA_REG1A_PE2_GLED;
clock = FPGA_REG1A_PE2_REFCLK_ENABLE;
yellow_led = FPGA_REG1A_PE2_YLED;
reset_off = FPGA_REG1C_PE2_PERST;
rp = 0;
ep = FPGA_REG1C_PE2_ENDPOINT;
break;
default:
return;
}
out_be16((u16 *)FPGA_REG1A,
~(power | clock | green_led) &
power = FPGA_REG1A_PWRON_ENCODE(port);
green_led = FPGA_REG1A_GLED_ENCODE(port);
clock = FPGA_REG1A_REFCLK_ENCODE(port);
yellow_led = FPGA_REG1A_YLED_ENCODE(port);
reset_off = FPGA_REG1C_PERST_ENCODE(port);
out_be16((u16 *)FPGA_REG1A, ~(power | clock | green_led) &
(yellow_led | in_be16((u16 *)FPGA_REG1A)));
out_be16((u16 *)FPGA_REG1C,
~(endpoint | reset_off) &
(rootpoint | in_be16((u16 *)FPGA_REG1C)));
out_be16((u16 *)FPGA_REG1C, ~(ep | reset_off) &
(rp | in_be16((u16 *)FPGA_REG1C)));
if (rootpoint) {
/*
* Leave device in reset for a while after powering on the
* slot to give it a chance to initialize.
*/
udelay(250 * 1000);
out_be16((u16 *)FPGA_REG1C, reset_off | in_be16((u16 *)FPGA_REG1C));
}
/*
* For the given slot, set endpoint mode, send power to the slot,
* turn on the green LED and turn off the yellow LED, enable the clock
* .In end point mode reset bit is read only.
*/
void yucca_setup_pcie_fpga_endpoint(int port)
{
u16 power, clock, green_led, yellow_led, reset_off, rootpoint, endpoint;
switch(port) {
case 0:
rootpoint = FPGA_REG1C_PE0_ROOTPOINT;
endpoint = 0;
power = FPGA_REG1A_PE0_PWRON;
green_led = FPGA_REG1A_PE0_GLED;
clock = FPGA_REG1A_PE0_REFCLK_ENABLE;
yellow_led = FPGA_REG1A_PE0_YLED;
reset_off = FPGA_REG1C_PE0_PERST;
break;
case 1:
rootpoint = 0;
endpoint = FPGA_REG1C_PE1_ENDPOINT;
power = FPGA_REG1A_PE1_PWRON;
green_led = FPGA_REG1A_PE1_GLED;
clock = FPGA_REG1A_PE1_REFCLK_ENABLE;
yellow_led = FPGA_REG1A_PE1_YLED;
reset_off = FPGA_REG1C_PE1_PERST;
break;
case 2:
rootpoint = 0;
endpoint = FPGA_REG1C_PE2_ENDPOINT;
power = FPGA_REG1A_PE2_PWRON;
green_led = FPGA_REG1A_PE2_GLED;
clock = FPGA_REG1A_PE2_REFCLK_ENABLE;
yellow_led = FPGA_REG1A_PE2_YLED;
reset_off = FPGA_REG1C_PE2_PERST;
break;
default:
return;
}
out_be16((u16 *)FPGA_REG1A,
~(power | clock | green_led) &
(yellow_led | in_be16((u16 *)FPGA_REG1A)));
out_be16((u16 *)FPGA_REG1C,
~(rootpoint | reset_off) &
(endpoint | in_be16((u16 *)FPGA_REG1C)));
}
static struct pci_controller pcie_hose[3] = {{0},{0},{0}};
void pcie_setup_hoses(int busno)
{
struct pci_controller *hose;
int i, bus;
int ret = 0;
char *env;
unsigned int delay;
/*
* assume we're called after the PCIX hose is initialized, which takes
* bus ID 0 and therefore start numbering PCIe's from 1.
*/
bus = busno;
for (i = 0; i <= 2; i++) {
/* Check for yucca card presence */
if (!yucca_pcie_card_present(i))
continue;
if (is_end_point(i)) {
yucca_setup_pcie_fpga_endpoint(i);
ret = ppc4xx_init_pcie_endport(i);
} else {
yucca_setup_pcie_fpga_rootpoint(i);
ret = ppc4xx_init_pcie_rootport(i);
}
if (ret == -ENODEV)
continue;
if (ret) {
printf("PCIE%d: initialization as %s failed\n", i,
is_end_point(i) ? "endpoint" : "root-complex");
continue;
}
hose = &pcie_hose[i];
hose->first_busno = bus;
hose->last_busno = bus;
hose->current_busno = bus;
/* setup mem resource */
pci_set_region(hose->regions + 0,
CONFIG_SYS_PCIE_MEMBASE + i * CONFIG_SYS_PCIE_MEMSIZE,
CONFIG_SYS_PCIE_MEMBASE + i * CONFIG_SYS_PCIE_MEMSIZE,
CONFIG_SYS_PCIE_MEMSIZE,
PCI_REGION_MEM);
hose->region_count = 1;
pci_register_hose(hose);
if (is_end_point(i)) {
ppc4xx_setup_pcie_endpoint(hose, i);
/*
* Reson for no scanning is endpoint can not generate
* upstream configuration accesses.
*/
} else {
ppc4xx_setup_pcie_rootpoint(hose, i);
env = getenv("pciscandelay");
if (env != NULL) {
delay = simple_strtoul(env, NULL, 10);
if (delay > 5)
printf("Warning, expect noticable delay before "
"PCIe scan due to 'pciscandelay' value!\n");
mdelay(delay * 1000);
}
/*
* Config access can only go down stream
*/
hose->last_busno = pci_hose_scan(hose);
bus = hose->last_busno + 1;
}
reset_off | in_be16((u16 *)FPGA_REG1C));
}
}
#endif /* defined(CONFIG_PCI) */
@ -929,17 +708,6 @@ void fpga_init(void)
return;
}
#ifdef CONFIG_POST
/*
* Returns 1 if keys pressed to start the power-on long-running tests
* Called from board_init_f().
*/
int post_hotkeys_pressed(void)
{
return (ctrlc());
}
#endif
/*---------------------------------------------------------------------------+
| onboard_pci_arbiter_selected => from EPLD
+---------------------------------------------------------------------------*/

View file

@ -25,3 +25,6 @@
# like it's not in RAM. This is a bit of voodoo to allow it to be
# run from RAM instead of Flash.
TEXT_BASE = 0x08000000
# Use board specific linker script
LDSCRIPT := $(SRCTREE)/board/amirix/ap1000/u-boot.lds

View file

@ -24,6 +24,7 @@
* MA 02111-1307 USA
*/
#include <common.h>
#include <netdev.h>
#include <asm/arch/omap2420.h>
#include <asm/io.h>
#include <asm/arch/bits.h>
@ -94,7 +95,6 @@ void s_init(void)
********************************************************/
int misc_init_r(void)
{
ether_init(); /* better done here so timers are init'ed */
return (0);
}
@ -138,13 +138,14 @@ void wait_for_command_complete(unsigned int wd_base)
}
/*******************************************************************
* Routine:ether_init
* Routine:board_eth_init
* Description: take the Ethernet controller out of reset and wait
* for the EEPROM load to complete.
******************************************************************/
void ether_init(void)
int board_eth_init(bd_t *bis)
{
#ifdef CONFIG_DRIVER_LAN91C96
int rc = 0;
#ifdef CONFIG_LAN91C96
int cnt = 20;
__raw_writeb(0x03, OMAP2420_CTRL_BASE + 0x0f2); /*protect->gpio74 */
@ -171,10 +172,10 @@ void ether_init(void)
mask_config_reg(ETH_CONTROL_REG, 0x01);
udelay(1000);
rc = lan91c96_initialize(0, CONFIG_LAN91C96_BASE);
eth_reset_err_out:
return;
#endif
return rc;
}
/**********************************************

View file

@ -124,7 +124,7 @@ void set_timer (ulong ticks)
}
/* delay usec useconds */
void udelay (unsigned long usec)
void __udelay (unsigned long usec)
{
ulong tmo, tmp;

View file

@ -25,6 +25,7 @@
*/
#include <common.h>
#include <netdev.h>
#include <SA-1100.h>
DECLARE_GLOBAL_DATA_PTR;
@ -117,3 +118,14 @@ dram_init(void)
return (0);
}
#ifdef CONFIG_CMD_NET
int board_eth_init(bd_t *bis)
{
int rc = 0;
#ifdef CONFIG_LAN91C96
rc = lan91c96_initialize(0, CONFIG_LAN91C96_BASE);
#endif
return rc;
}
#endif

View file

@ -265,11 +265,12 @@ int board_init(void)
}
#ifdef CONFIG_DRIVER_DM9000
int board_eth_init(bd_t *bis)
{
int board_eth_init(bd_t *bis)
{
return dm9000_initialize(bis);
}
#endif
}
#endif
int dram_init(void)
{
gd->bd->bi_dram[0].start = PHYS_SDRAM;

View file

@ -170,22 +170,26 @@ static struct pci_controller pci2_hose;
static struct pci_controller pcie1_hose;
#endif
int first_free_busno=0;
void
pci_init_board(void)
void pci_init_board(void)
{
volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
struct fsl_pci_info pci_info[3];
u32 devdisr, pordevsr, io_sel;
u32 porpllsr, pci_agent, pci_speed, pci_32, pci_arb, pci_clk_sel;
int first_free_busno = 0;
int num = 0;
uint devdisr = gur->devdisr;
uint io_sel = (gur->pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> 19;
uint host_agent = (gur->porbmsr & MPC85xx_PORBMSR_HA) >> 16;
int pcie_ep, pcie_configured;
debug (" pci_init_board: devdisr=%x, io_sel=%x, host_agent=%x\n",
devdisr, io_sel, host_agent);
devdisr = in_be32(&gur->devdisr);
pordevsr = in_be32(&gur->pordevsr);
porpllsr = in_be32(&gur->porpllsr);
io_sel = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> 19;
debug (" pci_init_board: devdisr=%x, io_sel=%x\n", devdisr, io_sel);
/* explicitly set 'Clock out select register' to echo SYSCLK input to our CPLD */
gur->clkocr |= MPC85xx_ATUM_CLKOCR;
setbits_be32(&gur->clkocr, MPC85xx_ATUM_CLKOCR);
if (io_sel & 1) {
if (!(gur->pordevsr & MPC85xx_PORDEVSR_SGMII1_DIS))
@ -199,145 +203,79 @@ pci_init_board(void)
}
#ifdef CONFIG_PCIE1
{
volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE1_ADDR;
struct pci_controller *hose = &pcie1_hose;
int pcie_ep = is_fsl_pci_agent(LAW_TRGT_IF_PCIE_1, host_agent);
int pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_1, io_sel);
struct pci_region *r = hose->regions;
pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_1, io_sel);
if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
printf ("\n PCIE1 connected to slot as %s (base address %x)",
pcie_ep ? "End Point" : "Root Complex",
(uint)pci);
if (pci->pme_msg_det) {
pci->pme_msg_det = 0xffffffff;
debug (" with errors. Clearing. Now 0x%08x",pci->pme_msg_det);
}
printf ("\n");
SET_STD_PCIE_INFO(pci_info[num], 1);
pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
#ifdef CONFIG_SYS_PCIE1_MEM_BUS2
/* outbound memory */
pci_set_region(r++,
CONFIG_SYS_PCIE1_MEM_BASE,
CONFIG_SYS_PCIE1_MEM_PHYS,
CONFIG_SYS_PCIE1_MEM_SIZE,
PCI_REGION_MEM);
/* outbound io */
pci_set_region(r++,
CONFIG_SYS_PCIE1_IO_BASE,
CONFIG_SYS_PCIE1_IO_PHYS,
CONFIG_SYS_PCIE1_IO_SIZE,
PCI_REGION_IO);
#ifdef CONFIG_SYS_PCIE1_MEM_BASE2
/* outbound memory */
pci_set_region(r++,
CONFIG_SYS_PCIE1_MEM_BASE2,
pci_set_region(&pcie1_hose.regions[0],
CONFIG_SYS_PCIE1_MEM_BUS2,
CONFIG_SYS_PCIE1_MEM_PHYS2,
CONFIG_SYS_PCIE1_MEM_SIZE2,
PCI_REGION_MEM);
pcie1_hose.region_count = 1;
#endif
hose->region_count = r - hose->regions;
hose->first_busno=first_free_busno;
fsl_pci_init(hose, (u32)&pci->cfg_addr, (u32)&pci->cfg_data);
first_free_busno=hose->last_busno+1;
printf(" PCIE1 on bus %02x - %02x\n",
hose->first_busno,hose->last_busno);
printf (" PCIE1 connected to Slot as %s (base addr %lx)\n",
pcie_ep ? "End Point" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie1_hose, first_free_busno);
} else {
printf (" PCIE1: disabled\n");
}
}
puts("\n");
#else
gur->devdisr |= MPC85xx_DEVDISR_PCIE; /* disable */
setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCIE); /* disable */
#endif
#ifdef CONFIG_PCI1
{
volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCI1_ADDR;
struct pci_controller *hose = &pci1_hose;
struct pci_region *r = hose->regions;
uint pci_agent = is_fsl_pci_agent(LAW_TRGT_IF_PCI_1, host_agent);
uint pci_speed = 33333000; /*get_clock_freq (); PCI PSPEED in [4:5] */
uint pci_32 = gur->pordevsr & MPC85xx_PORDEVSR_PCI1_PCI32; /* PORDEVSR[15] */
uint pci_arb = gur->pordevsr & MPC85xx_PORDEVSR_PCI1_ARB; /* PORDEVSR[14] */
uint pci_clk_sel = gur->porpllsr & MPC85xx_PORDEVSR_PCI1_SPD; /* PORPLLSR[16] */
pci_speed = 33333000; /*get_clock_freq (); PCI PSPEED in [4:5] */
pci_32 = pordevsr & MPC85xx_PORDEVSR_PCI1_PCI32; /* PORDEVSR[15] */
pci_arb = pordevsr & MPC85xx_PORDEVSR_PCI1_ARB;
pci_clk_sel = porpllsr & MPC85xx_PORDEVSR_PCI1_SPD;
if (!(devdisr & MPC85xx_DEVDISR_PCI1)) {
printf ("\n PCI1: %d bit, %s MHz, %s, %s, %s (base address %x)\n",
SET_STD_PCI_INFO(pci_info[num], 1);
pci_agent = fsl_setup_hose(&pci1_hose, pci_info[num].regs);
printf ("\n PCI1: %d bit, %s MHz, %s, %s, %s (base address %lx)\n",
(pci_32) ? 32 : 64,
(pci_speed == 33333000) ? "33" :
(pci_speed == 66666000) ? "66" : "unknown",
pci_clk_sel ? "sync" : "async",
pci_agent ? "agent" : "host",
pci_arb ? "arbiter" : "external-arbiter",
(uint)pci
);
pci_info[num].regs);
/* outbound memory */
pci_set_region(r++,
CONFIG_SYS_PCI1_MEM_BASE,
CONFIG_SYS_PCI1_MEM_PHYS,
CONFIG_SYS_PCI1_MEM_SIZE,
PCI_REGION_MEM);
/* outbound io */
pci_set_region(r++,
CONFIG_SYS_PCI1_IO_BASE,
CONFIG_SYS_PCI1_IO_PHYS,
CONFIG_SYS_PCI1_IO_SIZE,
PCI_REGION_IO);
hose->region_count = r - hose->regions;
hose->first_busno=first_free_busno;
fsl_pci_init(hose, (u32)&pci->cfg_addr, (u32)&pci->cfg_data);
first_free_busno=hose->last_busno+1;
printf ("PCI1 on bus %02x - %02x\n",
hose->first_busno,hose->last_busno);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pci1_hose, first_free_busno);
} else {
printf (" PCI1: disabled\n");
printf (" PCI: disabled\n");
}
}
puts("\n");
#else
gur->devdisr |= MPC85xx_DEVDISR_PCI1; /* disable */
setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCI1); /* disable */
#endif
#ifdef CONFIG_PCI2
{
volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCI2_ADDR;
struct pci_controller *hose = &pci2_hose;
struct pci_region *r = hose->regions;
if (!(devdisr & MPC85xx_DEVDISR_PCI2)) {
pci_set_region(r++,
CONFIG_SYS_PCI2_MEM_BASE,
CONFIG_SYS_PCI2_MEM_PHYS,
CONFIG_SYS_PCI2_MEM_SIZE,
PCI_REGION_MEM);
SET_STD_PCI_INFO(pci_info[num], 2);
pci_agent = fsl_setup_hose(&pci2_hose, pci_info[num].regs);
pci_set_region(r++,
CONFIG_SYS_PCI2_IO_BASE,
CONFIG_SYS_PCI2_IO_PHYS,
CONFIG_SYS_PCI2_IO_SIZE,
PCI_REGION_IO);
hose->region_count = r - hose->regions;
hose->first_busno=first_free_busno;
fsl_pci_init(hose, (u32)&pci->cfg_addr, (u32)&pci->cfg_data);
first_free_busno=hose->last_busno+1;
printf ("PCI2 on bus %02x - %02x\n",
hose->first_busno,hose->last_busno);
puts (" PCI2\n");
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pci1_hose, first_free_busno);
} else {
printf (" PCI2: disabled\n");
}
}
puts("\n");
#else
gur->devdisr |= MPC85xx_DEVDISR_PCI2;
setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCI2); /* disable */
#endif
}

View file

@ -16,8 +16,6 @@
#include <linux/types.h>
#include <stdio_dev.h>
int gunzip(void *, int, unsigned char *, unsigned long *);
#define DMA_SIZE16 2
#include <asm/mach-common/bits/ppi.h>

View file

@ -20,8 +20,6 @@
#include <linux/types.h>
#include <stdio_dev.h>
int gunzip(void *, int, unsigned char *, unsigned long *);
#define DMA_SIZE16 2
#include <asm/mach-common/bits/ppi.h>

View file

@ -16,8 +16,6 @@
#include <linux/types.h>
#include <stdio_dev.h>
int gunzip(void *, int, unsigned char *, unsigned long *);
#define DMA_SIZE16 2
#include <asm/mach-common/bits/eppi.h>

View file

@ -16,8 +16,6 @@
#include <linux/types.h>
#include <stdio_dev.h>
int gunzip(void *, int, unsigned char *, unsigned long *);
#ifdef CONFIG_VIDEO
#define DMA_SIZE16 2

View file

@ -271,13 +271,6 @@ static void ft_blob_update(void *blob, bd_t *bd)
if (ret < 0)
printf("ft_blob_update(): cannot set /model property err:%s\n",
fdt_strerror(ret));
ret = fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
if (ret < 0) {
printf("ft_blob_update(): cannot set /memory/reg "
"property err:%s\n", fdt_strerror(ret));
}
}
#endif /* defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT) */
@ -330,14 +323,6 @@ int board_early_init_r(void)
}
#ifdef CONFIG_POST
int post_hotkeys_pressed(void)
{
return 0;
}
#endif /* CONFIG_POST */
#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER)
void post_word_store(ulong a)
{

View file

@ -1,150 +0,0 @@
/*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
cpu/ppc4xx/start.o (.text)
board/cray/L1/init.o (.text)
cpu/ppc4xx/traps.o (.text)
cpu/ppc4xx/interrupts.o (.text)
cpu/ppc4xx/4xx_uart.o (.text)
cpu/ppc4xx/cpu_init.o (.text)
cpu/ppc4xx/speed.o (.text)
drivers/net/4xx_enet.o (.text)
common/dlmalloc.o (.text)
lib_generic/crc32.o (.text)
lib_ppc/extable.o (.text)
lib_generic/zlib.o (.text)
/*. = env_offset;*/
common/env_embedded.o(.text)
*(.text)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss (NOLOAD) :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
}
_end = . ;
PROVIDE (end = .);
}

View file

@ -1,151 +0,0 @@
/*
* (C) Copyright 2000-2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
cpu/ppc4xx/start.o (.text)
board/csb272/init.o (.text)
cpu/ppc4xx/kgdb.o (.text)
cpu/ppc4xx/traps.o (.text)
cpu/ppc4xx/interrupts.o (.text)
cpu/ppc4xx/4xx_uart.o (.text)
cpu/ppc4xx/cpu_init.o (.text)
cpu/ppc4xx/speed.o (.text)
drivers/net/4xx_enet.o (.text)
common/dlmalloc.o (.text)
lib_generic/crc32.o (.text)
lib_ppc/extable.o (.text)
lib_ppc/board.o (.text)
lib_generic/zlib.o (.text)
/* . = env_offset;*/
/* common/env_embedded.o(.text)*/
*(.text)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss (NOLOAD) :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
}
_end = . ;
PROVIDE (end = .);
}

View file

@ -1,151 +0,0 @@
/*
* (C) Copyright 2000-2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
cpu/ppc4xx/start.o (.text)
board/csb472/init.o (.text)
cpu/ppc4xx/kgdb.o (.text)
cpu/ppc4xx/traps.o (.text)
cpu/ppc4xx/interrupts.o (.text)
cpu/ppc4xx/4xx_uart.o (.text)
cpu/ppc4xx/cpu_init.o (.text)
cpu/ppc4xx/speed.o (.text)
drivers/net/4xx_enet.o (.text)
common/dlmalloc.o (.text)
lib_generic/crc32.o (.text)
lib_ppc/extable.o (.text)
lib_ppc/board.o (.text)
lib_generic/zlib.o (.text)
/* . = env_offset;*/
/* common/env_embedded.o(.text)*/
*(.text)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss (NOLOAD) :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
}
_end = . ;
PROVIDE (end = .);
}

View file

@ -25,6 +25,7 @@
*/
#include <common.h>
#include <netdev.h>
#include <asm/hardware.h>
DECLARE_GLOBAL_DATA_PTR;
@ -125,3 +126,14 @@ int dram_init (void)
return (0);
}
#ifdef CONFIG_CMD_NET
int board_eth_init(bd_t *bis)
{
int rc = 0;
#ifdef CONFIG_LAN91C96
rc = lan91c96_initialize(0, CONFIG_LAN91C96_BASE);
#endif
return rc;
}
#endif

View file

@ -33,9 +33,6 @@ DECLARE_GLOBAL_DATA_PTR;
/* ------------------------------------------------------------------------- */
/* Prototypes */
int gunzip(void *, int, unsigned char *, unsigned long *);
int board_early_init_f (void)
{
out32(GPIO0_OR, CONFIG_SYS_NAND0_CE); /* set initial outputs */

View file

@ -1,153 +0,0 @@
/*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
cpu/ppc4xx/start.o (.text)
cpu/ppc4xx/traps.o (.text)
cpu/ppc4xx/interrupts.o (.text)
cpu/ppc4xx/4xx_uart.o (.text)
cpu/ppc4xx/cpu_init.o (.text)
cpu/ppc4xx/speed.o (.text)
drivers/net/4xx_enet.o (.text)
common/dlmalloc.o (.text)
lib_generic/crc32.o (.text)
lib_ppc/extable.o (.text)
lib_generic/zlib.o (.text)
*(.text)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss (NOLOAD) :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
}
ppcenv_assert = ASSERT(. < 0xFFFF8000, ".bss section too big, overlaps .ppcenv section. Please update your confguration: CONFIG_SYS_MONITOR_BASE, CONFIG_SYS_MONITOR_LEN and TEXT_BASE may need to be modified.");
. = 0xFFFF8000;
.ppcenv :
{
common/env_embedded.o(.ppcenv);
}
_end = . ;
PROVIDE (end = .);
}

View file

@ -196,6 +196,5 @@ int checkboard (void)
void ft_board_setup(void *blob, bd_t *bd)
{
ft_cpu_setup(blob, bd);
fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
}
#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */

View file

@ -1,6 +1,7 @@
/*
* Miscelaneous DaVinci functions.
*
* Copyright (C) 2009 Nick Thompson, GE Fanuc Ltd, <nick.thompson@gefanuc.com>
* Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
* Copyright (C) 2008 Lyrtech <www.lyrtech.com>
* Copyright (C) 2004 Texas Instruments.
@ -27,7 +28,8 @@
#include <i2c.h>
#include <net.h>
#include <asm/arch/hardware.h>
#include <asm/io.h>
#include "misc.h"
DECLARE_GLOBAL_DATA_PTR;
@ -109,3 +111,78 @@ void dv_configure_mac_address(uint8_t *rom_enetaddr)
}
#endif /* DAVINCI_EMAC */
/*
* Change the setting of a pin multiplexer field.
*
* Takes an array of pinmux settings similar to:
*
* struct pinmux_config uart_pins[] = {
* { &davinci_syscfg_regs->pinmux[8], 2, 7 },
* { &davinci_syscfg_regs->pinmux[9], 2, 0 }
* };
*
* Stepping through the array, each pinmux[n] register has the given value
* set in the pin mux field specified.
*
* The number of pins in the array must be passed (ARRAY_SIZE can provide
* this value conveniently).
*
* Returns 0 if all field numbers and values are in the correct range,
* else returns -1.
*/
int davinci_configure_pin_mux(const struct pinmux_config *pins,
const int n_pins)
{
int i;
/* check for invalid pinmux values */
for (i = 0; i < n_pins; i++) {
if (pins[i].field >= PIN_MUX_NUM_FIELDS ||
(pins[i].value & ~PIN_MUX_FIELD_MASK) != 0)
return -1;
}
/* configure the pinmuxes */
for (i = 0; i < n_pins; i++) {
const int offset = pins[i].field * PIN_MUX_FIELD_SIZE;
const unsigned int value = pins[i].value << offset;
const unsigned int mask = PIN_MUX_FIELD_MASK << offset;
const dv_reg *mux = pins[i].mux;
writel(value | (readl(mux) & (~mask)), mux);
}
return 0;
}
/*
* Configure multiple pinmux resources.
*
* Takes an pinmux_resource array of pinmux_config and pin counts:
*
* const struct pinmux_resource pinmuxes[] = {
* PINMUX_ITEM(uart_pins),
* PINMUX_ITEM(i2c_pins),
* };
*
* The number of items in the array must be passed (ARRAY_SIZE can provide
* this value conveniently).
*
* Each item entry is configured in the defined order. If configuration
* of any item fails, -1 is returned and none of the following items are
* configured. On success, 0 is returned.
*/
int davinci_configure_pin_mux_items(const struct pinmux_resource *item,
const int n_items)
{
int i;
for (i = 0; i < n_items; i++) {
if (davinci_configure_pin_mux(item[i].pins,
item[i].n_pins) != 0)
return -1;
}
return 0;
}

View file

@ -22,8 +22,33 @@
#ifndef __MISC_H
#define __MISC_H
/* pin muxer definitions */
#define PIN_MUX_NUM_FIELDS 8 /* Per register */
#define PIN_MUX_FIELD_SIZE 4 /* n in bits */
#define PIN_MUX_FIELD_MASK ((1 << PIN_MUX_FIELD_SIZE) - 1)
/* pin definition */
struct pinmux_config {
dv_reg *mux; /* Address of mux register */
unsigned char value; /* Value to set in field */
unsigned char field; /* field number */
};
/* pin table definition */
struct pinmux_resource {
const struct pinmux_config *pins;
const int n_pins;
};
#define PINMUX_ITEM(item) { \
.pins = item, \
.n_pins = ARRAY_SIZE(item) \
}
int dvevm_read_mac_address(uint8_t *buf);
void dv_configure_mac_address(uint8_t *rom_enetaddr);
int davinci_configure_pin_mux(const struct pinmux_config *pins, int n_pins);
int davinci_configure_pin_mux_items(const struct pinmux_resource *item,
int n_items);
#endif /* __MISC_H */

View file

@ -0,0 +1,51 @@
#
# (C) Copyright 2000, 2001, 2002
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).a
COBJS := da830evm.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
SOBJS := $(addprefix $(obj),$(SOBJS))
$(LIB): $(obj).depend $(OBJS) $(SOBJS)
$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak *~ .depend
#########################################################################
# This is for $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################

View file

@ -0,0 +1,43 @@
#
# (C) Copyright 2008, Texas Instruments, Inc. http://www.ti.com/
#
# Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
#
# (C) Copyright 2002
# Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
# David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
# Texas Instruments DA8xx EVM board (ARM925EJS) cpu
# see http://www.ti.com/ for more information on Texas Instruments
#
# DA8xx EVM has 1 bank of 64 MB SDRAM (2 16Meg x16 chips).
# Physical Address:
# C000'0000 to C400'0000
#
# Linux-Kernel is expected to be at C000'8000, entry C000'8000
# (mem base + reserved)
#
# we load ourself to C108 '0000
#Provide at least 16MB spacing between us and the Linux Kernel image
TEXT_BASE = 0xC1080000

View file

@ -0,0 +1,135 @@
/*
* Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com>
*
* Base on code from TI. Original Notices follow:
*
* (C) Copyright 2008, Texas Instruments, Inc. http://www.ti.com/
*
* Modified for DA8xx EVM.
*
* Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
*
* Parts are shamelessly stolen from various TI sources, original copyright
* follows:
* -----------------------------------------------------------------
*
* Copyright (C) 2004 Texas Instruments.
*
* ----------------------------------------------------------------------------
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
* ----------------------------------------------------------------------------
*/
#include <common.h>
#include <i2c.h>
#include <asm/arch/hardware.h>
#include <asm/io.h>
#include "../common/misc.h"
DECLARE_GLOBAL_DATA_PTR;
#define pinmux &davinci_syscfg_regs->pinmux
#ifdef CONFIG_SPI_FLASH
/* SPI0 pin muxer settings */
const struct pinmux_config spi0_pins[] = {
{ pinmux[7], 1, 3 },
{ pinmux[7], 1, 4 },
{ pinmux[7], 1, 5 },
{ pinmux[7], 1, 6 },
{ pinmux[7], 1, 7 }
};
#endif
/* UART pin muxer settings */
const struct pinmux_config uart_pins[] = {
{ pinmux[8], 2, 7 },
{ pinmux[9], 2, 0 }
};
/* I2C pin muxer settings */
const struct pinmux_config i2c_pins[] = {
{ pinmux[9], 2, 3 },
{ pinmux[9], 2, 4 }
};
/* USB0_DRVVBUS pin muxer settings */
const struct pinmux_config usb_pins[] = {
{ pinmux[9], 1, 1 }
};
int board_init(void)
{
#ifndef CONFIG_USE_IRQ
/*
* Mask all IRQs by clearing the global enable and setting
* the enable clear for all the 90 interrupts.
*/
writel(0, &davinci_aintc_regs->ger);
writel(0, &davinci_aintc_regs->hier);
writel(0xffffffff, &davinci_aintc_regs->ecr1);
writel(0xffffffff, &davinci_aintc_regs->ecr2);
writel(0xffffffff, &davinci_aintc_regs->ecr3);
#endif
/* arch number of the board */
gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DA830_EVM;
/* address of boot parameters */
gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
/*
* Power on required peripherals
* ARM does not have access by default to PSC0 and PSC1
* assuming here that the DSP bootloader has set the IOPU
* such that PSC access is available to ARM
*/
lpsc_on(DAVINCI_LPSC_AEMIF); /* NAND, NOR */
lpsc_on(DAVINCI_LPSC_SPI0); /* Serial Flash */
lpsc_on(DAVINCI_LPSC_EMAC); /* image download */
lpsc_on(DAVINCI_LPSC_UART2); /* console */
lpsc_on(DAVINCI_LPSC_GPIO);
/* setup the SUSPSRC for ARM to control emulation suspend */
writel(readl(&davinci_syscfg_regs->suspsrc) &
~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C |
DAVINCI_SYSCFG_SUSPSRC_SPI0 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 |
DAVINCI_SYSCFG_SUSPSRC_UART2),
&davinci_syscfg_regs->suspsrc);
#ifdef CONFIG_SPI_FLASH
if (davinci_configure_pin_mux(spi0_pins, ARRAY_SIZE(spi0_pins)) != 0)
return 1;
#endif
if (davinci_configure_pin_mux(uart_pins, ARRAY_SIZE(uart_pins)) != 0)
return 1;
if (davinci_configure_pin_mux(i2c_pins, ARRAY_SIZE(i2c_pins)) != 0)
return 1;
if (davinci_configure_pin_mux(usb_pins, ARRAY_SIZE(usb_pins)) != 0)
return 1;
/* enable the console UART */
writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST |
DAVINCI_UART_PWREMU_MGMT_UTRST),
&davinci_uart2_ctrl_regs->pwremu_mgmt);
return(0);
}

View file

@ -18,6 +18,8 @@
#include <common.h>
#include <asm/io.h>
#include <nand.h>
#include <asm/arch/nand_defs.h>
DECLARE_GLOBAL_DATA_PTR;
@ -28,3 +30,12 @@ int board_init(void)
return 0;
}
#ifdef CONFIG_NAND_DAVINCI
int board_nand_init(struct nand_chip *nand)
{
davinci_nand_init(nand);
return 0;
}
#endif

View file

@ -22,3 +22,7 @@
#
TEXT_BASE = 0x38040000
CFLAGS_dlmalloc.o += -Wa,--no-warn -fno-strict-aliasing
PLATFORM_RELFLAGS += -fvisibility=hidden
PLATFORM_CPPFLAGS += -fno-dwarf2-cfi-asm
PLATFORM_LDFLAGS += -pic --emit-relocs -Bsymbolic -Bsymbolic-functions

View file

@ -47,7 +47,6 @@ void init_sc520_enet (void)
{
/* Set CPU Speed to 100MHz */
sc520_mmcr->cpuctl = 0x01;
gd->cpu_clk = 100000000;
/* wait at least one millisecond */
asm("movl $0x2000,%%ecx\n"
@ -67,7 +66,7 @@ void init_sc520_enet (void)
/*
* Miscellaneous platform dependent initializations
*/
int board_init(void)
int board_early_init_f(void)
{
init_sc520_enet();
@ -117,6 +116,14 @@ int board_init(void)
sc520_mmcr->sysarbctl = 0x06;
sc520_mmcr->sysarbmenb = 0x0003;
return 0;
}
int board_early_init_r(void)
{
/* CPU Speed to 100MHz */
gd->cpu_clk = 100000000;
/* Crystal is 33.000MHz */
gd->bus_clk = 33000000;

View file

@ -71,6 +71,8 @@ board_init16:
.section .bios, "ax"
.code16
.globl realmode_reset
.hidden realmode_reset
.type realmode_reset, @function
realmode_reset:
/* Alias MMCR to 0xdf000 */
movw $0xfffc, %dx

View file

@ -28,28 +28,48 @@ ENTRY(_start)
SECTIONS
{
. = 0x38040000; /* Location of bootcode in flash */
_i386boot_text_start = .;
.text : { *(.text); }
. = ALIGN(4);
.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
_i386boot_text_size = SIZEOF(.text) + SIZEOF(.rodata);
. = 0x03FF0000; /* Ram data segment to use */
_i386boot_romdata_dest = ABSOLUTE(.);
.data : AT ( LOADADDR(.rodata) + SIZEOF(.rodata) ) { *(.data) }
_i386boot_romdata_start = LOADADDR(.data);
. = ALIGN(4);
.got : AT ( LOADADDR(.data) + SIZEOF(.data) ) { *(.got) }
.data : { *(.data) }
. = ALIGN(4);
.interp : { *(.interp) }
. = ALIGN(4);
.dynsym : { *(.dynsym) }
. = ALIGN(4);
.dynstr : { *(.dynstr) }
. = ALIGN(4);
.hash : { *(.hash) }
. = ALIGN(4);
.got : { *(.got) }
. = ALIGN(4);
.got.plt : { *(.got.plt) }
. = ALIGN(4);
.dynamic (NOLOAD) : { *(.dynamic) }
. = ALIGN(4);
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
. = ALIGN(4);
__u_boot_cmd_end = .;
_i386boot_cmd_start = LOADADDR(.u_boot_cmd);
_i386boot_romdata_size = SIZEOF(.data) + SIZEOF(.got) + SIZEOF(.u_boot_cmd);
_i386boot_rel_dyn_start = .;
.rel.dyn : { *(.rel.dyn) }
_i386boot_rel_dyn_end = .;
. = ALIGN(4);
_i386boot_bss_start = ABSOLUTE(.);
@ -57,7 +77,7 @@ SECTIONS
_i386boot_bss_size = SIZEOF(.bss);
/* 16bit realmode trampoline code */
.realmode 0x7c0 : AT ( LOADADDR(.got) + SIZEOF(.got) + SIZEOF(.u_boot_cmd)) { *(.realmode) }
.realmode 0x7c0 : AT ( LOADADDR(.rel.dyn) + SIZEOF(.rel.dyn) ) { *(.realmode) }
_i386boot_realmode = LOADADDR(.realmode);
_i386boot_realmode_size = SIZEOF(.realmode);

View file

@ -33,7 +33,7 @@ OBJS := $(addprefix $(obj),$(COBJS))
SOBJS := $(addprefix $(obj),$(SOBJS))
$(LIB): $(OBJS) $(SOBJS)
$(AR) $(ARFLAGS) $@ $(OBJS)
$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
clean:
rm -f $(SOBJS) $(OBJS)

View file

@ -1,150 +0,0 @@
/*
* (C) Copyright 2001
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
cpu/ppc4xx/start.o (.text)
board/eric/init.o (.text)
cpu/ppc4xx/kgdb.o (.text)
cpu/ppc4xx/traps.o (.text)
cpu/ppc4xx/interrupts.o (.text)
cpu/ppc4xx/4xx_uart.o (.text)
cpu/ppc4xx/cpu_init.o (.text)
cpu/ppc4xx/speed.o (.text)
drivers/net/4xx_enet.o (.text)
common/dlmalloc.o (.text)
lib_generic/crc32.o (.text)
lib_ppc/extable.o (.text)
lib_generic/zlib.o (.text)
/* . = env_offset;*/
common/env_embedded.o(.text)
*(.text)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss (NOLOAD) :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
}
_end = . ;
PROVIDE (end = .);
}

View file

@ -1,132 +0,0 @@
/*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
cpu/ppc4xx/start.o (.text)
*(.text)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x0FFF) & 0xFFFFF000;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(4096);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(4096);
__init_end = .;
__bss_start = .;
.bss (NOLOAD) :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
}
_end = . ;
PROVIDE (end = .);
}

View file

@ -54,9 +54,6 @@ const unsigned char fpgadata[] =
*/
#include "../common/fpga.c"
/* Prototypes */
int gunzip(void *, int, unsigned char *, unsigned long *);
#ifdef CONFIG_LCD_USED
/* logo bitmap data - gzip compressed and generated by bin2c */
unsigned char logo_bmp[] =

View file

@ -1,132 +0,0 @@
/*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
cpu/ppc4xx/start.o (.text)
*(.text)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss (NOLOAD) :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
}
_end = . ;
PROVIDE (end = .);
}

View file

@ -1,132 +0,0 @@
/*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
cpu/ppc4xx/start.o (.text)
*(.text)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss (NOLOAD) :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
}
_end = . ;
PROVIDE (end = .);
}

View file

@ -48,10 +48,6 @@ const unsigned char fpgadata[] =
#include "../common/fpga.c"
/* Prototypes */
int gunzip(void *, int, unsigned char *, unsigned long *);
int board_early_init_f (void)
{
/*

View file

@ -1,131 +0,0 @@
/*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
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cpu/ppc4xx/start.o (.text)
*(.text)
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{
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*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
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.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
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{
*(.got)
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*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
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.data :
{
*(.data)
*(.data1)
*(.sdata)
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CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
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. = .;
__start___ex_table = .;
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*(.sbss) *(.scommon)
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*(.bss)
*(COMMON)
. = ALIGN(4);
}
_end = . ;
PROVIDE (end = .);
}

View file

@ -1,132 +0,0 @@
/*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
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.rel.ctors : { *(.rel.ctors) }
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.rela.plt : { *(.rela.plt) }
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.plt : { *(.plt) }
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{
cpu/ppc4xx/start.o (.text)
*(.text)
*(.got1)
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_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
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_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
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{
*(.data)
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.u_boot_cmd : { *(.u_boot_cmd) }
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{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
}
_end = . ;
PROVIDE (end = .);
}

View file

@ -1,132 +0,0 @@
/*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
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.rela.bss : { *(.rela.bss) }
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.rela.plt : { *(.rela.plt) }
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.plt : { *(.plt) }
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{
cpu/ppc4xx/start.o (.text)
*(.text)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
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{
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
.fini : { *(.fini) } =0
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/* Read-write section, merged into data segment: */
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_erotext = .;
PROVIDE (erotext = .);
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{
*(.got)
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{
*(.data)
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.u_boot_cmd : { *(.u_boot_cmd) }
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. = .;
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__ex_table : { *(__ex_table) }
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. = ALIGN(256);
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{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
}
_end = . ;
PROVIDE (end = .);
}

View file

@ -1,132 +0,0 @@
/*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
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.rel.data : { *(.rel.data) }
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.plt : { *(.plt) }
.text :
{
cpu/ppc4xx/start.o (.text)
*(.text)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
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{
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
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/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
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PROVIDE (edata = .);
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.u_boot_cmd : { *(.u_boot_cmd) }
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*(.sbss) *(.scommon)
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. = ALIGN(4);
}
_end = . ;
PROVIDE (end = .);
}

View file

@ -89,7 +89,6 @@ int N_AU_IMAGES = (sizeof(au_image) / sizeof(au_image[0]));
/* Prototypes */
int cpci405_version(void);
int gunzip(void *, int, unsigned char *, unsigned long *);
void lxt971_no_sleep(void);
int board_early_init_f(void)

View file

@ -1,132 +0,0 @@
/*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
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.dynstr : { *(.dynstr) }
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{
cpu/ppc4xx/start.o (.text)
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{
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*(COMMON)
. = ALIGN(4);
}
_end = . ;
PROVIDE (end = .);
}

View file

@ -1,132 +0,0 @@
/*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
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{
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_etext = .;
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{
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.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss (NOLOAD) :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
}
_end = . ;
PROVIDE (end = .);
}

View file

@ -21,3 +21,6 @@
# MA 02111-1307 USA
#
TEXT_BASE = 0xFFFC0000
# Use board specific linker script
LDSCRIPT := $(SRCTREE)/board/esd/dasa_sim/u-boot.lds

View file

@ -1,132 +0,0 @@
/*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
cpu/ppc4xx/start.o (.text)
*(.text)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss (NOLOAD) :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
}
_end = . ;
PROVIDE (end = .);
}

View file

@ -1,132 +0,0 @@
/*
* (C) Copyright 2000, 2001
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
cpu/ppc4xx/start.o (.text)
*(.text)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss (NOLOAD) :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
}
_end = . ;
PROVIDE (end = .);
}

View file

@ -360,165 +360,6 @@ int checkboard(void)
return (0);
}
/*
* pci_pre_init
*
* This routine is called just prior to registering the hose and gives
* the board the opportunity to check things. Returning a value of zero
* indicates that things are bad & PCI initialization should be aborted.
*
* Different boards may wish to customize the pci controller structure
* (add regions, override default access routines, etc) or perform
* certain pre-initialization actions.
*/
#if defined(CONFIG_PCI)
int pci_pre_init(struct pci_controller *hose)
{
unsigned long addr;
/*
* Set priority for all PLB3 devices to 0.
* Set PLB3 arbiter to fair mode.
*/
mfsdr(SD0_AMP1, addr);
mtsdr(SD0_AMP1, (addr & 0x000000FF) | 0x0000FF00);
addr = mfdcr(PLB3_ACR);
mtdcr(PLB3_ACR, addr | 0x80000000);
/*
* Set priority for all PLB4 devices to 0.
*/
mfsdr(SD0_AMP0, addr);
mtsdr(SD0_AMP0, (addr & 0x000000FF) | 0x0000FF00);
addr = mfdcr(PLB4_ACR) | 0xa0000000; /* Was 0x8---- */
mtdcr(PLB4_ACR, addr);
/*
* Set Nebula PLB4 arbiter to fair mode.
*/
/* Segment0 */
addr = (mfdcr(PLB0_ACR) & ~PLB0_ACR_PPM_MASK) | PLB0_ACR_PPM_FAIR;
addr = (addr & ~PLB0_ACR_HBU_MASK) | PLB0_ACR_HBU_ENABLED;
addr = (addr & ~PLB0_ACR_RDP_MASK) | PLB0_ACR_RDP_4DEEP;
addr = (addr & ~PLB0_ACR_WRP_MASK) | PLB0_ACR_WRP_2DEEP;
mtdcr(PLB0_ACR, addr);
/* Segment1 */
addr = (mfdcr(PLB1_ACR) & ~PLB1_ACR_PPM_MASK) | PLB1_ACR_PPM_FAIR;
addr = (addr & ~PLB1_ACR_HBU_MASK) | PLB1_ACR_HBU_ENABLED;
addr = (addr & ~PLB1_ACR_RDP_MASK) | PLB1_ACR_RDP_4DEEP;
addr = (addr & ~PLB1_ACR_WRP_MASK) | PLB1_ACR_WRP_2DEEP;
mtdcr(PLB1_ACR, addr);
return 1;
}
#endif /* defined(CONFIG_PCI) */
/*
* pci_target_init
*
* The bootstrap configuration provides default settings for the pci
* inbound map (PIM). But the bootstrap config choices are limited and
* may not be sufficient for a given board.
*/
#if defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT)
void pci_target_init(struct pci_controller *hose)
{
/*
* Set up Direct MMIO registers
*/
/*
* PowerPC440EPX PCI Master configuration.
* Map one 1Gig range of PLB/processor addresses to PCI memory space.
* PLB address 0xA0000000-0xDFFFFFFF
* ==> PCI address 0xA0000000-0xDFFFFFFF
* Use byte reversed out routines to handle endianess.
* Make this region non-prefetchable.
*/
out32r(PCIL0_PMM0MA, 0x00000000); /* PMM0 Mask/Attribute */
/* - disabled b4 setting */
out32r(PCIL0_PMM0LA, CONFIG_SYS_PCI_MEMBASE); /* PMM0 Local Address */
out32r(PCIL0_PMM0PCILA, CONFIG_SYS_PCI_MEMBASE); /* PMM0 PCI Low Address */
out32r(PCIL0_PMM0PCIHA, 0x00000000); /* PMM0 PCI High Address */
out32r(PCIL0_PMM0MA, 0xE0000001); /* 512M + No prefetching, */
/* and enable region */
out32r(PCIL0_PMM1MA, 0x00000000); /* PMM0 Mask/Attribute */
/* - disabled b4 setting */
out32r(PCIL0_PMM1LA, CONFIG_SYS_PCI_MEMBASE2); /* PMM0 Local Address */
out32r(PCIL0_PMM1PCILA, CONFIG_SYS_PCI_MEMBASE2); /* PMM0 PCI Low Address */
out32r(PCIL0_PMM1PCIHA, 0x00000000); /* PMM0 PCI High Address */
out32r(PCIL0_PMM1MA, 0xE0000001); /* 512M + No prefetching, */
/* and enable region */
out32r(PCIL0_PTM1MS, 0x00000001); /* Memory Size/Attribute */
out32r(PCIL0_PTM1LA, 0); /* Local Addr. Reg */
out32r(PCIL0_PTM2MS, 0); /* Memory Size/Attribute */
out32r(PCIL0_PTM2LA, 0); /* Local Addr. Reg */
/*
* Set up Configuration registers
*/
/* Program the board's subsystem id/vendor id */
pci_write_config_word(0, PCI_SUBSYSTEM_VENDOR_ID,
PCI_VENDOR_ID_ESDGMBH);
pci_write_config_word(0, PCI_SUBSYSTEM_ID, PCI_DEVICE_ID_DU440);
pci_write_config_word(0, PCI_CLASS_SUB_CODE, PCI_CLASS_BRIDGE_HOST);
/* Configure command register as bus master */
pci_write_config_word(0, PCI_COMMAND, PCI_COMMAND_MASTER);
/* 240nS PCI clock */
pci_write_config_word(0, PCI_LATENCY_TIMER, 1);
/* No error reporting */
pci_write_config_word(0, PCI_ERREN, 0);
pci_write_config_dword(0, PCI_BRDGOPT2, 0x00000101);
}
#endif /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT) */
#if defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_MASTER_INIT)
void pci_master_init(struct pci_controller *hose)
{
unsigned short temp_short;
/*
* Write the PowerPC440 EP PCI Configuration regs.
* Enable PowerPC440 EP to be a master on the PCI bus (PMM).
* Enable PowerPC440 EP to act as a PCI memory target (PTM).
*/
pci_read_config_word(0, PCI_COMMAND, &temp_short);
pci_write_config_word(0, PCI_COMMAND,
temp_short | PCI_COMMAND_MASTER |
PCI_COMMAND_MEMORY);
}
#endif /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_MASTER_INIT) */
/*
* is_pci_host
*
* This routine is called to determine if a pci scan should be
* performed. With various hardware environments (especially cPCI and
* PPMC) it's insufficient to depend on the state of the arbiter enable
* bit in the strap register, or generic host/adapter assumptions.
*
* Rather than hard-code a bad assumption in the general 440 code, the
* 440 pci code requires the board to decide at runtime.
*
* Return 0 for adapter mode, non-zero for host (monarch) mode.
*/
#if defined(CONFIG_PCI)
int is_pci_host(struct pci_controller *hose)
{
/* always configured as host. */
return (1);
}
#endif /* defined(CONFIG_PCI) */
int last_stage_init(void)
{
int e, i;

View file

@ -38,6 +38,3 @@
#define PWR_RDY 0x10
#define CPLD_IRQ (32+30)
#define PCI_VENDOR_ID_ESDGMBH 0x12fe
#define PCI_DEVICE_ID_DU440 0x0444

View file

@ -1,139 +0,0 @@
/*
* (C) Copyright 2002
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
.bootpg 0xFFFFF000 :
{
cpu/ppc4xx/start.o (.bootpg)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
cpu/ppc4xx/start.o (.text)
*(.text)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss (NOLOAD) :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
}
ppcenv_assert = ASSERT(. < 0xFFFF8000, ".bss section too big, overlaps .ppcenv section. Please update your confguration: CONFIG_SYS_MONITOR_BASE, CONFIG_SYS_MONITOR_LEN and TEXT_BASE may need to be modified.");
_end = . ;
PROVIDE (end = .);
}

View file

@ -251,10 +251,6 @@ const unsigned char fpgadata[] =
#include "../common/fpga.c"
/* Prototypes */
int gunzip(void *, int, unsigned char *, unsigned long *);
/* logo bitmap data - gzip compressed and generated by bin2c */
unsigned char logo_bmp_320[] =
{

View file

@ -1,132 +0,0 @@
/*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
cpu/ppc4xx/start.o (.text)
*(.text)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss (NOLOAD) :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
}
_end = . ;
PROVIDE (end = .);
}

View file

@ -1,131 +0,0 @@
/*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
cpu/ppc4xx/start.o (.text)
*(.text)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss (NOLOAD) :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
}
_end = . ;
PROVIDE (end = .);
}

View file

@ -273,6 +273,5 @@ int checkboard(void)
void ft_board_setup(void *blob, bd_t *bd)
{
ft_cpu_setup(blob, bd);
fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
}
#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */

View file

@ -1,147 +0,0 @@
/*
* (C) Copyright 2001
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
cpu/ppc4xx/start.o (.text)
cpu/ppc4xx/traps.o (.text)
cpu/ppc4xx/interrupts.o (.text)
cpu/ppc4xx/4xx_uart.o (.text)
cpu/ppc4xx/cpu_init.o (.text)
cpu/ppc4xx/speed.o (.text)
common/dlmalloc.o (.text)
lib_generic/crc32.o (.text)
lib_ppc/extable.o (.text)
lib_generic/zlib.o (.text)
/* . = env_offset;*/
/* common/env_embedded.o(.text)*/
*(.text)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss (NOLOAD) :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
}
_end = . ;
PROVIDE (end = .);
}

View file

@ -34,7 +34,6 @@
DECLARE_GLOBAL_DATA_PTR;
/* Prototypes */
int gunzip(void *, int, unsigned char *, unsigned long *);
int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
unsigned long fpga_done_state(void);
unsigned long fpga_init_state(void);

View file

@ -1,132 +0,0 @@
/*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
cpu/ppc4xx/start.o (.text)
*(.text)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss (NOLOAD) :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
}
_end = . ;
PROVIDE (end = .);
}

View file

@ -31,7 +31,6 @@ LIB = $(obj)lib$(BOARD).a
COBJS = $(BOARD).o flash.o \
../common/misc.o \
../common/esd405ep_nand.o \
../common/auto_update.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))

View file

@ -26,6 +26,7 @@
#include <asm/io.h>
#include <command.h>
#include <malloc.h>
#include <sja1000.h>
#undef FPGA_DEBUG
@ -45,25 +46,6 @@ const unsigned char fpgadata[] =
*/
#include "../common/fpga.c"
/*
* include common auto-update code (for esd boards)
*/
#include "../common/auto_update.h"
au_image_t au_image[] = {
{"plu405/preinst.img", 0, -1, AU_SCRIPT},
{"plu405/u-boot.img", 0xfffc0000, 0x00040000, AU_FIRMWARE},
{"plu405/pImage_${bd_type}", 0x00000000, 0x00100000, AU_NAND},
{"plu405/pImage.initrd", 0x00100000, 0x00200000, AU_NAND},
{"plu405/yaffsmt2.img", 0x00300000, 0x01c00000, AU_NAND},
{"plu405/postinst.img", 0, 0, AU_SCRIPT},
};
int N_AU_IMAGES = (sizeof(au_image) / sizeof(au_image[0]));
/* Prototypes */
int gunzip(void *, int, unsigned char *, unsigned long *);
int board_early_init_f(void)
{
/*
@ -214,6 +196,13 @@ int misc_init_r(void)
out_8((void *)DUART1_BA + 1, fctr); /* write FCTR */
out_8((void *)DUART1_BA + 3, 0); /* write LCR */
/*
* Init magnetic couplers
*/
if (!getenv("noinitcoupler")) {
init_coupler(CAN0_BA);
init_coupler(CAN1_BA);
}
return 0;
}

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