mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-11 07:34:31 +00:00
Adjust board_f.c for ppc
This adds ppc features to the generic pre-relocation board init. This is a separate commit so that these features are clearly shown. Signed-off-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Simon Glass
Tom Rini
parent
632efa7440
commit
e4fef6cfcc
1 changed files with 332 additions and 2 deletions
334
common/board_f.c
334
common/board_f.c
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@ -31,10 +31,31 @@
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#include <version.h>
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#include <environment.h>
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#include <fdtdec.h>
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#if defined(CONFIG_CMD_IDE)
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#include <ide.h>
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#endif
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#include <i2c.h>
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#include <initcall.h>
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#include <logbuff.h>
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/* TODO: Can we move these into arch/ headers? */
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#ifdef CONFIG_8xx
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#include <mpc8xx.h>
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#endif
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#ifdef CONFIG_5xx
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#include <mpc5xx.h>
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#endif
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#ifdef CONFIG_MPC5xxx
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#include <mpc5xxx.h>
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#endif
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#include <post.h>
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#include <spi.h>
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#include <watchdog.h>
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#include <asm/io.h>
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#ifdef CONFIG_MP
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#include <asm/mp.h>
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#endif
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#include <asm/sections.h>
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#include <linux/compiler.h>
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@ -97,6 +118,31 @@ void blue_led_off(void) __attribute__((weak, alias("__blue_led_off")));
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* Could the CONFIG_SPL_BUILD infection become a flag in gd?
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*/
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#if defined(CONFIG_WATCHDOG)
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static int init_func_watchdog_init(void)
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{
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puts(" Watchdog enabled\n");
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WATCHDOG_RESET();
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return 0;
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}
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int init_func_watchdog_reset(void)
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{
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WATCHDOG_RESET();
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return 0;
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}
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#endif /* CONFIG_WATCHDOG */
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void __board_add_ram_info(int use_default)
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{
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/* please define platform specific board_add_ram_info() */
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}
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void board_add_ram_info(int)
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__attribute__ ((weak, alias("__board_add_ram_info")));
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static int init_baud_rate(void)
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{
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gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
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@ -134,6 +180,25 @@ static int announce_dram_init(void)
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return 0;
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}
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#ifdef CONFIG_PPC
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static int init_func_ram(void)
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{
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#ifdef CONFIG_BOARD_TYPES
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int board_type = gd->board_type;
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#else
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int board_type = 0; /* use dummy arg */
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#endif
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gd->ram_size = initdram(board_type);
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if (gd->ram_size > 0)
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return 0;
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puts("*** failed ***\n");
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return 1;
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}
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#endif
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static int show_dram_config(void)
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{
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ulong size;
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@ -154,11 +219,24 @@ static int show_dram_config(void)
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size = gd->ram_size;
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#endif
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print_size(size, "\n");
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print_size(size, "");
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board_add_ram_info(0);
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putc('\n');
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return 0;
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}
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ulong get_effective_memsize(void)
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{
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#ifndef CONFIG_VERY_BIG_RAM
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return gd->ram_size;
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#else
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/* limit stack to what we can reasonable map */
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return ((gd->ram_size > CONFIG_MAX_MEM_MAPPED) ?
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CONFIG_MAX_MEM_MAPPED : gd->ram_size);
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#endif
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}
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void __dram_init_banksize(void)
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{
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#if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
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@ -170,6 +248,27 @@ void __dram_init_banksize(void)
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void dram_init_banksize(void)
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__attribute__((weak, alias("__dram_init_banksize")));
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#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
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static int init_func_i2c(void)
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{
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puts("I2C: ");
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i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
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puts("ready\n");
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return 0;
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}
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#endif
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#if defined(CONFIG_HARD_SPI)
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static int init_func_spi(void)
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{
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puts("SPI: ");
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spi_init();
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puts("ready\n");
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return 0;
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}
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#endif
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__maybe_unused
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static int zero_global_data(void)
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{
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memset((void *)gd, '\0', sizeof(gd_t));
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@ -182,7 +281,8 @@ static int setup_mon_len(void)
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#ifdef CONFIG_SYS_SYM_OFFSETS
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gd->mon_len = _bss_end_ofs;
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#else
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gd->mon_len = (ulong)&__bss_end - (ulong)&__text_start;
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/* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
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gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
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#endif
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return 0;
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}
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@ -240,9 +340,20 @@ static int setup_dest_addr(void)
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#ifdef CONFIG_SYS_SDRAM_BASE
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gd->ram_top = CONFIG_SYS_SDRAM_BASE;
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#endif
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gd->ram_top += get_effective_memsize();
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gd->ram_top = board_get_usable_ram_top(gd->mon_len);
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gd->dest_addr = gd->ram_top;
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debug("Ram top: %08lX\n", (ulong)gd->ram_top);
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#if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
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/*
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* We need to make sure the location we intend to put secondary core
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* boot code is reserved and not used by any part of u-boot
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*/
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if (gd->dest_addr > determine_mp_bootpg(NULL)) {
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gd->dest_addr = determine_mp_bootpg(NULL);
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debug("Reserving MP boot page to %08lx\n", gd->dest_addr);
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}
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#endif
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gd->dest_addr_sp = gd->dest_addr;
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return 0;
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}
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@ -311,6 +422,18 @@ static int reserve_lcd(void)
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}
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#endif /* CONFIG_LCD */
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#if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) \
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&& !defined(CONFIG_ARM)
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static int reserve_video(void)
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{
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/* reserve memory for video display (always full pages) */
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gd->dest_addr = video_setmem(gd->dest_addr);
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gd->fb_base = gd->dest_addr;
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return 0;
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}
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#endif
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static int reserve_uboot(void)
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{
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/*
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@ -319,6 +442,10 @@ static int reserve_uboot(void)
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*/
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gd->dest_addr -= gd->mon_len;
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gd->dest_addr &= ~(4096 - 1);
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#ifdef CONFIG_E500
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/* round down to next 64 kB limit so that IVPR stays aligned */
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gd->dest_addr &= ~(65536 - 1);
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#endif
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debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
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gd->dest_addr);
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@ -391,6 +518,9 @@ static int reserve_stacks(void)
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gd->irq_sp = gd->dest_addr_sp;
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# endif
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#else
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# ifdef CONFIG_PPC
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ulong *s;
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# endif
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/* setup stack pointer for exceptions */
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gd->dest_addr_sp -= 16;
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@ -413,6 +543,11 @@ static int reserve_stacks(void)
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# endif
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/* leave 3 words for abort-stack, plus 1 for alignment */
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gd->dest_addr_sp -= 16;
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# elif defined(CONFIG_PPC)
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/* Clear initial stack frame */
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s = (ulong *) gd->dest_addr_sp;
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*s = 0; /* Terminate back chain */
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*++s = 0; /* NULL return address */
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# endif /* Architecture specific code */
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return 0;
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@ -426,6 +561,106 @@ static int display_new_sp(void)
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return 0;
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}
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#ifdef CONFIG_PPC
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static int setup_board_part1(void)
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{
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bd_t *bd = gd->bd;
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/*
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* Save local variables to board info struct
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*/
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bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
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bd->bi_memsize = gd->ram_size; /* size in bytes */
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#ifdef CONFIG_SYS_SRAM_BASE
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bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
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bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
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#endif
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#if defined(CONFIG_8xx) || defined(CONFIG_8260) || defined(CONFIG_5xx) || \
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defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
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bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
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#endif
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#if defined(CONFIG_MPC5xxx)
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bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
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#endif
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#if defined(CONFIG_MPC83xx)
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bd->bi_immrbar = CONFIG_SYS_IMMR;
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#endif
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#if defined(CONFIG_MPC8220)
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bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
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bd->bi_inpfreq = gd->arch.inp_clk;
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bd->bi_pcifreq = gd->pci_clk;
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bd->bi_vcofreq = gd->arch.vco_clk;
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bd->bi_pevfreq = gd->arch.pev_clk;
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bd->bi_flbfreq = gd->arch.flb_clk;
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/* store bootparam to sram (backward compatible), here? */
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{
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u32 *sram = (u32 *) CONFIG_SYS_SRAM_BASE;
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*sram++ = gd->ram_size;
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*sram++ = gd->bus_clk;
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*sram++ = gd->arch.inp_clk;
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*sram++ = gd->cpu_clk;
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*sram++ = gd->arch.vco_clk;
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*sram++ = gd->arch.flb_clk;
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*sram++ = 0xb8c3ba11; /* boot signature */
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}
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#endif
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return 0;
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}
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static int setup_board_part2(void)
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{
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bd_t *bd = gd->bd;
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bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
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bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
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#if defined(CONFIG_CPM2)
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bd->bi_cpmfreq = gd->arch.cpm_clk;
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bd->bi_brgfreq = gd->arch.brg_clk;
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bd->bi_sccfreq = gd->arch.scc_clk;
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bd->bi_vco = gd->arch.vco_out;
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#endif /* CONFIG_CPM2 */
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#if defined(CONFIG_MPC512X)
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bd->bi_ipsfreq = gd->arch.ips_clk;
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#endif /* CONFIG_MPC512X */
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#if defined(CONFIG_MPC5xxx)
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bd->bi_ipbfreq = gd->arch.ipb_clk;
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bd->bi_pcifreq = gd->pci_clk;
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#endif /* CONFIG_MPC5xxx */
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return 0;
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}
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#endif
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#ifdef CONFIG_SYS_EXTBDINFO
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static int setup_board_extra(void)
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{
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bd_t *bd = gd->bd;
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strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
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strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
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sizeof(bd->bi_r_version));
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bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
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bd->bi_plb_busfreq = gd->bus_clk;
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#if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
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defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
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defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
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bd->bi_pci_busfreq = get_PCI_freq();
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bd->bi_opbfreq = get_OPB_freq();
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#elif defined(CONFIG_XILINX_405)
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bd->bi_pci_busfreq = get_PCI_freq();
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#endif
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return 0;
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}
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#endif
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#ifdef CONFIG_POST
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static int init_post(void)
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{
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@ -496,9 +731,17 @@ static int mark_bootstage(void)
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}
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static init_fnc_t init_sequence_f[] = {
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#if !defined(CONFIG_CPM2) && !defined(CONFIG_MPC512X) && \
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!defined(CONFIG_MPC83xx) && !defined(CONFIG_MPC85xx) && \
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!defined(CONFIG_MPC86xx)
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zero_global_data,
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#endif
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setup_fdt,
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setup_mon_len,
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#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
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/* TODO: can this go into arch_cpu_init()? */
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probecpu,
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#endif
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arch_cpu_init, /* basic arch cpu dependent setup */
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mark_bootstage,
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#ifdef CONFIG_OF_CONTROL
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@ -507,33 +750,106 @@ static init_fnc_t init_sequence_f[] = {
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#if defined(CONFIG_BOARD_EARLY_INIT_F)
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board_early_init_f,
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#endif
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/* TODO: can any of this go into arch_cpu_init()? */
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#if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT)
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get_clocks, /* get CPU and bus clocks (etc.) */
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#if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
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&& !defined(CONFIG_TQM885D)
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adjust_sdram_tbs_8xx,
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#endif
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/* TODO: can we rename this to timer_init()? */
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init_timebase,
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#endif
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#if defined(CONFIG_BOARD_EARLY_INIT_F)
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board_early_init_f,
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#endif
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#ifdef CONFIG_ARM
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timer_init, /* initialize timer */
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#endif
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#ifdef CONFIG_BOARD_POSTCLK_INIT
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board_postclk_init,
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#endif
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#ifdef CONFIG_FSL_ESDHC
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get_clocks,
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#endif
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#ifdef CONFIG_SYS_ALLOC_DPRAM
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#if !defined(CONFIG_CPM2)
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dpram_init,
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#endif
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#endif
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#if defined(CONFIG_BOARD_POSTCLK_INIT)
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board_postclk_init,
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#endif
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env_init, /* initialize environment */
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#if defined(CONFIG_8xx_CPUCLK_DEFAULT)
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/* get CPU and bus clocks according to the environment variable */
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get_clocks_866,
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/* adjust sdram refresh rate according to the new clock */
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sdram_adjust_866,
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init_timebase,
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#endif
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init_baud_rate, /* initialze baudrate settings */
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serial_init, /* serial communications setup */
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console_init_f, /* stage 1 init of console */
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display_options, /* say that we are here */
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display_text_info, /* show debugging info if required */
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#if defined(CONFIG_8260)
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prt_8260_rsr,
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prt_8260_clks,
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#endif /* CONFIG_8260 */
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#if defined(CONFIG_MPC83xx)
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prt_83xx_rsr,
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#endif
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#ifdef CONFIG_PPC
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checkcpu,
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#endif
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#if defined(CONFIG_DISPLAY_CPUINFO)
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print_cpuinfo, /* display cpu info (and speed) */
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#endif
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#if defined(CONFIG_MPC5xxx)
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prt_mpc5xxx_clks,
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#endif /* CONFIG_MPC5xxx */
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#if defined(CONFIG_MPC8220)
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prt_mpc8220_clks,
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#endif
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#if defined(CONFIG_DISPLAY_BOARDINFO)
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checkboard, /* display board info */
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#endif
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INIT_FUNC_WATCHDOG_INIT
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#if defined(CONFIG_MISC_INIT_F)
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misc_init_f,
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#endif
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INIT_FUNC_WATCHDOG_RESET
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#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
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init_func_i2c,
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#endif
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#if defined(CONFIG_HARD_SPI)
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init_func_spi,
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#endif
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#ifdef CONFIG_X86
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dram_init_f, /* configure available RAM banks */
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#endif
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announce_dram_init,
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/* TODO: unify all these dram functions? */
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#ifdef CONFIG_ARM
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dram_init, /* configure available RAM banks */
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#endif
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#ifdef CONFIG_PPC
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init_func_ram,
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#endif
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#ifdef CONFIG_POST
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post_init_f,
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#endif
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INIT_FUNC_WATCHDOG_RESET
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#if defined(CONFIG_SYS_DRAM_TEST)
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testdram,
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#endif /* CONFIG_SYS_DRAM_TEST */
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INIT_FUNC_WATCHDOG_RESET
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#ifdef CONFIG_POST
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init_post,
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#endif
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INIT_FUNC_WATCHDOG_RESET
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/*
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||||
* Now that we have DRAM mapped and working, we can
|
||||
* relocate the code and continue running from DRAM.
|
||||
|
|
@ -560,6 +876,11 @@ static init_fnc_t init_sequence_f[] = {
|
|||
#endif
|
||||
#ifdef CONFIG_LCD
|
||||
reserve_lcd,
|
||||
#endif
|
||||
/* TODO: Why the dependency on CONFIG_8xx? */
|
||||
#if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) \
|
||||
&& !defined(CONFIG_ARM)
|
||||
reserve_video,
|
||||
#endif
|
||||
reserve_uboot,
|
||||
#ifndef CONFIG_SPL_BUILD
|
||||
|
|
@ -572,8 +893,17 @@ static init_fnc_t init_sequence_f[] = {
|
|||
reserve_stacks,
|
||||
setup_dram_config,
|
||||
show_dram_config,
|
||||
#ifdef CONFIG_PPC
|
||||
setup_board_part1,
|
||||
INIT_FUNC_WATCHDOG_RESET
|
||||
setup_board_part2,
|
||||
#endif
|
||||
setup_baud_rate,
|
||||
display_new_sp,
|
||||
#ifdef CONFIG_SYS_EXTBDINFO
|
||||
setup_board_extra,
|
||||
#endif
|
||||
INIT_FUNC_WATCHDOG_RESET
|
||||
reloc_fdt,
|
||||
setup_reloc,
|
||||
#ifndef CONFIG_ARM
|
||||
|
|
|
|||
Loading…
Reference in a new issue