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spi: cadence-qspi: Make reset control optional
In the TI am65 device tree files there is no reset defined. Also the Linux kernel driver uses devm_reset_control_get_optional_exclusive(..) to get the reset. Lets do the same as the kernel does and make thr reset optinal. Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
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parent
90de95f744
commit
e145606ff2
2 changed files with 9 additions and 7 deletions
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@ -201,11 +201,9 @@ static int cadence_spi_probe(struct udevice *bus)
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}
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}
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ret = reset_get_bulk(bus, &priv->resets);
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if (ret)
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dev_warn(bus, "Can't get reset: %d\n", ret);
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else
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reset_deassert_bulk(&priv->resets);
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priv->resets = devm_reset_bulk_get_optional(bus);
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if (priv->resets)
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reset_deassert_bulk(priv->resets);
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if (!priv->qspi_is_init) {
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cadence_qspi_apb_controller_init(plat);
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@ -220,8 +218,12 @@ static int cadence_spi_probe(struct udevice *bus)
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static int cadence_spi_remove(struct udevice *dev)
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{
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struct cadence_spi_priv *priv = dev_get_priv(dev);
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int ret = 0;
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return reset_release_bulk(&priv->resets);
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if (priv->resets)
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ret = reset_release_bulk(priv->resets);
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return ret;
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}
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static int cadence_spi_set_mode(struct udevice *bus, uint mode)
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@ -56,7 +56,7 @@ struct cadence_spi_priv {
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unsigned int qspi_calibrated_cs;
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unsigned int previous_hz;
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struct reset_ctl_bulk resets;
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struct reset_ctl_bulk *resets;
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};
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/* Functions call declaration */
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