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armv8: K3: am654: Add custom MMU support
Add MMU mappings for AM654 SoC. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
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2 changed files with 46 additions and 0 deletions
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@ -4,3 +4,4 @@
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# Lokesh Vutla <lokeshvutla@ti.com>
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# Lokesh Vutla <lokeshvutla@ti.com>
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obj-$(CONFIG_SOC_K3_AM6) += am6_init.o
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obj-$(CONFIG_SOC_K3_AM6) += am6_init.o
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obj-$(CONFIG_ARM64) += arm64-mmu.o
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45
arch/arm/mach-k3/arm64-mmu.c
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45
arch/arm/mach-k3/arm64-mmu.c
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* K3: ARM64 MMU setup
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*
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* Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
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* Lokesh Vutla <lokeshvutla@ti.com>
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* (This file is derived from arch/arm/cpu/armv8/zynqmp/cpu.c)
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*
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*/
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#include <common.h>
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#include <asm/system.h>
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#include <asm/armv8/mmu.h>
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/* NR_DRAM_BANKS + 32bit IO + 64bit IO + terminator */
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#define NR_MMU_REGIONS (CONFIG_NR_DRAM_BANKS + 3)
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/* ToDo: Add 64bit IO */
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struct mm_region am654_mem_map[NR_MMU_REGIONS] = {
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{
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.virt = 0x0UL,
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.phys = 0x0UL,
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.size = 0x80000000UL,
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.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
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PTE_BLOCK_NON_SHARE |
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PTE_BLOCK_PXN | PTE_BLOCK_UXN
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}, {
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.virt = 0x80000000UL,
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.phys = 0x80000000UL,
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.size = 0x80000000UL,
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.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
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PTE_BLOCK_INNER_SHARE
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}, {
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.virt = 0x880000000UL,
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.phys = 0x880000000UL,
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.size = 0x80000000UL,
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.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
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PTE_BLOCK_INNER_SHARE
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}, {
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/* List terminator */
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0,
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}
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};
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struct mm_region *mem_map = am654_mem_map;
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