exynos: Leave the compiler to choose the register to avoid possible r0 corruption

Reported-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr>

Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This commit is contained in:
Guillaume GARDET 2019-01-04 09:23:19 +01:00 committed by Minkyu Kang
parent 2a195703d6
commit df1ff4d6ba

View file

@ -58,8 +58,7 @@ struct exynos5_sysreg {
/* Move 0xd3 value to CPSR register to enable SVC mode */
#define svc32_mode_en() __asm__ __volatile__ \
("@ I&F disable, Mode: 0x13 - SVC\n\t" \
"mov r0, #0x13|0xC0\n\t" \
"msr cpsr_c, r0\n\t" : : )
"msr cpsr_c, %0\n\t" : : "r"(0x13|0xC0))
/* Set program counter with the given value */
#define set_pc(x) __asm__ __volatile__ ("mov pc, %0\n\t" : : "r"(x))