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arm: zynq: Fix indentation for zynq-cse targets

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Trivial DT style fixes.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This commit is contained in:
Michal Simek 2018-07-20 10:17:17 +02:00
parent 7996fcca9d
commit df09969070
2 changed files with 1 additions and 3 deletions
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3
arch/arm/dts/zynq-cse-nand.dts
View file

@ -38,7 +38,7 @@
#size-cells = <1>;
ranges;
slcr: slcr@f8000000 {
slcr: slcr@f8000000 {
u-boot,dm-pre-reloc;
#address-cells = <1>;
#size-cells = <1>;
@ -72,7 +72,6 @@
};
};
};
};
&dcc {

1
arch/arm/dts/zynq-cse-nor.dts
View file

@ -79,7 +79,6 @@
};
};
};
};
&dcc {