mpc512x: Move common files to share them by several boards

We will soon see several new MPC521x based boards added.  This patch
moves files that are not board specific to a common directory so they
can be shared by all such ports.  It also splits off common IDE code
into a new file, cpu/mpc512x/ide.c .

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: John Rigby <jcrigby@gmail.com>
This commit is contained in:
Wolfgang Denk 2009-05-16 10:47:38 +02:00
parent 03e069dc0a
commit de26ef99bd
8 changed files with 150 additions and 120 deletions

View file

@ -28,10 +28,6 @@ $(shell mkdir -p $(OBJTREE)/board/freescale/common)
LIB = $(obj)lib$(BOARD).a
COBJS-y := $(BOARD).o
COBJS-${CONFIG_FSL_DIU_FB} += ads5121_diu.o
COBJS-${CONFIG_FSL_DIU_FB} += ../freescale/common/fsl_diu_fb.o
COBJS-${CONFIG_FSL_DIU_FB} += ../freescale/common/fsl_logo_bmp.o
COBJS-$(CONFIG_PCI) += pci.o
COBJS := $(COBJS-y)
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)

View file

@ -216,7 +216,7 @@ long int fixed_sdram (void)
int misc_init_r(void)
{
u8 tmp_val;
extern int ads5121_diu_init(void);
extern int mpc5121_diu_init(void);
/* Using this for DIU init before the driver in linux takes over
* Enable the TFP410 Encoder (I2C address 0x38)
@ -239,7 +239,7 @@ int misc_init_r(void)
#ifdef CONFIG_FSL_DIU_FB
#if !(defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE))
ads5121_diu_init();
mpc5121_diu_init();
#endif
#endif
@ -329,104 +329,3 @@ void ft_board_setup(void *blob, bd_t *bd)
fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
}
#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */
#if defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_RESET)
void init_ide_reset (void)
{
volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
debug ("init_ide_reset\n");
/*
* Clear the reset bit to reset the interface
* cf. RefMan MPC5121EE: 28.4.1 Resetting the ATA Bus
*/
immr->pata.pata_ata_control = 0;
udelay(100);
/* Assert the reset bit to enable the interface */
immr->pata.pata_ata_control = FSL_ATA_CTRL_ATA_RST_B;
udelay(100);
}
void ide_set_reset (int idereset)
{
volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
debug ("ide_set_reset(%d)\n", idereset);
if (idereset) {
immr->pata.pata_ata_control = 0;
udelay(100);
} else {
immr->pata.pata_ata_control = FSL_ATA_CTRL_ATA_RST_B;
udelay(100);
}
}
#define CALC_TIMING(t) (t + period - 1) / period
int ide_preinit (void)
{
volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
long t;
const struct {
short t0;
short t1;
short t2_8;
short t2_16;
short t2i;
short t4;
short t9;
short tA;
} pio_specs = {
.t0 = 600,
.t1 = 70,
.t2_8 = 290,
.t2_16 = 165,
.t2i = 0,
.t4 = 30,
.t9 = 20,
.tA = 50,
};
union {
u32 config;
struct {
u8 field1;
u8 field2;
u8 field3;
u8 field4;
}bytes;
}cfg;
debug ("IDE preinit using PATA peripheral at IMMR-ADDR %08x\n",
(u32)&immr->pata);
/* Set the reset bit to 1 to enable the interface */
immr->pata.pata_ata_control = FSL_ATA_CTRL_ATA_RST_B;
/* Init timings : we use PIO mode 0 timings */
t = 1000000000 / gd->ips_clk; /* period in ns */
cfg.bytes.field1 = 3;
cfg.bytes.field2 = 3;
cfg.bytes.field3 = (pio_specs.t1 + t) / t;
cfg.bytes.field4 = (pio_specs.t2_8 + t) / t;
immr->pata.pata_time1 = cfg.config;
cfg.bytes.field1 = (pio_specs.t2_8 + t) / t;
cfg.bytes.field2 = (pio_specs.tA + t) / t + 2;
cfg.bytes.field3 = 1;
cfg.bytes.field4 = (pio_specs.t4 + t) / t;
immr->pata.pata_time2 = cfg.config;
cfg.config = immr->pata.pata_time3;
cfg.bytes.field1 = (pio_specs.t9 + t) / t;
immr->pata.pata_time3 = cfg.config;
debug ("PATA preinit complete.\n");
return 0;
}
#endif /* defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_RESET) */

View file

@ -22,11 +22,18 @@
include $(TOPDIR)/config.mk
$(shell mkdir -p $(OBJTREE)/board/freescale/common)
LIB = $(obj)lib$(CPU).a
START = start.o
COBJS-y := traps.o cpu.o cpu_init.o speed.o interrupts.o serial.o i2c.o iopin.o
COBJS-${CONFIG_FSL_DIU_FB} += diu.o
COBJS-${CONFIG_FSL_DIU_FB} += ../../board/freescale/common/fsl_diu_fb.o
COBJS-${CONFIG_FSL_DIU_FB} += ../../board/freescale/common/fsl_logo_bmp.o
COBJS-${CONFIG_CMD_IDE} += ide.o
COBJS-${CONFIG_IIM} += iim.o
COBJS-$(CONFIG_PCI) += pci.o
COBJS := $(COBJS-y)
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)

View file

@ -1,5 +1,5 @@
#
# (C) Copyright 2007 DENX Software Engineering
# (C) Copyright 2007-2009 DENX Software Engineering
#
# See file CREDITS for list of people who contributed to this
# project.
@ -23,3 +23,7 @@ PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi
PLATFORM_CPPFLAGS += -DCONFIG_MPC512X -DCONFIG_E300 \
-ffixed-r2 -msoft-float -mcpu=603e
# Use default linker script.
# A board port can override this setting in board/*/config.mk
LDSCRIPT := $(SRCTREE)/cpu/mpc512x/u-boot.lds

View file

@ -27,10 +27,8 @@
#include <command.h>
#include <asm/io.h>
#ifdef CONFIG_FSL_DIU_FB
#include "../freescale/common/pixis.h"
#include "../freescale/common/fsl_diu_fb.h"
#include "../../board/freescale/common/pixis.h"
#include "../../board/freescale/common/fsl_diu_fb.h"
#if defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE)
#include <devices.h>
@ -81,7 +79,7 @@ char *valid_bmp(char *addr)
return (char *)h_addr;
}
int ads5121_diu_init(void)
int mpc5121_diu_init(void)
{
unsigned int pixel_format;
char *bmp = NULL;
@ -91,7 +89,7 @@ int ads5121_diu_init(void)
yres = 768;
pixel_format = 0x88883316;
debug("ads5121_diu_init\n");
debug("mpc5121_diu_init\n");
bmp_env = getenv("diu_bmp_addr");
if (bmp_env) {
bmp = valid_bmp(bmp_env);
@ -101,7 +99,7 @@ int ads5121_diu_init(void)
return fsl_diu_init(xres, pixel_format, 0, (unsigned char *)bmp);
}
int ads5121diu_init_show_bmp(cmd_tbl_t *cmdtp,
int mpc5121diu_init_show_bmp(cmd_tbl_t *cmdtp,
int flag, int argc, char *argv[])
{
unsigned int addr;
@ -116,7 +114,7 @@ int ads5121diu_init_show_bmp(cmd_tbl_t *cmdtp,
fsl_diu_clear_screen();
drv_video_init();
#else
return ads5121_diu_init();
return mpc5121_diu_init();
#endif
} else {
addr = simple_strtoul(argv[1], NULL, 16);
@ -128,7 +126,7 @@ int ads5121diu_init_show_bmp(cmd_tbl_t *cmdtp,
}
U_BOOT_CMD(
diufb, CONFIG_SYS_MAXARGS, 1, ads5121diu_init_show_bmp,
diufb, CONFIG_SYS_MAXARGS, 1, mpc5121diu_init_show_bmp,
"Init or Display BMP file",
"init\n - initialize DIU\n"
"addr\n - display bmp at address 'addr'"
@ -146,7 +144,7 @@ void *video_hw_init(void)
GraphicDevice *pGD = (GraphicDevice *) &ctfb;
struct fb_info *info;
if (ads5121_diu_init() < 0)
if (mpc5121_diu_init() < 0)
return;
/* fill in Graphic device struct */
@ -189,5 +187,3 @@ void video_set_lut
}
#endif /* defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE) */
#endif /* CONFIG_FSL_DIU_FB */

128
cpu/mpc512x/ide.c Normal file
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@ -0,0 +1,128 @@
/*
* (C) Copyright 2007-2009 DENX Software Engineering
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
*/
#include <common.h>
#include <command.h>
#include <asm/processor.h>
DECLARE_GLOBAL_DATA_PTR;
#if defined(CONFIG_IDE_RESET)
void init_ide_reset (void)
{
volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
debug ("init_ide_reset\n");
/*
* Clear the reset bit to reset the interface
* cf. RefMan MPC5121EE: 28.4.1 Resetting the ATA Bus
*/
immr->pata.pata_ata_control = 0;
udelay(100);
/* Assert the reset bit to enable the interface */
immr->pata.pata_ata_control = FSL_ATA_CTRL_ATA_RST_B;
udelay(100);
}
void ide_set_reset (int idereset)
{
volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
debug ("ide_set_reset(%d)\n", idereset);
if (idereset) {
immr->pata.pata_ata_control = 0;
udelay(100);
} else {
immr->pata.pata_ata_control = FSL_ATA_CTRL_ATA_RST_B;
udelay(100);
}
}
#define CALC_TIMING(t) (t + period - 1) / period
int ide_preinit (void)
{
volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
long t;
const struct {
short t0;
short t1;
short t2_8;
short t2_16;
short t2i;
short t4;
short t9;
short tA;
} pio_specs = {
.t0 = 600,
.t1 = 70,
.t2_8 = 290,
.t2_16 = 165,
.t2i = 0,
.t4 = 30,
.t9 = 20,
.tA = 50,
};
union {
u32 config;
struct {
u8 field1;
u8 field2;
u8 field3;
u8 field4;
}bytes;
}cfg;
debug ("IDE preinit using PATA peripheral at IMMR-ADDR %08x\n",
(u32)&immr->pata);
/* Set the reset bit to 1 to enable the interface */
immr->pata.pata_ata_control = FSL_ATA_CTRL_ATA_RST_B;
/* Init timings : we use PIO mode 0 timings */
t = 1000000000 / gd->ips_clk; /* period in ns */
cfg.bytes.field1 = 3;
cfg.bytes.field2 = 3;
cfg.bytes.field3 = (pio_specs.t1 + t) / t;
cfg.bytes.field4 = (pio_specs.t2_8 + t) / t;
immr->pata.pata_time1 = cfg.config;
cfg.bytes.field1 = (pio_specs.t2_8 + t) / t;
cfg.bytes.field2 = (pio_specs.tA + t) / t + 2;
cfg.bytes.field3 = 1;
cfg.bytes.field4 = (pio_specs.t4 + t) / t;
immr->pata.pata_time2 = cfg.config;
cfg.config = immr->pata.pata_time3;
cfg.bytes.field1 = (pio_specs.t9 + t) / t;
immr->pata.pata_time3 = cfg.config;
debug ("PATA preinit complete.\n");
return 0;
}
#endif /* defined(CONFIG_IDE_RESET) */