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arm: samsung: Remove dead LCD code

Browse source 
Since bb5930d5c9 ("exynos: video: Convert several boards to driver
model for video") there have been no callers of any of the exynos_lcd_*
family of functions.  Remove these from the boards, and then remove
unused logo and related code as well.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
This commit is contained in:
Tom Rini 2022-06-10 22:59:31 -04:00
parent 713a8cbb94
commit dc2d27ae72
14 changed files with 0 additions and 9060 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

1
arch/arm/mach-exynos/include/mach/system.h
View file

@ -116,6 +116,5 @@ struct exynos5_sysreg {
void set_usbhost_mode(unsigned int mode);
void set_system_display_ctrl(void);
int exynos_lcd_early_init(const void *blob);
#endif /* _EXYNOS4_SYSTEM_H */

23
board/samsung/trats/trats.c
View file

@ -403,16 +403,6 @@ int exynos_early_init_f(void)
return 0;
}
void exynos_reset_lcd(void)
{
gpio_request(EXYNOS4_GPIO_Y45, "lcd_reset");
gpio_direction_output(EXYNOS4_GPIO_Y45, 1);
udelay(10000);
gpio_direction_output(EXYNOS4_GPIO_Y45, 0);
udelay(10000);
gpio_direction_output(EXYNOS4_GPIO_Y45, 1);
}
int lcd_power(void)
{
#if !CONFIG_IS_ENABLED(DM_I2C) /* TODO(maintainer): Convert to driver model */
@ -460,16 +450,3 @@ int mipi_power(void)
#endif
return 0;
}
#ifdef CONFIG_LCD
void exynos_lcd_misc_init(vidinfo_t *vid)
{
#ifdef CONFIG_TIZEN
get_tizen_logo_info(vid);
#endif
#ifdef CONFIG_S6E8AX0
s6e8ax0_init();
env_set("lcdinfo", "lcd=s6e8ax0");
#endif
}
#endif

35
board/samsung/trats2/trats2.c
View file

@ -302,39 +302,4 @@ int mipi_power(void)
return 0;
}
void exynos_lcd_power_on(void)
{
#if !CONFIG_IS_ENABLED(DM_I2C) /* TODO(maintainer): Convert to driver model */
struct pmic *p = pmic_get("MAX77686_PMIC");
/* LCD_2.2V_EN: GPC0[1] */
gpio_request(EXYNOS4X12_GPIO_C01, "lcd_2v2_en");
gpio_set_pull(EXYNOS4X12_GPIO_C01, S5P_GPIO_PULL_UP);
gpio_direction_output(EXYNOS4X12_GPIO_C01, 1);
/* LDO25 VCC_3.1V_LCD */
pmic_probe(p);
max77686_set_ldo_voltage(p, 25, 3100000);
max77686_set_ldo_mode(p, 25, OPMODE_LPM);
#endif
}
void exynos_reset_lcd(void)
{
/* reset lcd */
gpio_request(EXYNOS4X12_GPIO_F21, "lcd_reset");
gpio_direction_output(EXYNOS4X12_GPIO_F21, 0);
udelay(10);
gpio_set_value(EXYNOS4X12_GPIO_F21, 1);
}
void exynos_lcd_misc_init(vidinfo_t *vid)
{
#ifdef CONFIG_TIZEN
get_tizen_logo_info(vid);
#endif
#ifdef CONFIG_S6E8AX0
s6e8ax0_init();
#endif
}
#endif /* LCD */

107
board/samsung/universal_c210/universal.c
View file

@ -267,98 +267,6 @@ static int init_pmic_lcd(void)
return 0;
}
void exynos_cfg_lcd_gpio(void)
{
unsigned int i, f3_end = 4;
for (i = 0; i < 8; i++) {
/* set GPF0,1,2[0:7] for RGB Interface and Data lines (32bit) */
gpio_cfg_pin(EXYNOS4_GPIO_F00 + i, S5P_GPIO_FUNC(2));
gpio_cfg_pin(EXYNOS4_GPIO_F10 + i, S5P_GPIO_FUNC(2));
gpio_cfg_pin(EXYNOS4_GPIO_F20 + i, S5P_GPIO_FUNC(2));
/* pull-up/down disable */
gpio_set_pull(EXYNOS4_GPIO_F00 + i, S5P_GPIO_PULL_NONE);
gpio_set_pull(EXYNOS4_GPIO_F10 + i, S5P_GPIO_PULL_NONE);
gpio_set_pull(EXYNOS4_GPIO_F20 + i, S5P_GPIO_PULL_NONE);
/* drive strength to max (24bit) */
gpio_set_drv(EXYNOS4_GPIO_F00 + i, S5P_GPIO_DRV_4X);
gpio_set_rate(EXYNOS4_GPIO_F00 + i, S5P_GPIO_DRV_SLOW);
gpio_set_drv(EXYNOS4_GPIO_F10 + i, S5P_GPIO_DRV_4X);
gpio_set_rate(EXYNOS4_GPIO_F10 + i, S5P_GPIO_DRV_SLOW);
gpio_set_drv(EXYNOS4_GPIO_F20 + i, S5P_GPIO_DRV_4X);
gpio_set_rate(EXYNOS4_GPIO_F00 + i, S5P_GPIO_DRV_SLOW);
}
for (i = EXYNOS4_GPIO_F30; i < (EXYNOS4_GPIO_F30 + f3_end); i++) {
/* set GPF3[0:3] for RGB Interface and Data lines (32bit) */
gpio_cfg_pin(i, S5P_GPIO_FUNC(2));
/* pull-up/down disable */
gpio_set_pull(i, S5P_GPIO_PULL_NONE);
/* drive strength to max (24bit) */
gpio_set_drv(i, S5P_GPIO_DRV_4X);
gpio_set_rate(i, S5P_GPIO_DRV_SLOW);
}
/* gpio pad configuration for LCD reset. */
gpio_request(EXYNOS4_GPIO_Y45, "lcd_reset");
gpio_cfg_pin(EXYNOS4_GPIO_Y45, S5P_GPIO_OUTPUT);
}
int mipi_power(void)
{
return 0;
}
void exynos_reset_lcd(void)
{
gpio_set_value(EXYNOS4_GPIO_Y45, 1);
udelay(10000);
gpio_set_value(EXYNOS4_GPIO_Y45, 0);
udelay(10000);
gpio_set_value(EXYNOS4_GPIO_Y45, 1);
udelay(100);
}
void exynos_lcd_power_on(void)
{
struct udevice *dev;
int ret;
u8 reg;
ret = pmic_get("max8998-pmic", &dev);
if (ret) {
puts("Failed to get MAX8998!\n");
return;
}
reg = pmic_reg_read(dev, MAX8998_REG_ONOFF3);
reg |= MAX8998_LDO17;
ret = pmic_reg_write(dev, MAX8998_REG_ONOFF3, reg);
if (ret) {
puts("MAX8998 LDO setting error\n");
return;
}
reg = pmic_reg_read(dev, MAX8998_REG_ONOFF2);
reg |= MAX8998_LDO7;
ret = pmic_reg_write(dev, MAX8998_REG_ONOFF2, reg);
if (ret) {
puts("MAX8998 LDO setting error\n");
return;
}
}
void exynos_cfg_ldo(void)
{
ld9040_cfg_ldo();
}
void exynos_enable_ldo(unsigned int onoff)
{
ld9040_enable_ldo(onoff);
}
int exynos_init(void)
{
gd->bd->bi_arch_number = MACH_TYPE_UNIVERSAL_C210;
@ -390,18 +298,3 @@ int exynos_init(void)
return 0;
}
#ifdef CONFIG_LCD
void exynos_lcd_misc_init(vidinfo_t *vid)
{
#ifdef CONFIG_TIZEN
get_tizen_logo_info(vid);
#endif
/* for LD9040. */
vid->pclk_name = 1; /* MPLL */
vid->sclk_div = 1;
env_set("lcdinfo", "lcd=ld9040");
}
#endif

1
drivers/video/Makefile
View file

@ -38,7 +38,6 @@ obj-$(CONFIG_NXP_TDA19988) += tda19988.o
obj-$(CONFIG_OSD) += video_osd-uclass.o
obj-$(CONFIG_PXA_LCD) += pxa_lcd.o
obj-$(CONFIG_SANDBOX_OSD) += sandbox_osd.o
obj-$(CONFIG_S6E8AX0) += s6e8ax0.o
obj-$(CONFIG_SCF0403_LCD) += scf0403_lcd.o
obj-$(CONFIG_VIDEO_ARM_MALIDP) += mali_dp.o
obj-$(CONFIG_VIDEO_BCM2835) += bcm2835.o

265
drivers/video/s6e8ax0.c
View file

@ -1,265 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2012 Samsung Electronics
*
* Author: Donghwa Lee <dh09.lee@samsung.com>
*/
#include <common.h>
#include <asm/arch/mipi_dsim.h>
#include <linux/delay.h>
#include "exynos/exynos_mipi_dsi_lowlevel.h"
#include "exynos/exynos_mipi_dsi_common.h"
static void s6e8ax0_panel_cond(struct mipi_dsim_device *dsim_dev)
{
struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
int reverse = dsim_dev->dsim_lcd_dev->reverse_panel;
static const unsigned char data_to_send[] = {
0xf8, 0x3d, 0x35, 0x00, 0x00, 0x00, 0x8d, 0x00, 0x4c,
0x6e, 0x10, 0x27, 0x7d, 0x3f, 0x10, 0x00, 0x00, 0x20,
0x04, 0x08, 0x6e, 0x00, 0x00, 0x00, 0x02, 0x08, 0x08,
0x23, 0x23, 0xc0, 0xc8, 0x08, 0x48, 0xc1, 0x00, 0xc3,
0xff, 0xff, 0xc8
};
static const unsigned char data_to_send_reverse[] = {
0xf8, 0x19, 0x35, 0x00, 0x00, 0x00, 0x93, 0x00, 0x3c,
0x7d, 0x08, 0x27, 0x7d, 0x3f, 0x00, 0x00, 0x00, 0x20,
0x04, 0x08, 0x6e, 0x00, 0x00, 0x00, 0x02, 0x08, 0x08,
0x23, 0x23, 0xc0, 0xc1, 0x01, 0x41, 0xc1, 0x00, 0xc1,
0xf6, 0xf6, 0xc1
};
if (reverse) {
ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
data_to_send_reverse,
ARRAY_SIZE(data_to_send_reverse));
} else {
ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
data_to_send, ARRAY_SIZE(data_to_send));
}
}
static void s6e8ax0_display_cond(struct mipi_dsim_device *dsim_dev)
{
struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
static const unsigned char data_to_send[] = {
0xf2, 0x80, 0x03, 0x0d
};
ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
data_to_send, ARRAY_SIZE(data_to_send));
}
static void s6e8ax0_gamma_cond(struct mipi_dsim_device *dsim_dev)
{
struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
/* 7500K 2.2 Set : 30cd */
static const unsigned char data_to_send[] = {
0xfa, 0x01, 0x60, 0x10, 0x60, 0xf5, 0x00, 0xff, 0xad,
0xaf, 0xba, 0xc3, 0xd8, 0xc5, 0x9f, 0xc6, 0x9e, 0xc1,
0xdc, 0xc0, 0x00, 0x61, 0x00, 0x5a, 0x00, 0x74,
};
ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
data_to_send, ARRAY_SIZE(data_to_send));
}
static void s6e8ax0_gamma_update(struct mipi_dsim_device *dsim_dev)
{
struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
static const unsigned char data_to_send[] = {
0xf7, 0x03
};
ops->cmd_write(dsim_dev, MIPI_DSI_DCS_SHORT_WRITE_PARAM, data_to_send,
ARRAY_SIZE(data_to_send));
}
static void s6e8ax0_etc_source_control(struct mipi_dsim_device *dsim_dev)
{
struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
static const unsigned char data_to_send[] = {
0xf6, 0x00, 0x02, 0x00
};
ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
data_to_send, ARRAY_SIZE(data_to_send));
}
static void s6e8ax0_etc_pentile_control(struct mipi_dsim_device *dsim_dev)
{
struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
static const unsigned char data_to_send[] = {
0xb6, 0x0c, 0x02, 0x03, 0x32, 0xff, 0x44, 0x44, 0xc0,
0x00
};
ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
data_to_send, ARRAY_SIZE(data_to_send));
}
static void s6e8ax0_etc_mipi_control1(struct mipi_dsim_device *dsim_dev)
{
struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
static const unsigned char data_to_send[] = {
0xe1, 0x10, 0x1c, 0x17, 0x08, 0x1d
};
ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
data_to_send, ARRAY_SIZE(data_to_send));
}
static void s6e8ax0_etc_mipi_control2(struct mipi_dsim_device *dsim_dev)
{
struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
static const unsigned char data_to_send[] = {
0xe2, 0xed, 0x07, 0xc3, 0x13, 0x0d, 0x03
};
ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
data_to_send, ARRAY_SIZE(data_to_send));
}
static void s6e8ax0_etc_power_control(struct mipi_dsim_device *dsim_dev)
{
struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
static const unsigned char data_to_send[] = {
0xf4, 0xcf, 0x0a, 0x12, 0x10, 0x19, 0x33, 0x02
};
ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
data_to_send, ARRAY_SIZE(data_to_send));
}
static void s6e8ax0_etc_mipi_control3(struct mipi_dsim_device *dsim_dev)
{
struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
static const unsigned char data_to_send[] = {
0xe3, 0x40
};
ops->cmd_write(dsim_dev, MIPI_DSI_DCS_SHORT_WRITE_PARAM, data_to_send,
ARRAY_SIZE(data_to_send));
}
static void s6e8ax0_etc_mipi_control4(struct mipi_dsim_device *dsim_dev)
{
struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
static const unsigned char data_to_send[] = {
0xe4, 0x00, 0x00, 0x14, 0x80, 0x00, 0x00, 0x00
};
ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
data_to_send, ARRAY_SIZE(data_to_send));
}
static void s6e8ax0_elvss_set(struct mipi_dsim_device *dsim_dev)
{
struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
static const unsigned char data_to_send[] = {
0xb1, 0x04, 0x00
};
ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
data_to_send, ARRAY_SIZE(data_to_send));
}
static void s6e8ax0_display_on(struct mipi_dsim_device *dsim_dev)
{
struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
static const unsigned char data_to_send[] = {
0x29, 0x00
};
ops->cmd_write(dsim_dev, MIPI_DSI_DCS_SHORT_WRITE, data_to_send,
ARRAY_SIZE(data_to_send));
}
static void s6e8ax0_sleep_out(struct mipi_dsim_device *dsim_dev)
{
struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
static const unsigned char data_to_send[] = {
0x11, 0x00
};
ops->cmd_write(dsim_dev, MIPI_DSI_DCS_SHORT_WRITE, data_to_send,
ARRAY_SIZE(data_to_send));
}
static void s6e8ax0_apply_level1_key(struct mipi_dsim_device *dsim_dev)
{
struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
static const unsigned char data_to_send[] = {
0xf0, 0x5a, 0x5a
};
ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
data_to_send, ARRAY_SIZE(data_to_send));
}
static void s6e8ax0_apply_mtp_key(struct mipi_dsim_device *dsim_dev)
{
struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
static const unsigned char data_to_send[] = {
0xf1, 0x5a, 0x5a
};
ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
data_to_send, ARRAY_SIZE(data_to_send));
}
static void s6e8ax0_panel_init(struct mipi_dsim_device *dsim_dev)
{
/*
* in case of setting gamma and panel condition at first,
* it shuold be setting like below.
* set_gamma() -> set_panel_condition()
*/
s6e8ax0_apply_level1_key(dsim_dev);
s6e8ax0_apply_mtp_key(dsim_dev);
s6e8ax0_sleep_out(dsim_dev);
mdelay(5);
s6e8ax0_panel_cond(dsim_dev);
s6e8ax0_display_cond(dsim_dev);
s6e8ax0_gamma_cond(dsim_dev);
s6e8ax0_gamma_update(dsim_dev);
s6e8ax0_etc_source_control(dsim_dev);
s6e8ax0_elvss_set(dsim_dev);
s6e8ax0_etc_pentile_control(dsim_dev);
s6e8ax0_etc_mipi_control1(dsim_dev);
s6e8ax0_etc_mipi_control2(dsim_dev);
s6e8ax0_etc_power_control(dsim_dev);
s6e8ax0_etc_mipi_control3(dsim_dev);
s6e8ax0_etc_mipi_control4(dsim_dev);
}
static int s6e8ax0_panel_set(struct mipi_dsim_device *dsim_dev)
{
s6e8ax0_panel_init(dsim_dev);
return 0;
}
static void s6e8ax0_display_enable(struct mipi_dsim_device *dsim_dev)
{
s6e8ax0_display_on(dsim_dev);
}
static struct mipi_dsim_lcd_driver s6e8ax0_dsim_ddi_driver = {
.name = "s6e8ax0",
.id = -1,
.mipi_panel_init = s6e8ax0_panel_set,
.mipi_display_on = s6e8ax0_display_enable,
};
void s6e8ax0_init(void)
{
exynos_mipi_dsi_register_lcd_driver(&s6e8ax0_dsim_ddi_driver);
}

2
include/configs/s5pc210_universal.h
View file

@ -11,8 +11,6 @@
#include <configs/exynos4-common.h>
#define CONFIG_TIZEN /* TIZEN lib */
/* Keep L2 Cache Disabled */
/* Universal has 2 banks of DRAM */

2
include/configs/trats.h
View file

@ -13,8 +13,6 @@
#define CONFIG_TRATS
#define CONFIG_TIZEN /* TIZEN lib */
#ifndef CONFIG_SYS_L2CACHE_OFF
#define CONFIG_SYS_L2_PL310
#define CONFIG_SYS_PL310_BASE 0x10502000

2
include/configs/trats2.h
View file

@ -12,8 +12,6 @@
#include <configs/exynos4-common.h>
#define CONFIG_TIZEN /* TIZEN lib */
#ifndef CONFIG_SYS_L2CACHE_OFF
#define CONFIG_SYS_L2_PL310
#define CONFIG_SYS_PL310_BASE 0x10502000

1
lib/Makefile
View file

@ -11,7 +11,6 @@ obj-$(CONFIG_EFI_LOADER) += efi_loader/
obj-$(CONFIG_CMD_BOOTEFI_SELFTEST) += efi_selftest/
obj-$(CONFIG_LZMA) += lzma/
obj-$(CONFIG_BZIP2) += bzip2/
obj-$(CONFIG_TIZEN) += tizen/
obj-$(CONFIG_FIT) += libfdt/
obj-$(CONFIG_OF_LIVE) += of_live.o
obj-$(CONFIG_CMD_DHRYSTONE) += dhry/

6
lib/tizen/Makefile
View file

@ -1,6 +0,0 @@
# SPDX-License-Identifier: GPL-2.0+
#
# (C) Copyright 2012 Samsung Electronics
# Donghwa Lee <dh09.lee@samsung.com>
obj-$(CONFIG_TIZEN) += tizen.o

34
lib/tizen/tizen.c
View file

@ -1,34 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2012 Samsung Electronics
* Donghwa Lee <dh09.lee@samsung.com>
*/
#include <common.h>
#include <lcd.h>
#include <libtizen.h>
#include "tizen_logo_16bpp.h"
#include "tizen_logo_16bpp_gzip.h"
#ifdef CONFIG_LCD
void get_tizen_logo_info(vidinfo_t *vid)
{
switch (vid->vl_bpix) {
case 4:
vid->logo_width = TIZEN_LOGO_16BPP_WIDTH;
vid->logo_height = TIZEN_LOGO_16BPP_HEIGHT;
vid->logo_x_offset = TIZEN_LOGO_16BPP_X_OFFSET;
vid->logo_y_offset = TIZEN_LOGO_16BPP_Y_OFFSET;
#if defined(CONFIG_VIDEO_BMP_GZIP)
vid->logo_addr = (ulong)tizen_logo_16bpp_gzip;
#else
vid->logo_addr = (ulong)tizen_logo_16bpp;
#endif
break;
default:
vid->logo_addr = 0;
break;
}
}
#endif

7934
lib/tizen/tizen_logo_16bpp.h
View file

File diff suppressed because it is too large Load diff

647
lib/tizen/tizen_logo_16bpp_gzip.h
View file

@ -1,647 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* (C) Copyright 2013 Samsung Electronics
* Przemyslaw Marczak <p.marczak@samsung.com>
*/
#ifndef __TIZEN_LOGO_16BPP_GZIP__
#define __TIZEN_LOGO_16BPP_GZIP__
/* Format: GZIP: BMP RGB565 16BPP 452x140 */
unsigned char tizen_logo_16bpp_gzip[] = {
0x1f,0x8b,0x08,0x08,0xd9,0x76,0x29,0x53,0x00,0x03,0x74,0x69,0x7a,0x65,0x6e,0x5f,
0x6c,0x6f,0x67,0x6f,0x2e,0x62,0x6d,0x70,0x00,0xed,0x9d,0x6f,0x6c,0x1b,0x67,0x7e,
0xe7,0xa9,0x4d,0x80,0x65,0xbb,0x2e,0x56,0xb1,0xd8,0x25,0xcf,0x0a,0x70,0x52,0xa4,
0x2d,0xc2,0x5a,0x39,0x58,0x35,0xf7,0x42,0x35,0x7a,0x63,0xd5,0x6a,0x1b,0x9d,0x5c,
0xd4,0x0a,0x85,0xca,0xde,0x35,0x70,0x1b,0xc7,0x29,0xbc,0xaa,0xbb,0x50,0x14,0x0a,
0xd6,0x79,0xdf,0x9c,0x2b,0x07,0x88,0xa1,0xb8,0x88,0x4a,0x11,0x2b,0x83,0x7a,0x71,
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#endif