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drivers: timer: omap_timer: add timer driver for omap devices based on dm
Adding a timer driver for omap devices based on driver model and device tree. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
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3 changed files with 115 additions and 0 deletions
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@ -30,4 +30,10 @@ config X86_TSC_TIMER
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help
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help
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Select this to enable Time-Stamp Counter (TSC) timer for x86.
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Select this to enable Time-Stamp Counter (TSC) timer for x86.
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config OMAP_TIMER
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bool "Omap timer support"
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depends on TIMER
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help
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Select this to enable an timer for Omap devices.
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endmenu
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endmenu
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@ -8,3 +8,4 @@ obj-$(CONFIG_TIMER) += timer-uclass.o
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obj-$(CONFIG_ALTERA_TIMER) += altera_timer.o
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obj-$(CONFIG_ALTERA_TIMER) += altera_timer.o
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obj-$(CONFIG_SANDBOX_TIMER) += sandbox_timer.o
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obj-$(CONFIG_SANDBOX_TIMER) += sandbox_timer.o
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obj-$(CONFIG_X86_TSC_TIMER) += tsc_timer.o
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obj-$(CONFIG_X86_TSC_TIMER) += tsc_timer.o
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obj-$(CONFIG_OMAP_TIMER) += omap-timer.o
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108
drivers/timer/omap-timer.c
Normal file
108
drivers/timer/omap-timer.c
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@ -0,0 +1,108 @@
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/*
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* TI OMAP timer driver
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*
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* Copyright (C) 2015, Texas Instruments, Incorporated
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <dm.h>
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#include <errno.h>
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#include <timer.h>
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#include <asm/io.h>
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#include <asm/arch/clock.h>
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DECLARE_GLOBAL_DATA_PTR;
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/* Timer register bits */
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#define TCLR_START BIT(0) /* Start=1 */
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#define TCLR_AUTO_RELOAD BIT(1) /* Auto reload */
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#define TCLR_PRE_EN BIT(5) /* Pre-scaler enable */
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#define TCLR_PTV_SHIFT (2) /* Pre-scaler shift value */
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#define TIMER_CLOCK (V_SCLK / (2 << CONFIG_SYS_PTV))
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struct omap_gptimer_regs {
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unsigned int tidr; /* offset 0x00 */
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unsigned char res1[12];
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unsigned int tiocp_cfg; /* offset 0x10 */
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unsigned char res2[12];
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unsigned int tier; /* offset 0x20 */
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unsigned int tistatr; /* offset 0x24 */
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unsigned int tistat; /* offset 0x28 */
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unsigned int tisr; /* offset 0x2c */
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unsigned int tcicr; /* offset 0x30 */
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unsigned int twer; /* offset 0x34 */
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unsigned int tclr; /* offset 0x38 */
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unsigned int tcrr; /* offset 0x3c */
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unsigned int tldr; /* offset 0x40 */
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unsigned int ttgr; /* offset 0x44 */
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unsigned int twpc; /* offset 0x48 */
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unsigned int tmar; /* offset 0x4c */
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unsigned int tcar1; /* offset 0x50 */
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unsigned int tscir; /* offset 0x54 */
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unsigned int tcar2; /* offset 0x58 */
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};
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/* Omap Timer Priv */
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struct omap_timer_priv {
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struct omap_gptimer_regs *regs;
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};
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static int omap_timer_get_count(struct udevice *dev, u64 *count)
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{
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struct omap_timer_priv *priv = dev_get_priv(dev);
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*count = readl(&priv->regs->tcrr);
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return 0;
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}
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static int omap_timer_probe(struct udevice *dev)
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{
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struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
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struct omap_timer_priv *priv = dev_get_priv(dev);
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uc_priv->clock_rate = TIMER_CLOCK;
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/* start the counter ticking up, reload value on overflow */
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writel(0, &priv->regs->tldr);
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/* enable timer */
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writel((CONFIG_SYS_PTV << 2) | TCLR_PRE_EN | TCLR_AUTO_RELOAD |
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TCLR_START, &priv->regs->tclr);
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return 0;
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}
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static int omap_timer_ofdata_to_platdata(struct udevice *dev)
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{
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struct omap_timer_priv *priv = dev_get_priv(dev);
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priv->regs = (struct omap_gptimer_regs *)dev_get_addr(dev);
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return 0;
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}
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static const struct timer_ops omap_timer_ops = {
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.get_count = omap_timer_get_count,
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};
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static const struct udevice_id omap_timer_ids[] = {
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{ .compatible = "ti,am335x-timer" },
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{ .compatible = "ti,am4372-timer" },
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{ .compatible = "ti,omap5430-timer" },
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{}
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};
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U_BOOT_DRIVER(omap_timer) = {
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.name = "omap_timer",
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.id = UCLASS_TIMER,
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.of_match = omap_timer_ids,
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.ofdata_to_platdata = omap_timer_ofdata_to_platdata,
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.priv_auto_alloc_size = sizeof(struct omap_timer_priv),
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.probe = omap_timer_probe,
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.ops = &omap_timer_ops,
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.flags = DM_FLAG_PRE_RELOC,
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};
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