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x86: broadwell: Add a northbridge driver

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Add a driver for the broadwell northbridge. This sets up the location of
several blocks of registers.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Bin Meng <bmeng.cn@gmail.com>
This commit is contained in:
Simon Glass 2016-03-11 22:07:22 -07:00 committed by Bin Meng
parent d2c29d9a2c
commit da3363d5d2
2 changed files with 60 additions and 0 deletions
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1
arch/x86/cpu/broadwell/Makefile
View file

@ -6,6 +6,7 @@
obj-y += cpu.o
obj-y += iobp.o
obj-y += northbridge.o
obj-y += pch.o
obj-y += pinctrl_broadwell.o
obj-y += sata.o

59
arch/x86/cpu/broadwell/northbridge.c Normal file
View file

@ -0,0 +1,59 @@
/*
* Copyright (C) 2011 The Chromium Authors
*
* SPDX-License-Identifier: GPL-2.0
*/
#include <common.h>
#include <dm.h>
#include <asm/io.h>
#include <asm/arch/iomap.h>
#include <asm/arch/pch.h>
static int broadwell_northbridge_early_init(struct udevice *dev)
{
/* Move earlier? */
dm_pci_write_config32(dev, PCIEXBAR + 4, 0);
/* 64MiB - 0-63 buses */
dm_pci_write_config32(dev, PCIEXBAR, MCFG_BASE_ADDRESS | 4 | 1);
dm_pci_write_config32(dev, MCHBAR, MCH_BASE_ADDRESS | 1);
dm_pci_write_config32(dev, DMIBAR, DMI_BASE_ADDRESS | 1);
dm_pci_write_config32(dev, EPBAR, EP_BASE_ADDRESS | 1);
writel(EDRAM_BASE_ADDRESS | 1, MCH_BASE_ADDRESS + EDRAMBAR);
writel(GDXC_BASE_ADDRESS | 1, MCH_BASE_ADDRESS + GDXCBAR);
/* Set C0000-FFFFF to access RAM on both reads and writes */
dm_pci_write_config8(dev, PAM0, 0x30);
dm_pci_write_config8(dev, PAM1, 0x33);
dm_pci_write_config8(dev, PAM2, 0x33);
dm_pci_write_config8(dev, PAM3, 0x33);
dm_pci_write_config8(dev, PAM4, 0x33);
dm_pci_write_config8(dev, PAM5, 0x33);
dm_pci_write_config8(dev, PAM6, 0x33);
/* Device enable: IGD and Mini-HD */
dm_pci_write_config32(dev, DEVEN, DEVEN_D0EN | DEVEN_D2EN | DEVEN_D3EN);
return 0;
}
static int broadwell_northbridge_probe(struct udevice *dev)
{
if (!(gd->flags & GD_FLG_RELOC))
return broadwell_northbridge_early_init(dev);
return 0;
}
static const struct udevice_id broadwell_northbridge_ids[] = {
{ .compatible = "intel,broadwell-northbridge" },
{ }
};
U_BOOT_DRIVER(broadwell_northbridge_drv) = {
.name = "broadwell_northbridge",
.id = UCLASS_NORTHBRIDGE,
.of_match = broadwell_northbridge_ids,
.probe = broadwell_northbridge_probe,
};