mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-24 21:54:01 +00:00
video: siemens: Drop unused video code
Drop this old code which is not built anymore, as it depends on CONFIG_VIDEO which has been removed. Signed-off-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
parent
814dd92bdc
commit
d77c6fbd3f
5 changed files with 0 additions and 449 deletions
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@ -96,9 +96,6 @@ int board_init(void)
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#ifdef CONFIG_NAND_CS_INIT
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board_nand_cs_init();
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#endif
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#ifdef CONFIG_VIDEO
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board_video_init();
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#endif
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return 0;
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}
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@ -275,13 +275,6 @@ int factoryset_read_eeprom(int i2c_addr)
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}
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printf("DFU USB: VID = 0x%4x, PID = 0x%4x\n", factory_dat.usb_vendor_id,
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factory_dat.usb_product_id);
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#endif
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#if defined(CONFIG_VIDEO)
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if (0 <= get_factory_record_val(cp, size, (uchar *)"DISP1",
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(uchar *)"name", factory_dat.disp_name,
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MAX_STRING_LENGTH)) {
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debug("display name: %s\n", factory_dat.disp_name);
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}
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#endif
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if (0 <= get_factory_record_val(cp, size, (uchar *)"DEV",
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(uchar *)"num", factory_dat.serial,
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@ -17,9 +17,6 @@ struct factorysetcontainer {
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int usb_vendor_id;
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int usb_product_id;
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int pxm50;
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#if defined(CONFIG_VIDEO)
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unsigned char disp_name[MAX_STRING_LENGTH];
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#endif
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unsigned char serial[MAX_STRING_LENGTH];
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int version;
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uchar asn[MAX_STRING_LENGTH];
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@ -28,7 +28,6 @@
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#include <asm/arch/gpio.h>
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#include <asm/arch/mmc_host_def.h>
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#include <asm/arch/sys_proto.h>
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#include "../../../drivers/video/da8xx-fb.h"
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#include <asm/io.h>
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#include <asm/emif.h>
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#include <asm/gpio.h>
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@ -243,194 +242,6 @@ int board_eth_init(struct bd_info *bis)
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}
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#endif /* #if defined(CONFIG_DRIVER_TI_CPSW) */
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#if defined(CONFIG_VIDEO) && !defined(CONFIG_SPL_BUILD)
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static struct da8xx_panel lcd_panels[] = {
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/* AUO G156XW01 V1 */
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[0] = {
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.name = "AUO_G156XW01_V1",
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.width = 1376,
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.height = 768,
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.hfp = 14,
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.hbp = 64,
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.hsw = 56,
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.vfp = 1,
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.vbp = 28,
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.vsw = 3,
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.pxl_clk = 60000000,
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.invert_pxl_clk = 0,
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},
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/* AUO B101EVN06 V0 */
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[1] = {
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.name = "AUO_B101EVN06_V0",
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.width = 1280,
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.height = 800,
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.hfp = 52,
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.hbp = 84,
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.hsw = 36,
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.vfp = 3,
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.vbp = 14,
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.vsw = 6,
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.pxl_clk = 60000000,
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.invert_pxl_clk = 0,
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},
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/*
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* Settings from factoryset
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* stored in EEPROM
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*/
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[2] = {
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.name = "factoryset",
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.width = 0,
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.height = 0,
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.hfp = 0,
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.hbp = 0,
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.hsw = 0,
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.vfp = 0,
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.vbp = 0,
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.vsw = 0,
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.pxl_clk = 60000000,
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.invert_pxl_clk = 0,
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},
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};
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static const struct display_panel disp_panel = {
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WVGA,
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32,
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16,
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COLOR_ACTIVE,
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};
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static const struct lcd_ctrl_config lcd_cfg = {
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&disp_panel,
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.ac_bias = 255,
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.ac_bias_intrpt = 0,
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.dma_burst_sz = 16,
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.bpp = 32,
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.fdd = 0x80,
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.tft_alt_mode = 0,
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.stn_565_mode = 0,
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.mono_8bit_mode = 0,
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.invert_line_clock = 1,
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.invert_frm_clock = 1,
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.sync_edge = 0,
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.sync_ctrl = 1,
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.raster_order = 0,
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};
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static int set_gpio(int gpio, int state)
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{
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gpio_request(gpio, "temp");
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gpio_direction_output(gpio, state);
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gpio_set_value(gpio, state);
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gpio_free(gpio);
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return 0;
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}
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static int enable_backlight(void)
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{
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set_gpio(BOARD_LCD_POWER, 1);
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set_gpio(BOARD_BACK_LIGHT, 1);
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set_gpio(BOARD_TOUCH_POWER, 1);
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return 0;
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}
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static int enable_pwm(void)
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{
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struct pwmss_regs *pwmss = (struct pwmss_regs *)PWMSS0_BASE;
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struct pwmss_ecap_regs *ecap;
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int ticks = PWM_TICKS;
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int duty = PWM_DUTY;
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ecap = (struct pwmss_ecap_regs *)AM33XX_ECAP0_BASE;
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/* enable clock */
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setbits_le32(&pwmss->clkconfig, ECAP_CLK_EN);
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/* TimeStam Counter register */
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writel(0xdb9, &ecap->tsctr);
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/* config period */
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writel(ticks - 1, &ecap->cap3);
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writel(ticks - 1, &ecap->cap1);
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setbits_le16(&ecap->ecctl2,
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(ECTRL2_MDSL_ECAP | ECTRL2_SYNCOSEL_MASK | 0xd0));
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/* config duty */
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writel(duty, &ecap->cap2);
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writel(duty, &ecap->cap4);
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/* start */
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setbits_le16(&ecap->ecctl2, ECTRL2_CTRSTP_FREERUN);
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return 0;
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}
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static struct dpll_regs dpll_lcd_regs = {
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.cm_clkmode_dpll = CM_WKUP + 0x98,
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.cm_idlest_dpll = CM_WKUP + 0x48,
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.cm_clksel_dpll = CM_WKUP + 0x54,
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};
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/* no console on this board */
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int board_cfb_skip(void)
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{
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return 1;
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}
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#define PLL_GET_M(v) ((v >> 8) & 0x7ff)
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#define PLL_GET_N(v) (v & 0x7f)
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static int get_clk(struct dpll_regs *dpll_regs)
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{
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unsigned int val;
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unsigned int m, n;
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int f = 0;
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val = readl(dpll_regs->cm_clksel_dpll);
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m = PLL_GET_M(val);
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n = PLL_GET_N(val);
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f = (m * V_OSCK) / n;
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return f;
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};
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int clk_get(int clk)
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{
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return get_clk(&dpll_lcd_regs);
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};
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static int conf_disp_pll(int m, int n)
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{
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struct cm_perpll *cmper = (struct cm_perpll *)CM_PER;
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struct cm_dpll *cmdpll = (struct cm_dpll *)CM_DPLL;
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struct dpll_params dpll_lcd = {m, n, -1, -1, -1, -1, -1};
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u32 *const clk_domains[] = {
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&cmper->lcdclkctrl,
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0
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};
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u32 *const clk_modules_explicit_en[] = {
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&cmper->lcdclkctrl,
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&cmper->lcdcclkstctrl,
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&cmper->epwmss0clkctrl,
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0
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};
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do_enable_clocks(clk_domains, clk_modules_explicit_en, 1);
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writel(0x0, &cmdpll->clklcdcpixelclk);
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do_setup_dpll(&dpll_lcd_regs, &dpll_lcd);
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return 0;
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}
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static int board_video_init(void)
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{
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conf_disp_pll(24, 1);
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if (factory_dat.pxm50)
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da8xx_video_init(&lcd_panels[0], &lcd_cfg, lcd_cfg.bpp);
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else
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da8xx_video_init(&lcd_panels[1], &lcd_cfg, lcd_cfg.bpp);
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enable_pwm();
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enable_backlight();
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return 0;
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}
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#endif
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#ifdef CONFIG_BOARD_LATE_INIT
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int board_late_init(void)
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{
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@ -37,7 +37,6 @@
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#include <linux/delay.h>
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#include "board.h"
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#include "../common/factoryset.h"
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#include "../../../drivers/video/da8xx-fb.h"
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/*
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* Read header information from EEPROM into global structure.
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@ -224,252 +223,6 @@ void hw_watchdog_init(void)
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}
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#endif /* defined(CONFIG_HW_WATCHDOG) */
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#if defined(CONFIG_VIDEO) && !defined(CONFIG_SPL_BUILD)
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static struct da8xx_panel lcd_panels[] = {
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/* FORMIKE, 4.3", 480x800, KWH043MC17-F01 */
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[0] = {
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.name = "KWH043MC17-F01",
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.width = 480,
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.height = 800,
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.hfp = 50, /* no spec, "don't care" values */
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.hbp = 50,
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.hsw = 50,
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.vfp = 50,
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.vbp = 50,
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.vsw = 50,
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.pxl_clk = 35910000, /* tCYCD=20ns, max 50MHz, 60fps */
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.invert_pxl_clk = 1,
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},
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/* FORMIKE, 4.3", 480x800, KWH043ST20-F01 */
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[1] = {
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.name = "KWH043ST20-F01",
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.width = 480,
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.height = 800,
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.hfp = 50, /* no spec, "don't care" values */
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.hbp = 50,
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.hsw = 50,
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.vfp = 50,
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.vbp = 50,
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.vsw = 50,
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.pxl_clk = 35910000, /* tCYCD=20ns, max 50MHz, 60fps */
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.invert_pxl_clk = 1,
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},
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/* Multi-Inno, 4.3", 480x800, MI0430VT-1 */
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[2] = {
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.name = "MI0430VT-1",
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.width = 480,
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.height = 800,
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.hfp = 50, /* no spec, "don't care" values */
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.hbp = 50,
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.hsw = 50,
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.vfp = 50,
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.vbp = 50,
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.vsw = 50,
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.pxl_clk = 35910000, /* tCYCD=20ns, max 50MHz, 60fps */
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.invert_pxl_clk = 1,
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},
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};
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static const struct display_panel disp_panels[] = {
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[0] = {
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WVGA,
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16, /* RGB 888 */
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16,
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COLOR_ACTIVE,
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},
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[1] = {
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WVGA,
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16, /* RGB 888 */
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16,
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COLOR_ACTIVE,
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},
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[2] = {
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WVGA,
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24, /* RGB 888 */
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16,
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COLOR_ACTIVE,
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},
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};
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static const struct lcd_ctrl_config lcd_cfgs[] = {
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[0] = {
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&disp_panels[0],
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.ac_bias = 255,
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.ac_bias_intrpt = 0,
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.dma_burst_sz = 16,
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.bpp = 16,
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.fdd = 0x80,
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.tft_alt_mode = 0,
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.stn_565_mode = 0,
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.mono_8bit_mode = 0,
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.invert_line_clock = 1,
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.invert_frm_clock = 1,
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.sync_edge = 0,
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.sync_ctrl = 1,
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.raster_order = 0,
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},
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[1] = {
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&disp_panels[1],
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.ac_bias = 255,
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.ac_bias_intrpt = 0,
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.dma_burst_sz = 16,
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.bpp = 16,
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.fdd = 0x80,
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.tft_alt_mode = 0,
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.stn_565_mode = 0,
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.mono_8bit_mode = 0,
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.invert_line_clock = 1,
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.invert_frm_clock = 1,
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.sync_edge = 0,
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.sync_ctrl = 1,
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.raster_order = 0,
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},
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[2] = {
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&disp_panels[2],
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.ac_bias = 255,
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.ac_bias_intrpt = 0,
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.dma_burst_sz = 16,
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.bpp = 24,
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.fdd = 0x80,
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.tft_alt_mode = 0,
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.stn_565_mode = 0,
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.mono_8bit_mode = 0,
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.invert_line_clock = 1,
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.invert_frm_clock = 1,
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.sync_edge = 0,
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.sync_ctrl = 1,
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.raster_order = 0,
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},
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};
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/* no console on this board */
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int board_cfb_skip(void)
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{
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return 1;
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}
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#define PLL_GET_M(v) ((v >> 8) & 0x7ff)
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#define PLL_GET_N(v) (v & 0x7f)
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static struct dpll_regs dpll_lcd_regs = {
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.cm_clkmode_dpll = CM_WKUP + 0x98,
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.cm_idlest_dpll = CM_WKUP + 0x48,
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.cm_clksel_dpll = CM_WKUP + 0x54,
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};
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static int get_clk(struct dpll_regs *dpll_regs)
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{
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unsigned int val;
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unsigned int m, n;
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int f = 0;
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val = readl(dpll_regs->cm_clksel_dpll);
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m = PLL_GET_M(val);
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n = PLL_GET_N(val);
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f = (m * V_OSCK) / n;
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return f;
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};
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int clk_get(int clk)
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{
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return get_clk(&dpll_lcd_regs);
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};
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static int conf_disp_pll(int m, int n)
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{
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struct cm_perpll *cmper = (struct cm_perpll *)CM_PER;
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struct dpll_params dpll_lcd = {m, n, -1, -1, -1, -1, -1};
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#if defined(DISPL_PLL_SPREAD_SPECTRUM)
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struct cm_wkuppll *cmwkup = (struct cm_wkuppll *)CM_WKUP;
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#endif
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u32 *const clk_domains[] = {
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&cmper->lcdclkctrl,
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0
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};
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u32 *const clk_modules_explicit_en[] = {
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&cmper->lcdclkctrl,
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&cmper->lcdcclkstctrl,
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&cmper->spi1clkctrl,
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0
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};
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do_enable_clocks(clk_domains, clk_modules_explicit_en, 1);
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do_setup_dpll(&dpll_lcd_regs, &dpll_lcd);
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#if defined(DISPL_PLL_SPREAD_SPECTRUM)
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writel(0x64, &cmwkup->resv6[3]); /* 0x50 */
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writel(0x800, &cmwkup->resv6[2]); /* 0x4c */
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writel(readl(&cmwkup->clkmoddplldisp) | CM_CLKMODE_DPLL_SSC_EN_MASK,
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&cmwkup->clkmoddplldisp); /* 0x98 */
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#endif
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return 0;
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}
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static int set_gpio(int gpio, int state)
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{
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gpio_request(gpio, "temp");
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gpio_direction_output(gpio, state);
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gpio_set_value(gpio, state);
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gpio_free(gpio);
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return 0;
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}
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static int enable_lcd(void)
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{
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unsigned char buf[1];
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set_gpio(BOARD_LCD_RESET, 0);
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mdelay(1);
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set_gpio(BOARD_LCD_RESET, 1);
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mdelay(1);
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/* spi lcd init */
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kwh043st20_f01_spi_startup(1, 0, 5000000, SPI_MODE_0);
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/* backlight on */
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buf[0] = 0xf;
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i2c_write(0x24, 0x7, 1, buf, 1);
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buf[0] = 0x3f;
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i2c_write(0x24, 0x8, 1, buf, 1);
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return 0;
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}
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int arch_early_init_r(void)
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{
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enable_lcd();
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return 0;
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}
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static int board_video_init(void)
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{
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int i;
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int anzdisp = ARRAY_SIZE(lcd_panels);
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int display = 1;
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for (i = 0; i < anzdisp; i++) {
|
||||
if (strncmp((const char *)factory_dat.disp_name,
|
||||
lcd_panels[i].name,
|
||||
strlen((const char *)factory_dat.disp_name)) == 0) {
|
||||
printf("DISPLAY: %s\n", factory_dat.disp_name);
|
||||
break;
|
||||
}
|
||||
}
|
||||
if (i == anzdisp) {
|
||||
i = 1;
|
||||
printf("%s: %s not found, using default %s\n", __func__,
|
||||
factory_dat.disp_name, lcd_panels[i].name);
|
||||
}
|
||||
conf_disp_pll(24, 1);
|
||||
da8xx_video_init(&lcd_panels[display], &lcd_cfgs[display],
|
||||
lcd_cfgs[display].bpp);
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif /* ifdef CONFIG_VIDEO */
|
||||
|
||||
#ifdef CONFIG_BOARD_LATE_INIT
|
||||
int board_late_init(void)
|
||||
{
|
||||
|
|
Loading…
Reference in a new issue