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arm: socfpga: provide default SPL_SIZE_LIMIT for gen5

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This provides an SPL_SIZE_LIMIT that makes the build check that the SPL
binary loaded from flash fits into the SRAM (64 KiB) and leaves enough
room for global data, heap  and stack (512 bytes assumed stack usage).

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
This commit is contained in:
Simon Goldschmidt 2019-06-13 21:50:28 +02:00 committed by Marek Vasut
parent b861cfb53c
commit d6d383ca27
1 changed files with 8 additions and 0 deletions
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8
arch/arm/mach-socfpga/Kconfig
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@ -3,6 +3,12 @@ if ARCH_SOCFPGA
config NR_DRAM_BANKS
default 1
config SPL_SIZE_LIMIT
default 65536 if TARGET_SOCFPGA_GEN5
config SPL_SIZE_LIMIT_PROVIDE_STACK
default 0x200 if TARGET_SOCFPGA_GEN5
config SPL_STACK_R_ADDR
default 0x00800000 if TARGET_SOCFPGA_GEN5
@ -49,6 +55,8 @@ config TARGET_SOCFPGA_GEN5
bool
select SPL_ALTERA_SDRAM
imply FPGA_SOCFPGA
imply SPL_SIZE_LIMIT_SUBTRACT_GD
imply SPL_SIZE_LIMIT_SUBTRACT_MALLOC
imply SPL_STACK_R
imply SPL_SYS_MALLOC_SIMPLE
imply USE_TINY_PRINTF