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https://github.com/AsahiLinux/u-boot
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board: prodrive: delete unused source files
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Stefan Roese <sr@denx.de> Acked-by: Stefan Roese <sr@denx.de>
This commit is contained in:
Masahiro Yamada
Tom Rini
parent
ddd880f8d4
commit
d62bb61f7c
2 changed files with 0 additions and 711 deletions
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@ -1,544 +0,0 @@
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/*
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* (C) Copyright 2006
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* Stefan Roese, DENX Software Engineering, sr@denx.de.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/processor.h>
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flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
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/*
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* Functions
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*/
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static int write_word(flash_info_t *info, ulong dest, ulong data);
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void flash_print_info(flash_info_t *info)
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{
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int i;
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int k;
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int size;
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int erased;
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volatile unsigned long *flash;
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if (info->flash_id == FLASH_UNKNOWN) {
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printf ("missing or unknown FLASH type\n");
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return;
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}
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switch (info->flash_id & FLASH_VENDMASK) {
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case FLASH_MAN_AMD: printf ("AMD "); break;
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case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
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case FLASH_MAN_SST: printf ("SST "); break;
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case FLASH_MAN_STM: printf ("ST "); break;
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case FLASH_MAN_EXCEL: printf ("Excel Semiconductor "); break;
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default: printf ("Unknown Vendor "); break;
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}
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switch (info->flash_id & FLASH_TYPEMASK) {
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case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
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break;
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case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n");
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break;
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case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
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break;
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case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n");
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break;
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case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
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break;
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case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n");
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break;
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case FLASH_AM320T: printf ("AM29LV320T (32 M, top sector)\n");
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break;
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case FLASH_AM320B: printf ("AM29LV320B (32 M, bottom sector)\n");
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break;
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case FLASH_AMDL322T: printf ("AM29DL322T (32 M, top sector)\n");
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break;
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case FLASH_AMDL322B: printf ("AM29DL322B (32 M, bottom sector)\n");
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break;
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case FLASH_AMDL323T: printf ("AM29DL323T (32 M, top sector)\n");
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break;
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case FLASH_AMDL323B: printf ("AM29DL323B (32 M, bottom sector)\n");
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break;
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case FLASH_SST020: printf ("SST39LF/VF020 (2 Mbit, uniform sector size)\n");
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break;
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case FLASH_SST040: printf ("SST39LF/VF040 (4 Mbit, uniform sector size)\n");
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break;
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default: printf ("Unknown Chip Type\n");
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break;
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}
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printf (" Size: %ld MB in %d Sectors\n",
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info->size >> 20, info->sector_count);
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printf (" Sector Start Addresses:");
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for (i=0; i<info->sector_count; ++i) {
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#ifdef CONFIG_SYS_FLASH_EMPTY_INFO
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/*
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* Check if whole sector is erased
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*/
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if (i != (info->sector_count-1))
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size = info->start[i+1] - info->start[i];
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else
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size = info->start[0] + info->size - info->start[i];
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erased = 1;
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flash = (volatile unsigned long *)info->start[i];
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size = size >> 2; /* divide by 4 for longword access */
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for (k=0; k<size; k++) {
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if (*flash++ != 0xffffffff) {
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erased = 0;
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break;
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}
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}
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if ((i % 5) == 0)
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printf ("\n ");
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/* print empty and read-only info */
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printf (" %08lX%s%s",
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info->start[i],
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erased ? " E" : " ",
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info->protect[i] ? "RO " : " ");
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#else
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if ((i % 5) == 0)
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printf ("\n ");
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printf (" %08lX%s",
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info->start[i],
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info->protect[i] ? " (RO)" : " ");
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#endif
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}
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printf ("\n");
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return;
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}
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/*
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* The following code cannot be run from FLASH!
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*/
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static ulong flash_get_size(vu_long *addr, flash_info_t *info)
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{
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short i;
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short n;
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CONFIG_SYS_FLASH_WORD_SIZE value;
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ulong base = (ulong)addr;
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volatile CONFIG_SYS_FLASH_WORD_SIZE *addr2 = (CONFIG_SYS_FLASH_WORD_SIZE *)addr;
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/* Write auto select command: read Manufacturer ID */
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addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00AA00AA;
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addr2[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00550055;
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addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00900090;
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value = addr2[CONFIG_SYS_FLASH_READ0];
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switch (value) {
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case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_MANUFACT:
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info->flash_id = FLASH_MAN_AMD;
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break;
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case (CONFIG_SYS_FLASH_WORD_SIZE)FUJ_MANUFACT:
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info->flash_id = FLASH_MAN_FUJ;
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break;
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case (CONFIG_SYS_FLASH_WORD_SIZE)SST_MANUFACT:
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info->flash_id = FLASH_MAN_SST;
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break;
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case (CONFIG_SYS_FLASH_WORD_SIZE)STM_MANUFACT:
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info->flash_id = FLASH_MAN_STM;
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break;
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case (CONFIG_SYS_FLASH_WORD_SIZE)EXCEL_MANUFACT:
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info->flash_id = FLASH_MAN_EXCEL;
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break;
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default:
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info->flash_id = FLASH_UNKNOWN;
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info->sector_count = 0;
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info->size = 0;
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return (0); /* no or unknown flash */
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}
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value = addr2[CONFIG_SYS_FLASH_READ1]; /* device ID */
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switch (value) {
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case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_LV400T:
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info->flash_id += FLASH_AM400T;
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info->sector_count = 11;
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info->size = 0x00080000;
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break; /* => 0.5 MB */
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case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_LV400B:
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info->flash_id += FLASH_AM400B;
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info->sector_count = 11;
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info->size = 0x00080000;
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break; /* => 0.5 MB */
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case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_LV800T:
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info->flash_id += FLASH_AM800T;
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info->sector_count = 19;
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info->size = 0x00100000;
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break; /* => 1 MB */
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case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_LV800B:
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info->flash_id += FLASH_AM800B;
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info->sector_count = 19;
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info->size = 0x00100000;
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break; /* => 1 MB */
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case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_LV160T:
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info->flash_id += FLASH_AM160T;
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info->sector_count = 35;
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info->size = 0x00200000;
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break; /* => 2 MB */
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case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_LV160B:
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info->flash_id += FLASH_AM160B;
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info->sector_count = 35;
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info->size = 0x00200000;
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break; /* => 2 MB */
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case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_LV320T:
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info->flash_id += FLASH_AM320T;
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info->sector_count = 71;
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info->size = 0x00400000; break; /* => 4 MB */
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case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_LV320B:
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info->flash_id += FLASH_AM320B;
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info->sector_count = 71;
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info->size = 0x00400000; break; /* => 4 MB */
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case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_DL322T:
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info->flash_id += FLASH_AMDL322T;
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info->sector_count = 71;
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info->size = 0x00400000; break; /* => 4 MB */
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case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_DL322B:
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info->flash_id += FLASH_AMDL322B;
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info->sector_count = 71;
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info->size = 0x00400000; break; /* => 4 MB */
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case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_DL323T:
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info->flash_id += FLASH_AMDL323T;
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info->sector_count = 71;
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info->size = 0x00400000; break; /* => 4 MB */
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case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_DL323B:
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info->flash_id += FLASH_AMDL323B;
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info->sector_count = 71;
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info->size = 0x00400000; break; /* => 4 MB */
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case (CONFIG_SYS_FLASH_WORD_SIZE)SST_ID_xF020:
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info->flash_id += FLASH_SST020;
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info->sector_count = 64;
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info->size = 0x00040000;
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break; /* => 256 kB */
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case (CONFIG_SYS_FLASH_WORD_SIZE)SST_ID_xF040:
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info->flash_id += FLASH_SST040;
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info->sector_count = 128;
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info->size = 0x00080000;
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break; /* => 512 kB */
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default:
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info->flash_id = FLASH_UNKNOWN;
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return (0); /* => no or unknown flash */
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}
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/* set up sector start address table */
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if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) {
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for (i = 0; i < info->sector_count; i++)
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info->start[i] = base + (i * 0x00001000);
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} else if (((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL322B) ||
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((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL323B) ||
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((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320B) ||
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((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL324B)) {
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/* set sector offsets for bottom boot block type */
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for (i=0; i<8; ++i) { /* 8 x 8k boot sectors */
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info->start[i] = base;
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base += 8 << 10;
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}
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while (i < info->sector_count) { /* 64k regular sectors */
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info->start[i] = base;
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base += 64 << 10;
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++i;
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}
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} else if (((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL322T) ||
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((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL323T) ||
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((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320T) ||
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((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL324T)) {
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/* set sector offsets for top boot block type */
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base += info->size;
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i = info->sector_count;
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for (n=0; n<8; ++n) { /* 8 x 8k boot sectors */
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base -= 8 << 10;
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--i;
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info->start[i] = base;
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}
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while (i > 0) { /* 64k regular sectors */
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base -= 64 << 10;
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--i;
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info->start[i] = base;
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}
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} else {
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if (info->flash_id & FLASH_BTYPE) {
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/* set sector offsets for bottom boot block type */
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info->start[0] = base + 0x00000000;
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info->start[1] = base + 0x00004000;
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info->start[2] = base + 0x00006000;
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info->start[3] = base + 0x00008000;
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for (i = 4; i < info->sector_count; i++) {
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info->start[i] = base + (i * 0x00010000) - 0x00030000;
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}
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} else {
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/* set sector offsets for top boot block type */
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i = info->sector_count - 1;
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info->start[i--] = base + info->size - 0x00004000;
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info->start[i--] = base + info->size - 0x00006000;
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info->start[i--] = base + info->size - 0x00008000;
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for (; i >= 0; i--) {
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info->start[i] = base + i * 0x00010000;
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}
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}
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}
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/* check for protected sectors */
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for (i = 0; i < info->sector_count; i++) {
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/* read sector protection at sector address, (A7 .. A0) = 0x02 */
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/* D0 = 1 if protected */
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addr2 = (volatile CONFIG_SYS_FLASH_WORD_SIZE *)(info->start[i]);
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if ((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_AMD)
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info->protect[i] = 0;
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else
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info->protect[i] = addr2[CONFIG_SYS_FLASH_READ2] & 1;
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}
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/*
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* Prevent writes to uninitialized FLASH.
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*/
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if (info->flash_id != FLASH_UNKNOWN) {
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addr2 = (CONFIG_SYS_FLASH_WORD_SIZE *)info->start[0];
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*addr2 = (CONFIG_SYS_FLASH_WORD_SIZE)0x00F000F0; /* reset bank */
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}
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return (info->size);
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}
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int flash_erase(flash_info_t *info, int s_first, int s_last)
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{
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volatile CONFIG_SYS_FLASH_WORD_SIZE *addr = (CONFIG_SYS_FLASH_WORD_SIZE *)(info->start[0]);
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volatile CONFIG_SYS_FLASH_WORD_SIZE *addr2;
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int flag, prot, sect, l_sect;
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ulong start, now, last;
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if ((s_first < 0) || (s_first > s_last)) {
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if (info->flash_id == FLASH_UNKNOWN)
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printf ("- missing\n");
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else
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printf ("- no sectors to erase\n");
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return 1;
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}
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if (info->flash_id == FLASH_UNKNOWN) {
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printf ("Can't erase unknown flash type - aborted\n");
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return 1;
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}
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prot = 0;
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for (sect=s_first; sect<=s_last; ++sect)
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if (info->protect[sect])
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prot++;
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if (prot)
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printf ("- Warning: %d protected sectors will not be erased!\n", prot);
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else
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printf ("\n");
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l_sect = -1;
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/* Disable interrupts which might cause a timeout here */
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flag = disable_interrupts();
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/* Start erase on unprotected sectors */
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for (sect = s_first; sect<=s_last; sect++) {
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if (info->protect[sect] == 0) { /* not protected */
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addr2 = (CONFIG_SYS_FLASH_WORD_SIZE *)(info->start[sect]);
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if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) {
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addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00AA00AA;
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addr[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00550055;
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addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00800080;
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addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00AA00AA;
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addr[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00550055;
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addr2[0] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00300030; /* sector erase */
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|
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/* re-enable interrupts if necessary */
|
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if (flag) {
|
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enable_interrupts();
|
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flag = 0;
|
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}
|
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|
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/* data polling for D7 */
|
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start = get_timer (0);
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while ((addr2[0] & (CONFIG_SYS_FLASH_WORD_SIZE)0x00800080) !=
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(CONFIG_SYS_FLASH_WORD_SIZE)0x00800080) {
|
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if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT)
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return (1);
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}
|
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} else {
|
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if (sect == s_first) {
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addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00AA00AA;
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addr[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00550055;
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addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00800080;
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addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00AA00AA;
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addr[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00550055;
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}
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addr2[0] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00300030; /* sector erase */
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}
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l_sect = sect;
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}
|
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}
|
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|
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/* re-enable interrupts if necessary */
|
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if (flag)
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enable_interrupts();
|
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|
||||
/* wait at least 80us - let's wait 1 ms */
|
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udelay (1000);
|
||||
|
||||
/*
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* We wait for the last triggered sector
|
||||
*/
|
||||
if (l_sect < 0)
|
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goto DONE;
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||||
|
||||
start = get_timer (0);
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last = start;
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addr = (CONFIG_SYS_FLASH_WORD_SIZE *)(info->start[l_sect]);
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while ((addr[0] & (CONFIG_SYS_FLASH_WORD_SIZE)0x00800080) != (CONFIG_SYS_FLASH_WORD_SIZE)0x00800080) {
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if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
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printf ("Timeout\n");
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||||
return 1;
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||||
}
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||||
/* show that we're waiting */
|
||||
if ((now - last) > 1000) { /* every second */
|
||||
putc ('.');
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last = now;
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||||
}
|
||||
}
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||||
|
||||
DONE:
|
||||
/* reset to read mode */
|
||||
addr = (CONFIG_SYS_FLASH_WORD_SIZE *)info->start[0];
|
||||
addr[0] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00F000F0; /* reset bank */
|
||||
|
||||
printf (" done\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* Copy memory to flash, returns:
|
||||
* 0 - OK
|
||||
* 1 - write timeout
|
||||
* 2 - Flash not erased
|
||||
*/
|
||||
int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
|
||||
{
|
||||
ulong cp, wp, data;
|
||||
int i, l, rc;
|
||||
|
||||
wp = (addr & ~3); /* get lower word aligned address */
|
||||
|
||||
/*
|
||||
* handle unaligned start bytes
|
||||
*/
|
||||
if ((l = addr - wp) != 0) {
|
||||
data = 0;
|
||||
for (i=0, cp=wp; i<l; ++i, ++cp) {
|
||||
data = (data << 8) | (*(uchar *)cp);
|
||||
}
|
||||
for (; i<4 && cnt>0; ++i) {
|
||||
data = (data << 8) | *src++;
|
||||
--cnt;
|
||||
++cp;
|
||||
}
|
||||
for (; cnt==0 && i<4; ++i, ++cp) {
|
||||
data = (data << 8) | (*(uchar *)cp);
|
||||
}
|
||||
|
||||
if ((rc = write_word(info, wp, data)) != 0) {
|
||||
return (rc);
|
||||
}
|
||||
wp += 4;
|
||||
}
|
||||
|
||||
/*
|
||||
* handle word aligned part
|
||||
*/
|
||||
while (cnt >= 4) {
|
||||
data = 0;
|
||||
for (i=0; i<4; ++i)
|
||||
data = (data << 8) | *src++;
|
||||
if ((rc = write_word(info, wp, data)) != 0)
|
||||
return (rc);
|
||||
wp += 4;
|
||||
cnt -= 4;
|
||||
}
|
||||
|
||||
if (cnt == 0)
|
||||
return (0);
|
||||
|
||||
/*
|
||||
* handle unaligned tail bytes
|
||||
*/
|
||||
data = 0;
|
||||
for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
|
||||
data = (data << 8) | *src++;
|
||||
--cnt;
|
||||
}
|
||||
for (; i<4; ++i, ++cp)
|
||||
data = (data << 8) | (*(uchar *)cp);
|
||||
|
||||
return (write_word(info, wp, data));
|
||||
}
|
||||
|
||||
/*
|
||||
* Write a word to Flash, returns:
|
||||
* 0 - OK
|
||||
* 1 - write timeout
|
||||
* 2 - Flash not erased
|
||||
*/
|
||||
static int write_word(flash_info_t *info, ulong dest, ulong data)
|
||||
{
|
||||
volatile CONFIG_SYS_FLASH_WORD_SIZE *addr2 = (CONFIG_SYS_FLASH_WORD_SIZE *)(info->start[0]);
|
||||
volatile CONFIG_SYS_FLASH_WORD_SIZE *dest2 = (CONFIG_SYS_FLASH_WORD_SIZE *)dest;
|
||||
volatile CONFIG_SYS_FLASH_WORD_SIZE *data2 = (CONFIG_SYS_FLASH_WORD_SIZE *)&data;
|
||||
ulong start;
|
||||
int flag;
|
||||
int i;
|
||||
|
||||
/* Check if Flash is (sufficiently) erased */
|
||||
if ((*((vu_long *)dest) & data) != data)
|
||||
return (2);
|
||||
|
||||
/* Disable interrupts which might cause a timeout here */
|
||||
flag = disable_interrupts();
|
||||
|
||||
for (i=0; i<4/sizeof(CONFIG_SYS_FLASH_WORD_SIZE); i++) {
|
||||
addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00AA00AA;
|
||||
addr2[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00550055;
|
||||
addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00A000A0;
|
||||
|
||||
dest2[i] = data2[i];
|
||||
|
||||
/* re-enable interrupts if necessary */
|
||||
if (flag)
|
||||
enable_interrupts();
|
||||
|
||||
/* data polling for D7 */
|
||||
start = get_timer (0);
|
||||
while ((dest2[i] & (CONFIG_SYS_FLASH_WORD_SIZE)0x00800080) !=
|
||||
(data2[i] & (CONFIG_SYS_FLASH_WORD_SIZE)0x00800080)) {
|
||||
if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT)
|
||||
return (1);
|
||||
}
|
||||
}
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
|
@ -1,167 +0,0 @@
|
|||
/*
|
||||
* (C) Copyright 2006
|
||||
* Stefan Roese, DENX Software Engineering, sr@denx.de.
|
||||
*
|
||||
* (C) Copyright 2001-2004
|
||||
* Matthias Fuchs, esd gmbh germany, matthias.fuchs@esd-electronics.com
|
||||
* Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/processor.h>
|
||||
#include <command.h>
|
||||
|
||||
/* ------------------------------------------------------------------------- */
|
||||
|
||||
#ifdef FPGA_DEBUG
|
||||
#define DBG(x...) printf(x)
|
||||
#else
|
||||
#define DBG(x...)
|
||||
#endif /* DEBUG */
|
||||
|
||||
#define FPGA_PRG CONFIG_SYS_FPGA_PRG /* FPGA program pin (cpu output)*/
|
||||
#define FPGA_CLK CONFIG_SYS_FPGA_CLK /* FPGA clk pin (cpu output) */
|
||||
#define FPGA_DATA CONFIG_SYS_FPGA_DATA /* FPGA data pin (cpu output) */
|
||||
#define FPGA_DONE CONFIG_SYS_FPGA_DONE /* FPGA done pin (cpu input) */
|
||||
#define FPGA_INIT CONFIG_SYS_FPGA_INIT /* FPGA init pin (cpu input) */
|
||||
|
||||
#define ERROR_FPGA_PRG_INIT_LOW -1 /* Timeout after PRG* asserted */
|
||||
#define ERROR_FPGA_PRG_INIT_HIGH -2 /* Timeout after PRG* deasserted */
|
||||
#define ERROR_FPGA_PRG_DONE -3 /* Timeout after programming */
|
||||
|
||||
#ifndef OLD_VAL
|
||||
# define OLD_VAL 0
|
||||
#endif
|
||||
|
||||
#if 0 /* test-only */
|
||||
#define FPGA_WRITE_1 { \
|
||||
SET_FPGA(OLD_VAL | FPGA_PRG | 0 | FPGA_DATA); /* set clock to 0 */ \
|
||||
SET_FPGA(OLD_VAL | FPGA_PRG | 0 | FPGA_DATA); /* set data to 1 */ \
|
||||
SET_FPGA(OLD_VAL | FPGA_PRG | FPGA_CLK | FPGA_DATA); /* set clock to 1 */ \
|
||||
SET_FPGA(OLD_VAL | FPGA_PRG | FPGA_CLK | FPGA_DATA);} /* set data to 1 */
|
||||
|
||||
#define FPGA_WRITE_0 { \
|
||||
SET_FPGA(OLD_VAL | FPGA_PRG | 0 | FPGA_DATA); /* set clock to 0 */ \
|
||||
SET_FPGA(OLD_VAL | FPGA_PRG | 0 | 0 ); /* set data to 0 */ \
|
||||
SET_FPGA(OLD_VAL | FPGA_PRG | FPGA_CLK | 0 ); /* set clock to 1 */ \
|
||||
SET_FPGA(OLD_VAL | FPGA_PRG | FPGA_CLK | FPGA_DATA);} /* set data to 1 */
|
||||
#else
|
||||
#define FPGA_WRITE_1 { \
|
||||
SET_FPGA(OLD_VAL | FPGA_PRG | 0 | FPGA_DATA); /* set data to 1 */ \
|
||||
SET_FPGA(OLD_VAL | FPGA_PRG | FPGA_CLK | FPGA_DATA);} /* set data to 1 */
|
||||
|
||||
#define FPGA_WRITE_0 { \
|
||||
SET_FPGA(OLD_VAL | FPGA_PRG | 0 | 0 ); /* set data to 0 */ \
|
||||
SET_FPGA(OLD_VAL | FPGA_PRG | FPGA_CLK | 0 );} /* set data to 1 */
|
||||
#endif
|
||||
|
||||
static int fpga_boot(unsigned char *fpgadata, int size)
|
||||
{
|
||||
int i,index,len;
|
||||
int count;
|
||||
int j;
|
||||
|
||||
/* display infos on fpgaimage */
|
||||
index = 15;
|
||||
for (i=0; i<4; i++) {
|
||||
len = fpgadata[index];
|
||||
DBG("FPGA: %s\n", &(fpgadata[index+1]));
|
||||
index += len+3;
|
||||
}
|
||||
|
||||
/* search for preamble 0xFFFFFFFF */
|
||||
while (1) {
|
||||
if ((fpgadata[index] == 0xff) && (fpgadata[index+1] == 0xff) &&
|
||||
(fpgadata[index+2] == 0xff) && (fpgadata[index+3] == 0xff))
|
||||
break; /* preamble found */
|
||||
else
|
||||
index++;
|
||||
}
|
||||
|
||||
DBG("FPGA: configdata starts at position 0x%x\n",index);
|
||||
DBG("FPGA: length of fpga-data %d\n", size-index);
|
||||
|
||||
/*
|
||||
* Setup port pins for fpga programming
|
||||
*/
|
||||
SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA); /* set pins to high */
|
||||
|
||||
DBG("%s, ",(FPGA_DONE_STATE == 0) ? "NOT DONE" : "DONE" );
|
||||
DBG("%s\n",(FPGA_INIT_STATE == 0) ? "NOT INIT" : "INIT" );
|
||||
|
||||
/*
|
||||
* Init fpga by asserting and deasserting PROGRAM*
|
||||
*/
|
||||
SET_FPGA(0 | FPGA_CLK | FPGA_DATA); /* set prog active */
|
||||
|
||||
/* Wait for FPGA init line low */
|
||||
count = 0;
|
||||
while (FPGA_INIT_STATE) {
|
||||
udelay(1000); /* wait 1ms */
|
||||
/* Check for timeout - 100us max, so use 3ms */
|
||||
if (count++ > 3) {
|
||||
DBG("FPGA: Booting failed!\n");
|
||||
return ERROR_FPGA_PRG_INIT_LOW;
|
||||
}
|
||||
}
|
||||
|
||||
DBG("%s, ",(FPGA_DONE_STATE == 0) ? "NOT DONE" : "DONE" );
|
||||
DBG("%s\n",(FPGA_INIT_STATE == 0) ? "NOT INIT" : "INIT" );
|
||||
|
||||
/* deassert PROGRAM* */
|
||||
SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA); /* set prog inactive */
|
||||
|
||||
/* Wait for FPGA end of init period . */
|
||||
count = 0;
|
||||
while (!(FPGA_INIT_STATE)) {
|
||||
udelay(1000); /* wait 1ms */
|
||||
/* Check for timeout */
|
||||
if (count++ > 3) {
|
||||
DBG("FPGA: Booting failed!\n");
|
||||
return ERROR_FPGA_PRG_INIT_HIGH;
|
||||
}
|
||||
}
|
||||
|
||||
DBG("%s, ",(FPGA_DONE_STATE == 0) ? "NOT DONE" : "DONE" );
|
||||
DBG("%s\n",(FPGA_INIT_STATE == 0) ? "NOT INIT" : "INIT" );
|
||||
|
||||
DBG("write configuration data into fpga\n");
|
||||
/* write configuration-data into fpga... */
|
||||
|
||||
/*
|
||||
* Load uncompressed image into fpga
|
||||
*/
|
||||
for (i=index; i<size; i++) {
|
||||
for (j=0; j<8; j++) {
|
||||
if ((fpgadata[i] & 0x80) == 0x80) {
|
||||
FPGA_WRITE_1;
|
||||
} else {
|
||||
FPGA_WRITE_0;
|
||||
}
|
||||
fpgadata[i] <<= 1;
|
||||
}
|
||||
}
|
||||
|
||||
DBG("%s, ",(FPGA_DONE_STATE == 0) ? "NOT DONE" : "DONE" );
|
||||
DBG("%s\n",(FPGA_INIT_STATE == 0) ? "NOT INIT" : "INIT" );
|
||||
|
||||
/*
|
||||
* Check if fpga's DONE signal - correctly booted ?
|
||||
*/
|
||||
|
||||
/* Wait for FPGA end of programming period . */
|
||||
count = 0;
|
||||
while (!(FPGA_DONE_STATE)) {
|
||||
udelay(1000); /* wait 1ms */
|
||||
/* Check for timeout */
|
||||
if (count++ > 3) {
|
||||
DBG("FPGA: Booting failed!\n");
|
||||
return ERROR_FPGA_PRG_DONE;
|
||||
}
|
||||
}
|
||||
|
||||
DBG("FPGA: Booting successful!\n");
|
||||
return 0;
|
||||
}
|
||||
Loading…
Reference in a new issue