mx5 clocks: Fix MXC_FEC_CLK

The FEC clock does not come from PLL1, but from the IPG clock. The previous code
was even inconsistent with itself, returning the IPG clock as expected for
imx_get_fecclk(), but the PLL1 clock for mxc_get_clock(MXC_FEC_CLK).

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
This commit is contained in:
Benoît Thébaudeau 2012-09-27 10:23:58 +00:00 committed by Tom Rini
parent 3cbd107b5f
commit d5fe220df4

View file

@ -474,7 +474,7 @@ unsigned int mxc_get_clock(enum mxc_clock clk)
case MXC_CSPI_CLK:
return imx_get_cspiclk();
case MXC_FEC_CLK:
return decode_pll(mxc_plls[PLL1_CLOCK], MXC_HCLK);
return get_ipg_clk();
case MXC_SATA_CLK:
return get_ahb_clk();
case MXC_DDR_CLK:
@ -490,10 +490,9 @@ u32 imx_get_uartclk(void)
return get_uart_clk();
}
u32 imx_get_fecclk(void)
{
return mxc_get_clock(MXC_IPG_CLK);
return get_ipg_clk();
}
static int gcd(int m, int n)