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mips: xilfpga: Add device tree files
Mostly the same as the Kernel upstream device tree file except for - alias for the serial console node - ethernet node as the ethernet stuff isn't upstream on kernel.org yet - uart clock-frequency passed directly in the node Signed-off-by: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com> Reviewed-by: Paul Burton <paul.burton@imgtec.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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3 changed files with 84 additions and 0 deletions
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@ -6,6 +6,7 @@ dtb-$(CONFIG_TARGET_AP121) += ap121.dtb
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dtb-$(CONFIG_TARGET_AP143) += ap143.dtb
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dtb-$(CONFIG_TARGET_MALTA) += mti,malta.dtb
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dtb-$(CONFIG_TARGET_PIC32MZDASK) += pic32mzda_sk.dtb
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dtb-$(CONFIG_TARGET_XILFPGA) += nexys4ddr.dtb
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dtb-$(CONFIG_BOARD_TPLINK_WDR4300) += tplink_wdr4300.dtb
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targets += $(dtb-y)
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21
arch/mips/dts/microAptiv.dtsi
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21
arch/mips/dts/microAptiv.dtsi
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@ -0,0 +1,21 @@
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "img,xilfpga";
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "mips,m14Kc";
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clocks = <&ext>;
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reg = <0>;
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};
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};
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ext: ext {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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};
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};
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62
arch/mips/dts/nexys4ddr.dts
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62
arch/mips/dts/nexys4ddr.dts
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@ -0,0 +1,62 @@
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/dts-v1/;
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#include "microAptiv.dtsi"
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/ {
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compatible = "digilent,nexys4ddr";
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memory {
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device_type = "memory";
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reg = <0x0 0x08000000>;
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};
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cpuintc: interrupt-controller@0 {
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#address-cells = <0>;
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#interrupt-cells = <1>;
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interrupt-controller;
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compatible = "mti,cpu-interrupt-controller";
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};
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aliases {
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console = &axi_uart16550;
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};
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axi_ethernetlite: ethernet@10e00000 {
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compatible = "xlnx,xps-ethernetlite-1.00.a";
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device_type = "network";
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local-mac-address = [08 86 4C 0D F7 09];
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phy-handle = <&phy0>;
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reg = <0x10e00000 0x10000>;
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xlnx,duplex = <0x1>;
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xlnx,include-global-buffers = <0x1>;
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xlnx,include-internal-loopback = <0x0>;
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xlnx,include-mdio = <0x1>;
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xlnx,instance = "axi_ethernetlite_inst";
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xlnx,rx-ping-pong = <0x1>;
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xlnx,s-axi-id-width = <0x1>;
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xlnx,tx-ping-pong = <0x1>;
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xlnx,use-internal = <0x0>;
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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phy0: phy@1 {
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compatible = <0x0007c0f0 0xfffffff0>;
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device_type = "ethernet-phy";
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reg = <1>;
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} ;
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} ;
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} ;
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axi_uart16550: serial@10400000 {
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compatible = "ns16550a";
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reg = <0x10400000 0x10000>;
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reg-shift = <2>;
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reg-offset = <0x1000>;
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clock-frequency = <50000000>;
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};
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};
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