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Handle Asynchronous DDR clock on 85xx

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The MPC8572 introduces the concept of an asynchronous DDR clock with
regards to the platform clock.

Introduce get_ddr_freq() to report the DDR freq regardless of sync/async
mode.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
Kumar Gala 2007-12-07 04:59:26 -06:00
parent 22abb2d2ea
commit d435793229
5 changed files with 45 additions and 4 deletions
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16
cpu/mpc85xx/cpu.c
View file

@ -39,6 +39,8 @@ int checkcpu (void)
uint fam;
uint ver;
uint major, minor;
u32 ddr_ratio;
volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
svr = get_svr();
ver = SVR_VER(svr);
@ -102,7 +104,19 @@ int checkcpu (void)
puts("Clock Configuration:\n");
printf(" CPU:%4lu MHz, ", sysinfo.freqProcessor / 1000000);
printf("CCB:%4lu MHz,\n", sysinfo.freqSystemBus / 1000000);
printf(" DDR:%4lu MHz, ", sysinfo.freqSystemBus / 2000000);
ddr_ratio = ((gur->porpllsr) & 0x00003e00) >> 9;
switch (ddr_ratio) {
case 0x0:
printf(" DDR:%4lu MHz, ", sysinfo.freqDDRBus / 2000000);
break;
case 0x7:
printf(" DDR:%4lu MHz (Synchronous), ", sysinfo.freqDDRBus / 2000000);
break;
default:
printf(" DDR:%4lu MHz (Asynchronous), ", sysinfo.freqDDRBus / 2000000);
break;
}
#if defined(CFG_LBC_LCRR)
lcrr = CFG_LBC_LCRR;

6
cpu/mpc85xx/spd_sdram.c
View file

@ -53,8 +53,8 @@ picos_to_clk(int picos)
{
int clks;
clks = picos / (2000000000 / (get_bus_freq(0) / 1000));
if (picos % (2000000000 / (get_bus_freq(0) / 1000)) != 0) {
clks = picos / (2000000000 / (get_ddr_freq(0) / 1000));
if (picos % (2000000000 / (get_ddr_freq(0) / 1000)) != 0) {
clks++;
}
@ -421,7 +421,7 @@ spd_sdram(void)
* Adjust the CAS Latency to allow for bus speeds that
* are slower than the DDR module.
*/
busfreq = get_bus_freq(0) / 1000000; /* MHz */
busfreq = get_ddr_freq(0) / 1000000; /* MHz */
effective_data_rate = max_data_rate;
if (busfreq < 90) {

25
cpu/mpc85xx/speed.c
View file

@ -48,6 +48,15 @@ void get_sys_info (sys_info_t * sysInfo)
* overflow for processor speeds above 2GHz */
half_freqSystemBus = sysInfo->freqSystemBus/2;
sysInfo->freqProcessor = e500_ratio*half_freqSystemBus;
sysInfo->freqDDRBus = sysInfo->freqSystemBus;
#ifdef CONFIG_DDR_CLK_FREQ
{
u32 ddr_ratio = ((gur->porpllsr) & 0x00003e00) >> 9;
if (ddr_ratio != 0x7)
sysInfo->freqDDRBus = ddr_ratio * CONFIG_DDR_CLK_FREQ;
}
#endif
}
@ -93,3 +102,19 @@ ulong get_bus_freq (ulong dummy)
return val;
}
/********************************************
* get_ddr_freq
* return ddr bus freq in Hz
*********************************************/
ulong get_ddr_freq (ulong dummy)
{
ulong val;
sys_info_t sys_info;
get_sys_info (&sys_info);
val = sys_info.freqDDRBus;
return val;
}

1
include/common.h
View file

@ -497,6 +497,7 @@ ulong get_bus_freq (ulong);
#if defined(CONFIG_MPC85xx)
typedef MPC85xx_SYS_INFO sys_info_t;
void get_sys_info ( sys_info_t * );
ulong get_ddr_freq (ulong);
#endif
#if defined(CONFIG_MPC86xx)
typedef MPC86xx_SYS_INFO sys_info_t;

1
include/e500.h
View file

@ -12,6 +12,7 @@ typedef struct
{
unsigned long freqProcessor;
unsigned long freqSystemBus;
unsigned long freqDDRBus;
} MPC85xx_SYS_INFO;
#endif /* _ASMLANGUAGE */