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https://github.com/AsahiLinux/u-boot
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Use out_be32() and friends to access memory-mapped registers in sequoia.c
Signed-off-by: Larry Johnson <lrj@acm.org>
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c68f59fe3e
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d3471173e1
1 changed files with 28 additions and 28 deletions
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@ -48,31 +48,31 @@ int board_early_init_f(void)
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* Setup the GPIO pins
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*-------------------------------------------------------------------*/
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/* test-only: take GPIO init from pcs440ep ???? in config file */
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out32(GPIO0_OR, 0x00000000);
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out32(GPIO0_TCR, 0x0000000f);
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out32(GPIO0_OSRL, 0x50015400);
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out32(GPIO0_OSRH, 0x550050aa);
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out32(GPIO0_TSRL, 0x50015400);
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out32(GPIO0_TSRH, 0x55005000);
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out32(GPIO0_ISR1L, 0x50000000);
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out32(GPIO0_ISR1H, 0x00000000);
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out32(GPIO0_ISR2L, 0x00000000);
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out32(GPIO0_ISR2H, 0x00000100);
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out32(GPIO0_ISR3L, 0x00000000);
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out32(GPIO0_ISR3H, 0x00000000);
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out_be32((u32 *) GPIO0_OR, 0x00000000);
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out_be32((u32 *) GPIO0_TCR, 0x0000000f);
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out_be32((u32 *) GPIO0_OSRL, 0x50015400);
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out_be32((u32 *) GPIO0_OSRH, 0x550050aa);
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out_be32((u32 *) GPIO0_TSRL, 0x50015400);
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out_be32((u32 *) GPIO0_TSRH, 0x55005000);
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out_be32((u32 *) GPIO0_ISR1L, 0x50000000);
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out_be32((u32 *) GPIO0_ISR1H, 0x00000000);
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out_be32((u32 *) GPIO0_ISR2L, 0x00000000);
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out_be32((u32 *) GPIO0_ISR2H, 0x00000100);
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out_be32((u32 *) GPIO0_ISR3L, 0x00000000);
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out_be32((u32 *) GPIO0_ISR3H, 0x00000000);
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out32(GPIO1_OR, 0x00000000);
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out32(GPIO1_TCR, 0xc2000000);
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out32(GPIO1_OSRL, 0x5c280000);
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out32(GPIO1_OSRH, 0x00000000);
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out32(GPIO1_TSRL, 0x0c000000);
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out32(GPIO1_TSRH, 0x00000000);
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out32(GPIO1_ISR1L, 0x00005550);
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out32(GPIO1_ISR1H, 0x00000000);
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out32(GPIO1_ISR2L, 0x00050000);
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out32(GPIO1_ISR2H, 0x00000000);
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out32(GPIO1_ISR3L, 0x01400000);
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out32(GPIO1_ISR3H, 0x00000000);
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out_be32((u32 *) GPIO1_OR, 0x00000000);
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out_be32((u32 *) GPIO1_TCR, 0xc2000000);
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out_be32((u32 *) GPIO1_OSRL, 0x5c280000);
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out_be32((u32 *) GPIO1_OSRH, 0x00000000);
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out_be32((u32 *) GPIO1_TSRL, 0x0c000000);
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out_be32((u32 *) GPIO1_TSRH, 0x00000000);
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out_be32((u32 *) GPIO1_ISR1L, 0x00005550);
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out_be32((u32 *) GPIO1_ISR1H, 0x00000000);
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out_be32((u32 *) GPIO1_ISR2L, 0x00050000);
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out_be32((u32 *) GPIO1_ISR2H, 0x00000000);
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out_be32((u32 *) GPIO1_ISR3L, 0x01400000);
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out_be32((u32 *) GPIO1_ISR3H, 0x00000000);
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/*--------------------------------------------------------------------
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* Setup the interrupt controller polarities, triggers, etc.
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@ -102,16 +102,16 @@ int board_early_init_f(void)
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mtdcr(uic2sr, 0xffffffff); /* clear all */
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/* 50MHz tmrclk */
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*(unsigned char *)(CFG_BCSR_BASE | 0x04) = 0x00;
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out_8((u8 *) CFG_BCSR_BASE + 0x04, 0x00);
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/* clear write protects */
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*(unsigned char *)(CFG_BCSR_BASE | 0x07) = 0x00;
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out_8((u8 *) CFG_BCSR_BASE + 0x07, 0x00);
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/* enable Ethernet */
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*(unsigned char *)(CFG_BCSR_BASE | 0x08) = 0x00;
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out_8((u8 *) CFG_BCSR_BASE + 0x08, 0x00);
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/* enable USB device */
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*(unsigned char *)(CFG_BCSR_BASE | 0x09) = 0x20;
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out_8((u8 *) CFG_BCSR_BASE + 0x09, 0x20);
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/* select Ethernet pins */
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mfsdr(SDR0_PFC1, sdr0_pfc1);
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