mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-10 15:14:43 +00:00
Merge branch 'master' of git://git.denx.de/u-boot-sh
- r8a66597 usb changes
This commit is contained in:
Tom Rini
commit
d22c8be964
5 changed files with 457 additions and 438 deletions
|
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@ -37,6 +37,15 @@
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};
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};
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reg_usbhs0_vbus: regulator-usbhs0-vbus {
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compatible = "regulator-fixed";
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regulator-name = "usbhs0_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&port4 1 GPIO_ACTIVE_LOW>;
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};
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rpc: rpc@0xee200000 {
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compatible = "renesas,rpc-r7s72100", "renesas,rpc";
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reg = <0x3fefa000 0x100>, <0x18000000 0x08000000>;
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@ -76,3 +85,8 @@
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&scif2_pins {
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u-boot,dm-pre-reloc;
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};
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&usbhs0 {
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vbus-supply = <®_usbhs0_vbus>;
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status = "okay";
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};
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@ -10,6 +10,7 @@ CONFIG_HUSH_PARSER=y
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# CONFIG_CMD_ELF is not set
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_SF=y
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CONFIG_CMD_USB=y
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CONFIG_CMD_DHCP=y
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CONFIG_CMD_MII=y
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CONFIG_CMD_PING=y
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@ -30,7 +31,7 @@ CONFIG_ENV_SPI_MAX_HZ=50000000
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CONFIG_USE_ENV_SPI_MODE=y
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CONFIG_ENV_SPI_MODE=0x0
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CONFIG_NET_RANDOM_ETHADDR=y
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CONFIG_HAVE_BLOCK_DEVICE=y
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CONFIG_BLK=y
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CONFIG_DM_GPIO=y
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CONFIG_RZA1_GPIO=y
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CONFIG_LED=y
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@ -43,11 +44,17 @@ CONFIG_SPI_FLASH_MACRONIX=y
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CONFIG_DM_ETH=y
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CONFIG_SH_ETHER=y
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CONFIG_PINCTRL=y
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CONFIG_DM_REGULATOR=y
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CONFIG_DM_REGULATOR_FIXED=y
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CONFIG_SCIF_CONSOLE=y
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CONFIG_SPI=y
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CONFIG_DM_SPI=y
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CONFIG_RENESAS_RPC_SPI=y
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CONFIG_TIMER=y
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CONFIG_RENESAS_OSTM_TIMER=y
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CONFIG_USB=y
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CONFIG_DM_USB=y
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CONFIG_USB_R8A66597_HCD=y
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CONFIG_USB_STORAGE=y
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CONFIG_OF_LIBFDT_OVERLAY=y
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# CONFIG_EFI_LOADER is not set
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|
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@ -300,3 +300,12 @@ config USB_DWC2_BUFFER_SIZE
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because larger transactions could be split in smaller ones.
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endif # USB_DWC2
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config USB_R8A66597_HCD
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bool "Renesas R8A66597 USB Core support"
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depends on OF_CONTROL
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depends on DM_USB
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select USB_HOST
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---help---
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This enables support for the on-chip Renesas R8A66597 USB 2.0
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controller, present in various RZ and SH SoCs.
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@ -7,9 +7,11 @@
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#include <common.h>
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#include <console.h>
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#include <dm.h>
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#include <usb.h>
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#include <asm/io.h>
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#include <linux/iopoll.h>
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#include <power/regulator.h>
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#include "r8a66597.h"
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@ -19,29 +21,49 @@
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#define R8A66597_DPRINT(...)
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#endif
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static struct r8a66597 gr8a66597;
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static inline struct usb_device *usb_dev_get_parent(struct usb_device *udev)
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{
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struct udevice *parent = udev->dev->parent;
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/*
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* When called from usb-uclass.c: usb_scan_device() udev->dev points
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* to the parent udevice, not the actual udevice belonging to the
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* udev as the device is not instantiated yet.
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*
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* If dev is an usb-bus, then we are called from usb_scan_device() for
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* an usb-device plugged directly into the root port, return NULL.
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*/
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if (device_get_uclass_id(udev->dev) == UCLASS_USB)
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return NULL;
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/*
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* If these 2 are not the same we are being called from
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* usb_scan_device() and udev itself is the parent.
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*/
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if (dev_get_parent_priv(udev->dev) != udev)
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return udev;
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/* We are being called normally, use the parent pointer */
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if (device_get_uclass_id(parent) == UCLASS_USB_HUB)
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return dev_get_parent_priv(parent);
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return NULL;
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}
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static void get_hub_data(struct usb_device *dev, u16 *hub_devnum, u16 *hubport)
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{
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int i;
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struct usb_device *parent = usb_dev_get_parent(dev);
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*hub_devnum = 0;
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*hubport = 0;
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/* check a device connected to root_hub */
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if ((dev->parent && dev->parent->devnum == 1) ||
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(dev->devnum == 1))
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if ((parent && parent->devnum == 1) ||
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dev->devnum == 1)
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return;
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for (i = 0; i < USB_MAXCHILDREN; i++) {
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if (dev->parent->children[i] == dev) {
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*hub_devnum = (u8)dev->parent->devnum;
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*hubport = i;
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return;
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}
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}
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printf("get_hub_data error.\n");
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*hub_devnum = (u8)parent->devnum;
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*hubport = parent->portnr - 1;
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}
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static void set_devadd(struct r8a66597 *r8a66597, u8 r8a66597_address,
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@ -61,17 +83,6 @@ static int r8a66597_clock_enable(struct r8a66597 *r8a66597)
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u16 tmp;
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int i = 0;
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#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597)
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do {
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r8a66597_write(r8a66597, SCKE, SYSCFG0);
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tmp = r8a66597_read(r8a66597, SYSCFG0);
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if (i++ > 1000) {
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printf("register access fail.\n");
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return -1;
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}
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} while ((tmp & SCKE) != SCKE);
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r8a66597_write(r8a66597, 0x04, 0x02);
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#else
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do {
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r8a66597_write(r8a66597, USBE, SYSCFG0);
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tmp = r8a66597_read(r8a66597, SYSCFG0);
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@ -81,57 +92,30 @@ static int r8a66597_clock_enable(struct r8a66597 *r8a66597)
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}
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} while ((tmp & USBE) != USBE);
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r8a66597_bclr(r8a66597, USBE, SYSCFG0);
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#if !defined(CONFIG_RZA_USB)
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r8a66597_mdfy(r8a66597, CONFIG_R8A66597_XTAL, XTAL, SYSCFG0);
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i = 0;
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r8a66597_bset(r8a66597, XCKE, SYSCFG0);
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do {
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udelay(1000);
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tmp = r8a66597_read(r8a66597, SYSCFG0);
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if (i++ > 500) {
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printf("register access fail.\n");
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return -1;
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}
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} while ((tmp & SCKE) != SCKE);
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#else
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/*
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* RZ/A Only:
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* Bits XTAL(UCKSEL) and UPLLE in SYSCFG0 for USB0 controls both USB0
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* and USB1, so we must always set the USB0 register
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*/
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#if (CONFIG_R8A66597_XTAL == 1)
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setbits(le16, R8A66597_BASE0, XTAL);
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r8a66597_bset(r8a66597, XTAL, SYSCFG0);
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#endif
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mdelay(1);
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setbits(le16, R8A66597_BASE0, UPLLE);
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r8a66597_bset(r8a66597, UPLLE, SYSCFG0);
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mdelay(1);
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r8a66597_bset(r8a66597, SUSPM, SUSPMODE0);
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#endif /* CONFIG_RZA_USB */
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#endif /* #if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) */
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return 0;
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}
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static void r8a66597_clock_disable(struct r8a66597 *r8a66597)
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{
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#if !defined(CONFIG_RZA_USB)
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r8a66597_bclr(r8a66597, SCKE, SYSCFG0);
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udelay(1);
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#if !defined(CONFIG_SUPERH_ON_CHIP_R8A66597)
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r8a66597_bclr(r8a66597, PLLC, SYSCFG0);
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r8a66597_bclr(r8a66597, XCKE, SYSCFG0);
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r8a66597_bclr(r8a66597, USBE, SYSCFG0);
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#endif
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#else
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r8a66597_bclr(r8a66597, SUSPM, SUSPMODE0);
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clrbits(le16, R8A66597_BASE0, UPLLE);
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r8a66597_bclr(r8a66597, UPLLE, SYSCFG0);
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mdelay(1);
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r8a66597_bclr(r8a66597, USBE, SYSCFG0);
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mdelay(1);
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#endif
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}
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static void r8a66597_enable_port(struct r8a66597 *r8a66597, int port)
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@ -141,10 +125,6 @@ static void r8a66597_enable_port(struct r8a66597 *r8a66597, int port)
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val = port ? DRPD : DCFM | DRPD;
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r8a66597_bset(r8a66597, val, get_syscfg_reg(port));
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r8a66597_bset(r8a66597, HSE, get_syscfg_reg(port));
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#if !defined(CONFIG_RZA_USB)
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r8a66597_write(r8a66597, BURST | CPU_ADR_RD_WR, get_dmacfg_reg(port));
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#endif
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}
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static void r8a66597_disable_port(struct r8a66597 *r8a66597, int port)
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@ -174,9 +154,6 @@ static int enable_controller(struct r8a66597 *r8a66597)
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if (ret < 0)
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return ret;
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#if !defined(CONFIG_RZA_USB)
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r8a66597_bset(r8a66597, CONFIG_R8A66597_LDRV & LDRV, PINCFG);
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#endif
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r8a66597_bset(r8a66597, USBE, SYSCFG0);
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r8a66597_bset(r8a66597, INTL, SOFCFG);
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@ -184,9 +161,9 @@ static int enable_controller(struct r8a66597 *r8a66597)
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for (port = 0; port < R8A66597_MAX_ROOT_HUB; port++)
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r8a66597_write(r8a66597, 0, get_intenb_reg(port));
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r8a66597_bset(r8a66597, CONFIG_R8A66597_ENDIAN & BIGEND, CFIFOSEL);
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r8a66597_bset(r8a66597, CONFIG_R8A66597_ENDIAN & BIGEND, D0FIFOSEL);
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r8a66597_bset(r8a66597, CONFIG_R8A66597_ENDIAN & BIGEND, D1FIFOSEL);
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r8a66597_bclr(r8a66597, BIGEND, CFIFOSEL);
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r8a66597_bclr(r8a66597, BIGEND, D0FIFOSEL);
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r8a66597_bclr(r8a66597, BIGEND, D1FIFOSEL);
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r8a66597_bset(r8a66597, TRNENSEL, SOFCFG);
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|
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for (port = 0; port < R8A66597_MAX_ROOT_HUB; port++)
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@ -294,16 +271,13 @@ static int send_setup_packet(struct r8a66597 *r8a66597, struct usb_device *dev,
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unsigned long setup_addr = USBREQ;
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u16 intsts1;
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int timeout = 3000;
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#if defined(CONFIG_RZA_USB)
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u16 dcpctr;
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#endif
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u16 devsel = setup->request == USB_REQ_SET_ADDRESS ? 0 : dev->devnum;
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|
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r8a66597_write(r8a66597, make_devsel(devsel) |
|
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(8 << dev->maxpacketsize), DCPMAXP);
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r8a66597_write(r8a66597, ~(SIGN | SACK), INTSTS1);
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#if defined(CONFIG_RZA_USB)
|
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dcpctr = r8a66597_read(r8a66597, DCPCTR);
|
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if ((dcpctr & PID) == PID_BUF) {
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if (readw_poll_timeout(r8a66597->reg + DCPCTR, dcpctr,
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|
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@ -312,7 +286,6 @@ static int send_setup_packet(struct r8a66597 *r8a66597, struct usb_device *dev,
|
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return -ETIMEDOUT;
|
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}
|
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}
|
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#endif
|
||||
|
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for (i = 0; i < 4; i++) {
|
||||
r8a66597_write(r8a66597, le16_to_cpu(p[i]), setup_addr);
|
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|
|
@ -581,16 +554,15 @@ static int check_usb_device_connecting(struct r8a66597 *r8a66597)
|
|||
return -1; /* fail */
|
||||
}
|
||||
|
||||
/*-------------------------------------------------------------------------*
|
||||
* Virtual Root Hub
|
||||
*-------------------------------------------------------------------------*/
|
||||
/* Virtual Root Hub */
|
||||
|
||||
#include <usbroothubdes.h>
|
||||
|
||||
static int r8a66597_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
|
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void *buffer, int transfer_len, struct devrequest *cmd)
|
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static int r8a66597_submit_rh_msg(struct udevice *udev, struct usb_device *dev,
|
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unsigned long pipe, void *buffer,
|
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int transfer_len, struct devrequest *cmd)
|
||||
{
|
||||
struct r8a66597 *r8a66597 = &gr8a66597;
|
||||
struct r8a66597 *r8a66597 = dev_get_priv(udev);
|
||||
int leni = transfer_len;
|
||||
int len = 0;
|
||||
int stat = 0;
|
||||
|
|
@ -658,7 +630,7 @@ static int r8a66597_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
|
|||
}
|
||||
break;
|
||||
case RH_SET_ADDRESS:
|
||||
gr8a66597.rh_devnum = wValue;
|
||||
r8a66597->rh_devnum = wValue;
|
||||
break;
|
||||
case RH_GET_DESCRIPTOR:
|
||||
switch ((wValue & 0xff00) >> 8) {
|
||||
|
|
@ -724,7 +696,8 @@ static int r8a66597_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
|
|||
} else {
|
||||
data[0] += 2;
|
||||
data[8] = (temp & RH_B_DR) >> 8;
|
||||
data[10] = data[9] = 0xff;
|
||||
data[9] = 0xff;
|
||||
data[10] = 0xff;
|
||||
}
|
||||
|
||||
len = min_t(unsigned int, leni,
|
||||
|
|
@ -754,50 +727,22 @@ static int r8a66597_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
|
|||
return stat;
|
||||
}
|
||||
|
||||
int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
|
||||
int transfer_len)
|
||||
static int r8a66597_submit_control_msg(struct udevice *udev,
|
||||
struct usb_device *dev,
|
||||
unsigned long pipe, void *buffer,
|
||||
int length, struct devrequest *setup)
|
||||
{
|
||||
struct r8a66597 *r8a66597 = &gr8a66597;
|
||||
int ret = 0;
|
||||
|
||||
R8A66597_DPRINT("%s\n", __func__);
|
||||
R8A66597_DPRINT("pipe = %08x, buffer = %p, len = %d, devnum = %d\n",
|
||||
pipe, buffer, transfer_len, dev->devnum);
|
||||
|
||||
set_devadd(r8a66597, dev->devnum, dev, 0);
|
||||
|
||||
pipe_buffer_setting(r8a66597, dev, pipe);
|
||||
|
||||
dev->act_len = 0;
|
||||
while (dev->act_len < transfer_len && ret == 0) {
|
||||
if (ctrlc())
|
||||
return -1;
|
||||
|
||||
if (usb_pipein(pipe))
|
||||
ret = receive_bulk_packet(r8a66597, dev, pipe, buffer,
|
||||
transfer_len);
|
||||
else
|
||||
ret = send_bulk_packet(r8a66597, dev, pipe, buffer,
|
||||
transfer_len);
|
||||
}
|
||||
|
||||
if (ret == 0)
|
||||
dev->status = 0;
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
int submit_control_msg(struct usb_device *dev, unsigned long pipe,
|
||||
void *buffer, int transfer_len, struct devrequest *setup)
|
||||
{
|
||||
struct r8a66597 *r8a66597 = &gr8a66597;
|
||||
struct r8a66597 *r8a66597 = dev_get_priv(udev);
|
||||
u16 r8a66597_address = setup->request == USB_REQ_SET_ADDRESS ?
|
||||
0 : dev->devnum;
|
||||
|
||||
debug("%s: dev='%s', udev=%p, udev->dev='%s', portnr=%d\n", __func__,
|
||||
udev->name, dev, dev->dev->name, dev->portnr);
|
||||
|
||||
R8A66597_DPRINT("%s\n", __func__);
|
||||
if (usb_pipedevice(pipe) == r8a66597->rh_devnum)
|
||||
return r8a66597_submit_rh_msg(dev, pipe, buffer, transfer_len,
|
||||
setup);
|
||||
return r8a66597_submit_rh_msg(udev, dev, pipe, buffer,
|
||||
length, setup);
|
||||
|
||||
R8A66597_DPRINT("%s: setup\n", __func__);
|
||||
set_devadd(r8a66597, r8a66597_address, dev, 0);
|
||||
|
|
@ -810,7 +755,7 @@ int submit_control_msg(struct usb_device *dev, unsigned long pipe,
|
|||
dev->act_len = 0;
|
||||
if (usb_pipein(pipe))
|
||||
if (receive_control_packet(r8a66597, dev, buffer,
|
||||
transfer_len) < 0)
|
||||
length) < 0)
|
||||
return -1;
|
||||
|
||||
if (send_status_packet(r8a66597, pipe) < 0)
|
||||
|
|
@ -821,40 +766,131 @@ int submit_control_msg(struct usb_device *dev, unsigned long pipe,
|
|||
return 0;
|
||||
}
|
||||
|
||||
int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
|
||||
int transfer_len, int interval)
|
||||
static int r8a66597_submit_bulk_msg(struct udevice *udev,
|
||||
struct usb_device *dev, unsigned long pipe,
|
||||
void *buffer, int length)
|
||||
{
|
||||
/* no implement */
|
||||
struct r8a66597 *r8a66597 = dev_get_priv(udev);
|
||||
int ret = 0;
|
||||
|
||||
debug("%s: dev='%s', udev=%p\n", __func__, udev->name, dev);
|
||||
|
||||
R8A66597_DPRINT("%s\n", __func__);
|
||||
R8A66597_DPRINT("pipe = %08x, buffer = %p, len = %d, devnum = %d\n",
|
||||
pipe, buffer, length, dev->devnum);
|
||||
|
||||
set_devadd(r8a66597, dev->devnum, dev, 0);
|
||||
|
||||
pipe_buffer_setting(r8a66597, dev, pipe);
|
||||
|
||||
dev->act_len = 0;
|
||||
while (dev->act_len < length && ret == 0) {
|
||||
if (ctrlc())
|
||||
return -1;
|
||||
|
||||
if (usb_pipein(pipe))
|
||||
ret = receive_bulk_packet(r8a66597, dev, pipe, buffer,
|
||||
length);
|
||||
else
|
||||
ret = send_bulk_packet(r8a66597, dev, pipe, buffer,
|
||||
length);
|
||||
}
|
||||
|
||||
if (ret == 0)
|
||||
dev->status = 0;
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int r8a66597_usb_ofdata_to_platdata(struct udevice *dev)
|
||||
{
|
||||
struct r8a66597 *priv = dev_get_priv(dev);
|
||||
fdt_addr_t addr;
|
||||
|
||||
addr = dev_read_addr(dev);
|
||||
if (addr == FDT_ADDR_T_NONE)
|
||||
return -EINVAL;
|
||||
priv->reg = addr;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
|
||||
static int r8a66597_usb_probe(struct udevice *dev)
|
||||
{
|
||||
struct r8a66597 *r8a66597 = &gr8a66597;
|
||||
struct r8a66597 *priv = dev_get_priv(dev);
|
||||
struct usb_bus_priv *bus_priv = dev_get_uclass_priv(dev);
|
||||
int ret;
|
||||
|
||||
R8A66597_DPRINT("%s\n", __func__);
|
||||
bus_priv->desc_before_addr = true;
|
||||
|
||||
memset(r8a66597, 0, sizeof(*r8a66597));
|
||||
r8a66597->reg = CONFIG_R8A66597_BASE_ADDR;
|
||||
if (CONFIG_IS_ENABLED(DM_REGULATOR)) {
|
||||
ret = device_get_supply_regulator(dev, "vbus-supply",
|
||||
&priv->vbus_supply);
|
||||
if (ret) {
|
||||
dev_err(dev,
|
||||
"can't get VBUS supply\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
disable_controller(r8a66597);
|
||||
ret = regulator_set_enable(priv->vbus_supply, true);
|
||||
if (ret) {
|
||||
dev_err(dev,
|
||||
"can't enable VBUS supply\n");
|
||||
return ret;
|
||||
}
|
||||
}
|
||||
|
||||
disable_controller(priv);
|
||||
mdelay(100);
|
||||
|
||||
enable_controller(r8a66597);
|
||||
r8a66597_port_power(r8a66597, 0 , 1);
|
||||
enable_controller(priv);
|
||||
r8a66597_port_power(priv, 0, 1);
|
||||
|
||||
/* check usb device */
|
||||
check_usb_device_connecting(r8a66597);
|
||||
check_usb_device_connecting(priv);
|
||||
|
||||
mdelay(50);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int usb_lowlevel_stop(int index)
|
||||
static int r8a66597_usb_remove(struct udevice *dev)
|
||||
{
|
||||
disable_controller(&gr8a66597);
|
||||
struct r8a66597 *priv = dev_get_priv(dev);
|
||||
int ret;
|
||||
|
||||
disable_controller(priv);
|
||||
|
||||
if (CONFIG_IS_ENABLED(DM_REGULATOR)) {
|
||||
ret = regulator_set_enable(priv->vbus_supply, false);
|
||||
if (ret) {
|
||||
dev_err(dev,
|
||||
"can't disable VBUS supply\n");
|
||||
return ret;
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
struct dm_usb_ops r8a66597_usb_ops = {
|
||||
.control = r8a66597_submit_control_msg,
|
||||
.bulk = r8a66597_submit_bulk_msg,
|
||||
};
|
||||
|
||||
static const struct udevice_id r8a66597_usb_ids[] = {
|
||||
{ .compatible = "renesas,rza1-usbhs" },
|
||||
{ }
|
||||
};
|
||||
|
||||
U_BOOT_DRIVER(usb_r8a66597) = {
|
||||
.name = "r8a66597_usb",
|
||||
.id = UCLASS_USB,
|
||||
.of_match = r8a66597_usb_ids,
|
||||
.ofdata_to_platdata = r8a66597_usb_ofdata_to_platdata,
|
||||
.probe = r8a66597_usb_probe,
|
||||
.remove = r8a66597_usb_remove,
|
||||
.ops = &r8a66597_usb_ops,
|
||||
.priv_auto_alloc_size = sizeof(struct r8a66597),
|
||||
.flags = DM_FLAG_ALLOC_PRIV_DMA,
|
||||
};
|
||||
|
|
|
|||
|
|
@ -89,27 +89,14 @@
|
|||
#define SUSPMODE0 0x102 /* RZ/A only */
|
||||
|
||||
/* System Configuration Control Register */
|
||||
#if !defined(CONFIG_RZA_USB)
|
||||
#define XTAL 0xC000 /* b15-14: Crystal selection */
|
||||
#define XTAL48 0x8000 /* 48MHz */
|
||||
#define XTAL24 0x4000 /* 24MHz */
|
||||
#define XTAL12 0x0000 /* 12MHz */
|
||||
#define XCKE 0x2000 /* b13: External clock enable */
|
||||
#define PLLC 0x0800 /* b11: PLL control */
|
||||
#define SCKE 0x0400 /* b10: USB clock enable */
|
||||
#define PCSDIS 0x0200 /* b9: not CS wakeup */
|
||||
#define LPSME 0x0100 /* b8: Low power sleep mode */
|
||||
#endif
|
||||
#define HSE 0x0080 /* b7: Hi-speed enable */
|
||||
#define DCFM 0x0040 /* b6: Controller function select */
|
||||
#define DRPD 0x0020 /* b5: D+/- pull down control */
|
||||
#define DPRPU 0x0010 /* b4: D+ pull up control */
|
||||
#if defined(CONFIG_RZA_USB)
|
||||
#define XTAL 0x0004 /* b2: Crystal selection */
|
||||
#define XTAL12 0x0004 /* 12MHz */
|
||||
#define XTAL48 0x0000 /* 48MHz */
|
||||
#define UPLLE 0x0002 /* b1: internal PLL control */
|
||||
#endif
|
||||
#define USBE 0x0001 /* b0: USB module operation enable */
|
||||
|
||||
/* System Configuration Status Register */
|
||||
|
|
@ -178,15 +165,7 @@
|
|||
#define REW 0x4000 /* b14: Buffer rewind */
|
||||
#define DCLRM 0x2000 /* b13: DMA buffer clear mode */
|
||||
#define DREQE 0x1000 /* b12: DREQ output enable */
|
||||
#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597)
|
||||
#define MBW 0x0800
|
||||
#else
|
||||
#if !defined(CONFIG_RZA_USB)
|
||||
#define MBW 0x0400 /* b10: Maximum bit width for FIFO access */
|
||||
#else
|
||||
#define MBW 0x0800 /* b10: Maximum bit width for FIFO access */
|
||||
#endif
|
||||
#endif
|
||||
#define MBW_8 0x0000 /* 8bit */
|
||||
#define MBW_16 0x0400 /* 16bit */
|
||||
#define MBW_32 0x0800 /* 32bit */
|
||||
|
|
@ -398,11 +377,7 @@
|
|||
#define R8A66597_MAX_NUM_PIPE 10
|
||||
#define R8A66597_BUF_BSIZE 8
|
||||
#define R8A66597_MAX_DEVICE 10
|
||||
#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597)
|
||||
#define R8A66597_MAX_ROOT_HUB 1
|
||||
#else
|
||||
#define R8A66597_MAX_ROOT_HUB 2
|
||||
#endif
|
||||
#define R8A66597_MAX_SAMPLING 5
|
||||
#define R8A66597_RH_POLL_TIME 10
|
||||
|
||||
|
|
@ -412,9 +387,7 @@
|
|||
#define BULK_OUT_PIPENUM 4
|
||||
#define BULK_OUT_BUFNUM 40
|
||||
|
||||
#define check_bulk_or_isoc(pipenum) ((pipenum >= 1 && pipenum <= 5))
|
||||
#define check_interrupt(pipenum) ((pipenum >= 6 && pipenum <= 9))
|
||||
#define make_devsel(addr) (addr << 12)
|
||||
#define make_devsel(addr) ((addr) << 12)
|
||||
|
||||
struct r8a66597 {
|
||||
unsigned long reg;
|
||||
|
|
@ -423,11 +396,12 @@ struct r8a66597 {
|
|||
unsigned short port_change;
|
||||
u16 speed; /* HSMODE or FSMODE or LSMODE */
|
||||
unsigned char rh_devnum;
|
||||
struct udevice *vbus_supply;
|
||||
};
|
||||
|
||||
static inline u16 r8a66597_read(struct r8a66597 *r8a66597, unsigned long offset)
|
||||
{
|
||||
return inw(r8a66597->reg + offset);
|
||||
return readw(r8a66597->reg + offset);
|
||||
}
|
||||
|
||||
static inline void r8a66597_read_fifo(struct r8a66597 *r8a66597,
|
||||
|
|
@ -435,32 +409,25 @@ static inline void r8a66597_read_fifo(struct r8a66597 *r8a66597,
|
|||
int len)
|
||||
{
|
||||
int i;
|
||||
#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) || defined(CONFIG_RZA_USB)
|
||||
unsigned long fifoaddr = r8a66597->reg + offset;
|
||||
unsigned long count;
|
||||
unsigned long *p = buf;
|
||||
|
||||
count = len / 4;
|
||||
for (i = 0; i < count; i++)
|
||||
p[i] = inl(r8a66597->reg + offset);
|
||||
p[i] = readl(r8a66597->reg + offset);
|
||||
|
||||
if (len & 0x00000003) {
|
||||
unsigned long tmp = inl(fifoaddr);
|
||||
unsigned long tmp = readl(fifoaddr);
|
||||
|
||||
memcpy((unsigned char *)buf + count * 4, &tmp, len & 0x03);
|
||||
}
|
||||
#else
|
||||
unsigned short *p = buf;
|
||||
|
||||
len = (len + 1) / 2;
|
||||
for (i = 0; i < len; i++)
|
||||
p[i] = inw(r8a66597->reg + offset);
|
||||
#endif
|
||||
}
|
||||
|
||||
static inline void r8a66597_write(struct r8a66597 *r8a66597, u16 val,
|
||||
unsigned long offset)
|
||||
{
|
||||
outw(val, r8a66597->reg + offset);
|
||||
writew(val, r8a66597->reg + offset);
|
||||
}
|
||||
|
||||
static inline void r8a66597_write_fifo(struct r8a66597 *r8a66597,
|
||||
|
|
@ -469,43 +436,30 @@ static inline void r8a66597_write_fifo(struct r8a66597 *r8a66597,
|
|||
{
|
||||
int i;
|
||||
unsigned long fifoaddr = r8a66597->reg + offset;
|
||||
#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) || defined(CONFIG_RZA_USB)
|
||||
unsigned long count;
|
||||
unsigned char *pb;
|
||||
unsigned long *p = buf;
|
||||
|
||||
count = len / 4;
|
||||
for (i = 0; i < count; i++)
|
||||
outl(p[i], fifoaddr);
|
||||
writel(p[i], fifoaddr);
|
||||
|
||||
if (len & 0x00000003) {
|
||||
pb = (unsigned char *)buf + count * 4;
|
||||
for (i = 0; i < (len & 0x00000003); i++) {
|
||||
if (r8a66597_read(r8a66597, CFIFOSEL) & BIGEND)
|
||||
outb(pb[i], fifoaddr + i);
|
||||
writeb(pb[i], fifoaddr + i);
|
||||
else
|
||||
outb(pb[i], fifoaddr + 3 - i);
|
||||
writeb(pb[i], fifoaddr + 3 - i);
|
||||
}
|
||||
}
|
||||
#else
|
||||
int odd = len & 0x0001;
|
||||
unsigned short *p = buf;
|
||||
|
||||
len = len / 2;
|
||||
for (i = 0; i < len; i++)
|
||||
outw(p[i], fifoaddr);
|
||||
|
||||
if (odd) {
|
||||
unsigned char *pb = (unsigned char *)(buf + len);
|
||||
outb(*pb, fifoaddr);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
static inline void r8a66597_mdfy(struct r8a66597 *r8a66597,
|
||||
u16 val, u16 pat, unsigned long offset)
|
||||
{
|
||||
u16 tmp;
|
||||
|
||||
tmp = r8a66597_read(r8a66597, offset);
|
||||
tmp = tmp & (~pat);
|
||||
tmp = tmp | val;
|
||||
|
|
@ -570,7 +524,6 @@ static inline void r8a66597_port_power(struct r8a66597 *r8a66597, int port,
|
|||
#define get_pipetrn_addr(pipenum) (PIPE1TRN + (pipenum - 1) * 4)
|
||||
#define get_devadd_addr(address) (DEVADD0 + address * 2)
|
||||
|
||||
|
||||
/* USB HUB CONSTANTS (not OHCI-specific; see hub.h, based on usb_ohci.h) */
|
||||
|
||||
/* destination of request */
|
||||
|
|
@ -653,11 +606,11 @@ static inline void r8a66597_port_power(struct r8a66597 *r8a66597, int port,
|
|||
|
||||
/* roothub.a masks */
|
||||
#define RH_A_NDP (0xff << 0) /* number of downstream ports */
|
||||
#define RH_A_PSM (1 << 8) /* power switching mode */
|
||||
#define RH_A_NPS (1 << 9) /* no power switching */
|
||||
#define RH_A_DT (1 << 10) /* device type (mbz) */
|
||||
#define RH_A_OCPM (1 << 11) /* over current protection mode */
|
||||
#define RH_A_NOCP (1 << 12) /* no over current protection */
|
||||
#define RH_A_PSM BIT(8) /* power switching mode */
|
||||
#define RH_A_NPS BIT(9) /* no power switching */
|
||||
#define RH_A_DT BIT(10) /* device type (mbz) */
|
||||
#define RH_A_OCPM BIT(11) /* over current protection mode */
|
||||
#define RH_A_NOCP BIT(12) /* no over current protection */
|
||||
#define RH_A_POTPGT (0xff << 24) /* power on to power good time */
|
||||
|
||||
#endif /* __R8A66597_H__ */
|
||||
|
|
|
|||
Loading…
Reference in a new issue