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clk: renesas: r8a7796: Add R8A77961 CPG/MSSR support

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Add support for the R-Car M3-W+ (R8A77961) SoC.
R-Car M3-W+ is very similar to R-Car M3-W (R8A77960), which allows for
both SoCs to share a driver.

Based on Linux commit 2ba738d56db4 ("clk: renesas: r8a7796: Add R8A77961
CPG/MSSR support")

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
This commit is contained in:
Hai Pham 2023-01-26 21:02:02 +01:00 • committed by Marek Vasut
parent 9d16ed44f0
commit d1c886f563
4 changed files with 27 additions and 0 deletions
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1
arch/arm/mach-rmobile/Kconfig.64
View file

@ -36,6 +36,7 @@ config R8A7796
bool "Renesas SoC R8A7796"
select GICV2
imply CLK_R8A77960
imply CLK_R8A77961
imply PINCTRL_PFC_R8A77960
imply PINCTRL_PFC_R8A77961

6
drivers/clk/renesas/Kconfig
View file

@ -85,6 +85,12 @@ config CLK_R8A77960
help
Enable this to support the clocks on Renesas R8A77960 SoC.
config CLK_R8A77961
bool "Renesas R8A77961 clock driver"
depends on CLK_RCAR_GEN3
help
Enable this to support the clocks on Renesas R8A77961 SoC.
config CLK_R8A77965
bool "Renesas R8A77965 clock driver"
depends on CLK_RCAR_GEN3

1
drivers/clk/renesas/Makefile
View file

@ -12,6 +12,7 @@ obj-$(CONFIG_CLK_R8A7794) += r8a7794-cpg-mssr.o
obj-$(CONFIG_CLK_RCAR_GEN3) += clk-rcar-gen3.o
obj-$(CONFIG_CLK_R8A7795) += r8a7795-cpg-mssr.o
obj-$(CONFIG_CLK_R8A77960) += r8a7796-cpg-mssr.o
obj-$(CONFIG_CLK_R8A77961) += r8a7796-cpg-mssr.o
obj-$(CONFIG_CLK_R8A77965) += r8a77965-cpg-mssr.o
obj-$(CONFIG_CLK_R8A77970) += r8a77970-cpg-mssr.o
obj-$(CONFIG_CLK_R8A77980) += r8a77980-cpg-mssr.o

19
drivers/clk/renesas/r8a7796-cpg-mssr.c
View file

@ -355,11 +355,30 @@ static const struct cpg_mssr_info r8a7796_cpg_mssr_info = {
.get_pll_config = r8a7796_get_pll_config,
};
static const struct cpg_mssr_info r8a77961_cpg_mssr_info = {
.core_clk = r8a7796_core_clks,
.core_clk_size = ARRAY_SIZE(r8a7796_core_clks),
.mod_clk = r8a7796_mod_clks,
.mod_clk_size = ARRAY_SIZE(r8a7796_mod_clks),
.mstp_table = r8a7796_mstp_table,
.mstp_table_size = ARRAY_SIZE(r8a7796_mstp_table),
.reset_node = "renesas,r8a77961-rst",
.extalr_node = "extalr",
.mod_clk_base = MOD_CLK_BASE,
.clk_extal_id = CLK_EXTAL,
.clk_extalr_id = CLK_EXTALR,
.get_pll_config = r8a7796_get_pll_config,
};
static const struct udevice_id r8a7796_clk_ids[] = {
{
.compatible = "renesas,r8a7796-cpg-mssr",
.data = (ulong)&r8a7796_cpg_mssr_info,
},
{
.compatible = "renesas,r8a77961-cpg-mssr",
.data = (ulong)&r8a77961_cpg_mssr_info,
},
{ }
};