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arm64: xilinx: dts: Add dma properties to fix dtbs_check warnings
Update dma name and add #dma-cells properties to fix dtbs_check warnings. Signed-off-by: Shravya Kumbham <shravya.kumbham@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/fedbf83fd5c682b4d61905d2cb790d33c2f079d6.1642160644.git.michal.simek@xilinx.com
This commit is contained in:
Shravya Kumbham
Michal Simek
parent
1d70cc7789
commit
d10807a06b
1 changed files with 32 additions and 16 deletions
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@ -265,7 +265,7 @@
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};
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/* GDMA */
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fpd_dma_chan1: dma@fd500000 {
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fpd_dma_chan1: dma-controller@fd500000 {
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status = "disabled";
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compatible = "xlnx,zynqmp-dma-1.0";
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reg = <0x0 0xfd500000 0x0 0x1000>;
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@ -276,9 +276,10 @@
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#stream-id-cells = <1>;
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iommus = <&smmu 0x14e8>;
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power-domains = <&zynqmp_firmware PD_GDMA>;
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#dma-cells = <1>;
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};
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fpd_dma_chan2: dma@fd510000 {
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fpd_dma_chan2: dma-controller@fd510000 {
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status = "disabled";
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compatible = "xlnx,zynqmp-dma-1.0";
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reg = <0x0 0xfd510000 0x0 0x1000>;
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@ -289,9 +290,10 @@
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#stream-id-cells = <1>;
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iommus = <&smmu 0x14e9>;
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power-domains = <&zynqmp_firmware PD_GDMA>;
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#dma-cells = <1>;
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};
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fpd_dma_chan3: dma@fd520000 {
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fpd_dma_chan3: dma-controller@fd520000 {
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status = "disabled";
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compatible = "xlnx,zynqmp-dma-1.0";
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reg = <0x0 0xfd520000 0x0 0x1000>;
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@ -302,9 +304,10 @@
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#stream-id-cells = <1>;
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iommus = <&smmu 0x14ea>;
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power-domains = <&zynqmp_firmware PD_GDMA>;
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#dma-cells = <1>;
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};
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fpd_dma_chan4: dma@fd530000 {
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fpd_dma_chan4: dma-controller@fd530000 {
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status = "disabled";
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compatible = "xlnx,zynqmp-dma-1.0";
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reg = <0x0 0xfd530000 0x0 0x1000>;
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@ -315,9 +318,10 @@
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#stream-id-cells = <1>;
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iommus = <&smmu 0x14eb>;
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power-domains = <&zynqmp_firmware PD_GDMA>;
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#dma-cells = <1>;
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};
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fpd_dma_chan5: dma@fd540000 {
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fpd_dma_chan5: dma-controller@fd540000 {
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status = "disabled";
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compatible = "xlnx,zynqmp-dma-1.0";
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reg = <0x0 0xfd540000 0x0 0x1000>;
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@ -328,9 +332,10 @@
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#stream-id-cells = <1>;
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iommus = <&smmu 0x14ec>;
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power-domains = <&zynqmp_firmware PD_GDMA>;
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#dma-cells = <1>;
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};
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fpd_dma_chan6: dma@fd550000 {
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fpd_dma_chan6: dma-controller@fd550000 {
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status = "disabled";
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compatible = "xlnx,zynqmp-dma-1.0";
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reg = <0x0 0xfd550000 0x0 0x1000>;
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@ -341,9 +346,10 @@
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#stream-id-cells = <1>;
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iommus = <&smmu 0x14ed>;
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power-domains = <&zynqmp_firmware PD_GDMA>;
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#dma-cells = <1>;
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};
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fpd_dma_chan7: dma@fd560000 {
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fpd_dma_chan7: dma-controller@fd560000 {
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status = "disabled";
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compatible = "xlnx,zynqmp-dma-1.0";
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reg = <0x0 0xfd560000 0x0 0x1000>;
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@ -354,9 +360,10 @@
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#stream-id-cells = <1>;
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iommus = <&smmu 0x14ee>;
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power-domains = <&zynqmp_firmware PD_GDMA>;
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#dma-cells = <1>;
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};
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fpd_dma_chan8: dma@fd570000 {
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fpd_dma_chan8: dma-controller@fd570000 {
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status = "disabled";
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compatible = "xlnx,zynqmp-dma-1.0";
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reg = <0x0 0xfd570000 0x0 0x1000>;
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@ -367,6 +374,7 @@
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#stream-id-cells = <1>;
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iommus = <&smmu 0x14ef>;
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power-domains = <&zynqmp_firmware PD_GDMA>;
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#dma-cells = <1>;
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};
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gic: interrupt-controller@f9010000 {
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@ -396,7 +404,7 @@
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* These dma channels, Users should ensure that these dma
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* Channels are allowed for non secure access.
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*/
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lpd_dma_chan1: dma@ffa80000 {
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lpd_dma_chan1: dma-controller@ffa80000 {
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status = "disabled";
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compatible = "xlnx,zynqmp-dma-1.0";
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reg = <0x0 0xffa80000 0x0 0x1000>;
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@ -407,9 +415,10 @@
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#stream-id-cells = <1>;
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iommus = <&smmu 0x868>;
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power-domains = <&zynqmp_firmware PD_ADMA>;
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#dma-cells = <1>;
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};
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lpd_dma_chan2: dma@ffa90000 {
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lpd_dma_chan2: dma-controller@ffa90000 {
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status = "disabled";
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compatible = "xlnx,zynqmp-dma-1.0";
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reg = <0x0 0xffa90000 0x0 0x1000>;
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@ -420,9 +429,10 @@
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#stream-id-cells = <1>;
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iommus = <&smmu 0x869>;
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power-domains = <&zynqmp_firmware PD_ADMA>;
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#dma-cells = <1>;
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};
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lpd_dma_chan3: dma@ffaa0000 {
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lpd_dma_chan3: dma-controller@ffaa0000 {
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status = "disabled";
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compatible = "xlnx,zynqmp-dma-1.0";
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reg = <0x0 0xffaa0000 0x0 0x1000>;
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@ -433,9 +443,10 @@
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#stream-id-cells = <1>;
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iommus = <&smmu 0x86a>;
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power-domains = <&zynqmp_firmware PD_ADMA>;
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#dma-cells = <1>;
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};
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lpd_dma_chan4: dma@ffab0000 {
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lpd_dma_chan4: dma-controller@ffab0000 {
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status = "disabled";
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compatible = "xlnx,zynqmp-dma-1.0";
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reg = <0x0 0xffab0000 0x0 0x1000>;
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@ -446,9 +457,10 @@
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#stream-id-cells = <1>;
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iommus = <&smmu 0x86b>;
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power-domains = <&zynqmp_firmware PD_ADMA>;
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#dma-cells = <1>;
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};
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lpd_dma_chan5: dma@ffac0000 {
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lpd_dma_chan5: dma-controller@ffac0000 {
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status = "disabled";
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compatible = "xlnx,zynqmp-dma-1.0";
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reg = <0x0 0xffac0000 0x0 0x1000>;
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@ -459,9 +471,10 @@
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#stream-id-cells = <1>;
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iommus = <&smmu 0x86c>;
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power-domains = <&zynqmp_firmware PD_ADMA>;
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#dma-cells = <1>;
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};
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lpd_dma_chan6: dma@ffad0000 {
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lpd_dma_chan6: dma-controller@ffad0000 {
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status = "disabled";
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compatible = "xlnx,zynqmp-dma-1.0";
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reg = <0x0 0xffad0000 0x0 0x1000>;
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@ -472,9 +485,10 @@
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#stream-id-cells = <1>;
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iommus = <&smmu 0x86d>;
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power-domains = <&zynqmp_firmware PD_ADMA>;
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#dma-cells = <1>;
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};
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lpd_dma_chan7: dma@ffae0000 {
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lpd_dma_chan7: dma-controller@ffae0000 {
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status = "disabled";
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compatible = "xlnx,zynqmp-dma-1.0";
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reg = <0x0 0xffae0000 0x0 0x1000>;
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@ -485,9 +499,10 @@
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#stream-id-cells = <1>;
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iommus = <&smmu 0x86e>;
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power-domains = <&zynqmp_firmware PD_ADMA>;
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#dma-cells = <1>;
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};
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lpd_dma_chan8: dma@ffaf0000 {
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lpd_dma_chan8: dma-controller@ffaf0000 {
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status = "disabled";
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compatible = "xlnx,zynqmp-dma-1.0";
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reg = <0x0 0xffaf0000 0x0 0x1000>;
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@ -498,6 +513,7 @@
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#stream-id-cells = <1>;
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iommus = <&smmu 0x86f>;
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power-domains = <&zynqmp_firmware PD_ADMA>;
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#dma-cells = <1>;
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};
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mc: memory-controller@fd070000 {
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