arm: dts: ls1028a: disable the PCIe controller by default

Disable the PCIe controllers by default, just like in the linux device
tree. But there is one catch, for linux they are enabled in-place by the
bootloader. Obviously, this doesn't work for the bootloader. Thus we
explicitly enable the controllers in the -u-boot.dtsi files.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This commit is contained in:
Michael Walle 2021-10-13 18:14:25 +02:00 committed by Priyanka Jain
parent 938d9355e6
commit d08011d7f9
4 changed files with 31 additions and 0 deletions

View file

@ -297,6 +297,19 @@
u-boot,dm-pre-reloc; u-boot,dm-pre-reloc;
}; };
/*
* u-boot will enable the device in the linux device tree in place. Because
* we are using the linux device tree, we have to enable the PCI controller
* ourselves.
*/
&pcie1 {
status = "okay";
};
&pcie2 {
status = "okay";
};
&soc { &soc {
u-boot,dm-pre-reloc; u-boot,dm-pre-reloc;
}; };

View file

@ -240,6 +240,14 @@
status = "okay"; status = "okay";
}; };
&pcie1 {
status = "okay";
};
&pcie2 {
status = "okay";
};
&usb0 { &usb0 {
status = "okay"; status = "okay";
}; };

View file

@ -122,6 +122,14 @@
status = "okay"; status = "okay";
}; };
&pcie1 {
status = "okay";
};
&pcie2 {
status = "okay";
};
&usb0 { &usb0 {
status = "okay"; status = "okay";
}; };

View file

@ -354,6 +354,7 @@
bus-range = <0x0 0xff>; bus-range = <0x0 0xff>;
ranges = <0x81000000 0x0 0x00000000 0x80 0x00010000 0x0 0x00010000 /* downstream I/O */ ranges = <0x81000000 0x0 0x00000000 0x80 0x00010000 0x0 0x00010000 /* downstream I/O */
0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ 0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
status = "disabled";
}; };
pcie2: pcie@3500000 { pcie2: pcie@3500000 {
@ -367,6 +368,7 @@
bus-range = <0x0 0xff>; bus-range = <0x0 0xff>;
ranges = <0x81000000 0x0 0x00000000 0x88 0x00010000 0x0 0x00010000 /* downstream I/O */ ranges = <0x81000000 0x0 0x00000000 0x88 0x00010000 0x0 0x00010000 /* downstream I/O */
0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ 0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
status = "disabled";
}; };
cluster1_core0_watchdog: wdt@c000000 { cluster1_core0_watchdog: wdt@c000000 {