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sunxi: dram: Do DDR3 reset in the same way on sun4i/sun5i/sun7i

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The older differences were likely justified by the need to mitigate
the CKE delay timing violations on sun4i/sun5i. The CKE problem is
already resolved, so now we can use the sun7i variant of this code
everywhere.

Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
This commit is contained in:
Siarhei Siamashka 2014-08-03 05:32:44 +03:00 • committed by Hans de Goede
parent 7e40e1926a
commit cfc89b003b
1 changed files with 0 additions and 11 deletions
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11
arch/arm/cpu/armv7/sunxi/dram.c
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@ -446,10 +446,6 @@ unsigned long dramc_init(struct dram_para *para)
/* Disable any pad power save control */
mctl_disable_power_save();
/* reset external DRAM */
#ifndef CONFIG_SUN7I
mctl_ddr3_reset();
#endif
mctl_set_drive();
/* dram clock off */
@ -491,18 +487,11 @@ unsigned long dramc_init(struct dram_para *para)
reg_val |= DRAM_DCR_MODE(DRAM_DCR_MODE_INTERLEAVE);
writel(reg_val, &dram->dcr);
#ifdef CONFIG_SUN7I
dramc_clock_output_en(1);
#endif
mctl_set_cke_delay();
#ifdef CONFIG_SUN7I
mctl_ddr3_reset();
#else
/* dram clock on */
dramc_clock_output_en(1);
#endif
udelay(1);