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ram: rk3399: add missing high row detection

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For 2 GB LPDDR4 single-rank RAM with 16 rows, the Rockchip ddr init bin
prints:
"Bus Width=32 Col=10 Bank=8 Row=16 CS=1 Die Bus-Width=16 Size=2048MB"

U-Boot TPL prints:
"BW=32 Col=10 Bk=8 CS0 Row=16/15 CS=1 Die BW=16 Size=2048MB"

Add missing high row detection so that U-Boot TPL prints Row=16, same as
the Rockchip ddr init bin:
"BW=32 Col=10 Bk=8 CS0 Row=16 CS=1 Die BW=16 Size=2048MB"

Signed-off-by: Jonathan Liu <net147@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This commit is contained in:
Jonathan Liu 2023-03-23 21:35:58 +11:00 • committed by Kever Yang
parent 88b962f393
commit cf8b415d5c
1 changed files with 2 additions and 0 deletions
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2
drivers/ram/rockchip/sdram_rk3399.c
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@ -2749,6 +2749,8 @@ static u64 dram_detect_cap(struct dram_info *dram,
/* detect cs1 row */
sdram_detect_cs1_row(cap_info, params->base.dramtype);
sdram_detect_high_row(cap_info);
/* detect die bw */
sdram_detect_dbw(cap_info, params->base.dramtype);