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mx6: clock: Add thermal clock enable function

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Add api to check and enable pll3 as required
for thermal sensor driver.

Signed-off-by: Ye.Li <B37916@freescale.com>
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
This commit is contained in:
Nitin Garg 2014-11-20 21:14:12 +08:00 committed by Stefano Babic
parent 02a32a92d4
commit cf202d268b
2 changed files with 31 additions and 0 deletions
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30
arch/arm/cpu/armv7/mx6/clock.c
View file

@ -673,6 +673,36 @@ void hab_caam_clock_enable(unsigned char enable)
}
#endif
static void enable_pll3(void)
{
struct anatop_regs __iomem *anatop =
(struct anatop_regs __iomem *)ANATOP_BASE_ADDR;
/* make sure pll3 is enabled */
if ((readl(&anatop->usb1_pll_480_ctrl) &
BM_ANADIG_USB1_PLL_480_CTRL_LOCK) == 0) {
/* enable pll's power */
writel(BM_ANADIG_USB1_PLL_480_CTRL_POWER,
&anatop->usb1_pll_480_ctrl_set);
writel(0x80, &anatop->ana_misc2_clr);
/* wait for pll lock */
while ((readl(&anatop->usb1_pll_480_ctrl) &
BM_ANADIG_USB1_PLL_480_CTRL_LOCK) == 0)
;
/* disable bypass */
writel(BM_ANADIG_USB1_PLL_480_CTRL_BYPASS,
&anatop->usb1_pll_480_ctrl_clr);
/* enable pll output */
writel(BM_ANADIG_USB1_PLL_480_CTRL_ENABLE,
&anatop->usb1_pll_480_ctrl_set);
}
}
void enable_thermal_clk(void)
{
enable_pll3();
}
unsigned int mxc_get_clock(enum mxc_clock clk)
{
switch (clk) {

1
arch/arm/include/asm/arch-mx6/clock.h
View file

@ -66,4 +66,5 @@ int enable_spi_clk(unsigned char enable, unsigned spi_num);
void enable_ipu_clock(void);
int enable_fec_anatop_clock(enum enet_freq freq);
void enable_enet_clk(unsigned char enable);
void enable_thermal_clk(void);
#endif /* __ASM_ARCH_CLOCK_H */