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mx31: Use proper IO accessor for GPR register
Use proper IO accessor for GPR register. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
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commit
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2 changed files with 9 additions and 3 deletions
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@ -144,14 +144,15 @@ void mx31_set_pad(enum iomux_pins pin, u32 config)
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void mx31_set_gpr(enum iomux_gp_func gp, char en)
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void mx31_set_gpr(enum iomux_gp_func gp, char en)
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{
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{
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u32 l;
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u32 l;
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struct iomuxc_regs *iomuxc = (struct iomuxc_regs *)IOMUXC_BASE;
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l = readl(IOMUXC_GPR);
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l = readl(&iomuxc->gpr);
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if (en)
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if (en)
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l |= gp;
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l |= gp;
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else
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else
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l &= ~gp;
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l &= ~gp;
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writel(l, IOMUXC_GPR);
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writel(l, &iomuxc->gpr);
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}
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}
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void mxc_setup_weimcs(int cs, const struct mxc_weimcs *weimcs)
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void mxc_setup_weimcs(int cs, const struct mxc_weimcs *weimcs)
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@ -98,6 +98,12 @@ struct iim_regs {
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u32 iim_scs3;
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u32 iim_scs3;
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};
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};
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struct iomuxc_regs {
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u32 unused1;
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u32 unused2;
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u32 gpr;
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};
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struct mx3_cpu_type {
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struct mx3_cpu_type {
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u8 srev;
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u8 srev;
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u32 v;
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u32 v;
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@ -636,7 +642,6 @@ struct esdc_regs {
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#define WEIM_BASE 0xb8002000
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#define WEIM_BASE 0xb8002000
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#define IOMUXC_BASE 0x43FAC000
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#define IOMUXC_BASE 0x43FAC000
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#define IOMUXC_GPR (IOMUXC_BASE + 0x8)
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#define IOMUXC_SW_MUX_CTL(x) (IOMUXC_BASE + 0xc + (x) * 4)
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#define IOMUXC_SW_MUX_CTL(x) (IOMUXC_BASE + 0xc + (x) * 4)
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#define IOMUXC_SW_PAD_CTL(x) (IOMUXC_BASE + 0x154 + (x) * 4)
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#define IOMUXC_SW_PAD_CTL(x) (IOMUXC_BASE + 0x154 + (x) * 4)
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